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1. 发明授权

US10312023B2 Multilayer ceramic capacitor and method for producing the same 有权
公开(公告)号：US10312023B2
公开(公告)日：2019-06-04
申请号：US15163885
申请日：2016-05-25
申请人： Murata Manufacturing Co., Ltd.
发明人： Akitaka Doi , Shinichi Yamaguchi , Shoichiro Suzuki
IPC分类号： H01G4/30 , H01G4/008 , H01G4/248 , H01G4/232 , H01G11/30
摘要： A multilayer ceramic capacitor having inner electrodes with a Ni-Metal A alloy, the Metal A being selected from Fe, V, Y, and Cu and dissolved in the Ni to form a solid solution. The percentage of the Metal A with respect to the total amount of Metal A and Ni in near-surface regions located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and XA−YA≥1.0, where XA represents the atomic percentage of Metal A in the near-surface regions and YA represents the atomic percentage of Metal A in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body under specific conditions to thereby increase, in the inner electrodes, the percentage of Metal A in the near-surface regions.

2. 发明授权

US10283272B2 Multilayer ceramic capacitor and method for producing the same 有权
公开(公告)号：US10283272B2
公开(公告)日：2019-05-07
申请号：US15163950
申请日：2016-05-25
申请人： Murata Manufacturing Co., Ltd.
发明人： Akitaka Doi , Shinichi Yamaguchi , Shoichiro Suzuki
IPC分类号： H01G4/30 , H01G4/005 , H01G4/008 , H01G4/232
摘要： A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X−Y≥1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.

3. 发明申请

US20180350523A1 ROLL-UP CAPACITOR AND METHOD FOR PRODUCING THE SAME 审中-公开
公开(公告)号：US20180350523A1
公开(公告)日：2018-12-06
申请号：US16047453
申请日：2018-07-27
申请人： Murata Manufacturing Co., Ltd. , Leibniz Institute for Solid State and Materials Research Dresden
发明人： Shoichiro Suzuki , Eric Pankenin , Oliver G. Schmidt
IPC分类号： H01G4/32 , H01G4/005 , H01G4/232
CPC分类号： H01G4/32 , H01G4/015 , H01G4/18 , H01G4/224 , H01G4/232
摘要： A roll-up type capacitor having at least one cylindrical part, a first external electrode on one end of the cylindrical part and a second external electrode on another end of the cylindrical part. The cylindrical part is formed by rolling-up a lower electrode layer and an upper electrode layer with at least a dielectric layer sandwiched therebetween. The first external electrode is electrically connected to the upper electrode layer, and the second external electrode is electrically connected to the lower electrode layer. A thickness of the upper electrode layer at a part where it is connected to the first external electrode is larger than a thickness of the other part of the upper electrode layer, and/or a thickness of the lower electrode layer at a part where it is connected to the second external electrode is larger than a thickness of the other part of the lower electrode layer.

4. 发明申请

US20160358712A1 MULTILAYER CERAMIC CAPACITOR AND METHOD FOR PRODUCING THE SAME 审中-公开
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US20160358712A1
公开(公告)日：2016-12-08
申请号：US15163885
申请日：2016-05-25
申请人： Murata Manufacturing Co., Ltd.
发明人： Akitaka Doi , Shinichi Yamaguchi , Shoichiro Suzuki
IPC分类号： H01G4/30 , H01G4/232 , H01G4/248 , H01G4/008
CPC分类号： H01G4/30 , H01G4/008 , H01G4/232
摘要： A multilayer ceramic capacitor having inner electrodes with a Ni-Metal A alloy, the Metal A being selected from Fe, V, Y, and Cu and dissolved in the Ni to form a solid solution. The percentage of the Metal A with respect to the total amount of Metal A and Ni in near-surface regions located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and XA−YA≧1.0, where XA represents the atomic percentage of Metal A in the near-surface regions and YA represents the atomic percentage of Metal A in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body under specific conditions to thereby increase, in the inner electrodes, the percentage of Metal A in the near-surface regions.
摘要翻译：一种具有镍 - 金属A合金的内电极，金属A选自Fe，V，Y和Cu并溶解在Ni中以形成固溶体的多层陶瓷电容器。相对于与相邻的陶瓷电介质层接触的内部电极的表面2nm处的近表面区域的金属A和Ni的总量，金属A的比例为1.4原子％以上，XA-YA≥1.0，其中XA表示近表面区域中的金属A的原子百分比，YA表示内部电极的中间厚度区域中的金属A的原子百分比。制造多层陶瓷电容器的方法包括在特定条件下退火陶瓷多层体，从而在内电极中增加近表面区域中金属A的百分比。

5. 发明申请

US20160276102A1 MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING MULTILAYER CERAMIC CAPACITOR 有权
标题翻译：多层陶瓷电容器及制造多层陶瓷电容器的方法
公开(公告)号：US20160276102A1
公开(公告)日：2016-09-22
申请号：US15171059
申请日：2016-06-02
申请人： Murata Manufacturing Co., Ltd.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi , Akitaka Doi
IPC分类号： H01G4/008 , H01G4/30 , H01G4/232 , H01G4/12
CPC分类号： H01G4/008 , H01G4/0085 , H01G4/1227 , H01G4/232 , H01G4/30
摘要： A multilayer ceramic capacitor that includes an internal electrode containing at least one kind of metal A selected from the group consisting of In, Ga, Zn, Bi, and Pb and dissolved in Ni to form a solid solution. The internal electrode has a ratio of A of 1.4 atomic percent or more to a total amount of A and Ni in a near-interface region located to a depth of 2 nm from a surface of the internal electrode facing a corresponding ceramic dielectric layer. A relation between a value X of atomic percent representing the ratio of A in the near-interface region and a value Y of atomic percent representing the ratio of A in a central region in a thickness direction of the internal electrode is X−Y≧1.0. Such a multilayer capacitor is formed by annealing a ceramic stack under a predetermined condition to increase the ratio of metal A in the near-interface region of the internal electrode.
摘要翻译：一种多层陶瓷电容器，其包括含有选自In，Ga，Zn，Bi和Pb中的至少一种金属A并溶解在Ni中以形成固溶体的内部电极。内部电极的面积相对于陶瓷电介质层的内部电极的表面的深度为2nm的接近界面区域的A比为1.4原子％以上的A与Ni的总量。表示近界面区域中的A的比例的原子百分比的值X与表示内部电极的厚度方向的中心区域的A的比率的原子百分比的值Y之间的关系为X-Y≥1.0 。通过在预定条件下退火陶瓷堆叠来形成这种多层电容器，以增加内部电极的近界面区域中的金属A的比例。

6. 发明申请

US20150170838A1 LAMINATED CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING LAMINATED CERAMIC CAPACITOR 有权
标题翻译：层压陶瓷电容器及制造层压陶瓷电容器的方法
公开(公告)号：US20150170838A1
公开(公告)日：2015-06-18
申请号：US14612505
申请日：2015-02-03
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi
IPC分类号： H01G4/008 , H01G4/30
CPC分类号： H01G4/008 , H01G4/232 , H01G4/30 , Y10T29/417
摘要： A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm.
摘要翻译：一种层叠陶瓷电容器，其包括多个层叠的陶瓷电介质层的陶瓷层叠体，在陶瓷层叠体内插入陶瓷电介质层的多个内部电极，并且设置在陶瓷层叠体的外表面上的外部电极陶瓷层叠体，与内部电极电连接。内部电极含有Ni作为主要成分，构成内部电极的Ni的晶格常数为0.3250nm〜0.3450nm。

7. 发明申请

US20130107418A1 DIELECTRIC CERAMIC COMPOSITION AND LAMINATED CERAMIC ELECTRONIC COMPONENT 有权
标题翻译：电介质陶瓷组合物和层压陶瓷电子元件
公开(公告)号：US20130107418A1
公开(公告)日：2013-05-02
申请号：US13714467
申请日：2012-12-14
申请人： Murata Manufacturing Co., Ltd.
发明人： Masanori Nakamura , Masahiro Otsuka , Shoichiro Suzuki , Koichi Banno , Taisuke Kanzaki , Akihiro Shiota
IPC分类号： C04B35/48 , H01G4/30
CPC分类号： C04B35/48 , C04B35/4682 , C04B35/49 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3244 , C04B2235/3281 , C04B2235/3298 , C04B2235/656 , C04B2235/768 , C04B2235/79 , H01B3/12 , H01G4/1227 , H01G4/1245 , H01G4/30
摘要： A dielectric ceramic composition that contains, as its main constituent, (Ba1-x-yCaxSry)(Ti1-z-wZrzHfw)O3 (in the formula, 0≦x+y≦0.2, 0≦z+w≦0.1), and contains CuO and Bi2O3, and the dielectric ceramic composition has a feature that the total content of the CuO and Bi2O3 is 10 parts by weight or more with respect to 100 parts by weight of the main constituent, and the molar ratio CuO/(CuO+Bi2O3) is 0.5 or less.
摘要翻译：作为其主要成分的（Ba1-x-yCaxSry）（Ti1-z-wZrzHfw）O3（式中，0 @ x + y @ 0.2,0 @ z + w @ 0.1）的电介质陶瓷组合物和含有CuO和Bi2O3，电介质陶瓷组合物的特征在于，相对于主要成分为100重量份，CuO和Bi 2 O 3的总含量为10重量份以上，CuO /（CuO + Bi2O3）为0.5以下。

8. 发明授权

US10643794B2 Capacitor and process for producing thereof 有权
公开(公告)号：US10643794B2
公开(公告)日：2020-05-05
申请号：US15440504
申请日：2017-02-23
申请人： Murata Manufacturing Co., Ltd. , Leibniz Institute for Solid State and Materials Research Dresden
发明人： Shoichiro Suzuki , Akira Ando , Koichi Banno , Oliver G Schmidt , Daniel Grimm
IPC分类号： H01G4/32 , H01G4/232 , H01G4/12 , H01G4/015
CPC分类号： H01G4/32 , H01G4/015 , H01G4/1218 , H01G4/232 , H01G4/1236
摘要： A roll-up type capacitor includes a cylindrical part, a first external electrode, and a second external electrode. The cylindrical part is a rolled-up laminate in which a lower electrode layer, a dielectric layer and an upper electrode layer are laminated in this order. The first external electrode is electrically connected to the upper electrode layer, and the second external electrode is electrically connected to the lower electrode layer, and the first external electrode and the second external electrode are respectively located on opposed sides of the cylindrical part such that they face to each other.

9. 发明授权

US10121591B2 Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor 有权
公开(公告)号：US10121591B2
公开(公告)日：2018-11-06
申请号：US15643826
申请日：2017-07-07
申请人： Murata Manufacturing Co., Ltd.
发明人： Shinichi Yamaguchi , Shoichiro Suzuki , Akitaka Doi
IPC分类号： H01G4/008 , H01G4/30 , H01G4/12 , H01G4/012 , H01G13/00
摘要： A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.

10. 发明授权

US09818536B2 Multilayer ceramic capacitor and method of manufacturing multilayer ceramic capacitor 有权
公开(公告)号：US09818536B2
公开(公告)日：2017-11-14
申请号：US15171059
申请日：2016-06-02
申请人： Murata Manufacturing Co., Ltd.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi , Akitaka Doi
IPC分类号： H01G4/005 , H01G4/008 , H01G4/30 , H01G4/232 , H01G4/12
CPC分类号： H01G4/008 , H01G4/0085 , H01G4/1227 , H01G4/232 , H01G4/30
摘要： A multilayer ceramic capacitor that includes an internal electrode containing at least one kind of metal A selected from the group consisting of In, Ga, Zn, Bi, and Pb and dissolved in Ni to form a solid solution. The internal electrode has a ratio of A of 1.4 atomic percent or more to a total amount of A and Ni in a near-interface region located to a depth of 2 nm from a surface of the internal electrode facing a corresponding ceramic dielectric layer. A relation between a value X of atomic percent representing the ratio of A in the near-interface region and a value Y of atomic percent representing the ratio of A in a central region in a thickness direction of the internal electrode is X−Y≧1.0. Such a multilayer capacitor is formed by annealing a ceramic stack under a predetermined condition to increase the ratio of metal A in the near-interface region of the internal electrode.

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