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1. 发明授权

US10650976B2 Multilayer ceramic capacitor 有权
公开(公告)号：US10650976B2
公开(公告)日：2020-05-12
申请号：US16578440
申请日：2019-09-23
申请人： Murata Manufacturing Co., Ltd.
发明人： Shinichi Yamaguchi
IPC分类号： H01G4/30 , H01G4/002 , H01G4/005 , H01G4/008 , H01G4/01 , H01G4/012 , H01G4/12 , H01G4/248
摘要： A multilayer ceramic capacitor includes a multilayer body including an inner layer section extending from an inner electrode positioned closest to a first principal surface of the multilayer body to an inner electrode positioned closest to a second principal surface of the multilayer body, and first and second principal surface-side outer layer sections positioned outside the inner layer section on the sides closer to the first and second principal surfaces, respectively. Sn is dissolved in a solid state in Ni of only the inner electrodes contacting the first and second principal surface-side outer layer sections, and a Sn content is not less than about 0.1 mol and not more than about 8.5 mol where a total of Ni and Sn in each of the inner electrodes contacting the first and second principal surface-side outer layer sections is 100 mol.

2. 发明授权

US09520231B2 Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor 有权
标题翻译：层叠陶瓷电容器及层叠陶瓷电容器的制造方法
公开(公告)号：US09520231B2
公开(公告)日：2016-12-13
申请号：US14612505
申请日：2015-02-03
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi
IPC分类号： H01G4/00 , H01G4/008 , H01G4/30 , H01G4/232
CPC分类号： H01G4/008 , H01G4/232 , H01G4/30 , Y10T29/417
摘要： A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm.
摘要翻译：一种层压陶瓷电容器，其包括多个层叠的陶瓷电介质层的陶瓷层叠体，在陶瓷层叠体内插入陶瓷电介质层的多个内部电极，并且设置在陶瓷层叠体的外表面上的外部电极陶瓷层叠体，与内部电极电连接。内部电极含有Ni作为主要成分，构成内部电极的Ni的晶格常数为0.3250nm〜0.3450nm。

3. 发明申请

US20160358713A1 MULTILAYER CERAMIC CAPACITOR AND METHOD FOR PRODUCING THE SAME 审中-公开
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US20160358713A1
公开(公告)日：2016-12-08
申请号：US15163950
申请日：2016-05-25
申请人： Murata Manufacturing Co., Ltd.
发明人： AKITAKA DOI , Shinichi Yamaguchi , Shoichiro Suzuki
IPC分类号： H01G4/30 , H01G4/232 , H01G4/248 , H01G4/008
CPC分类号： H01G4/30 , H01G4/0085 , H01G4/232
摘要： A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X−Y≧1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.
摘要翻译：一种多层陶瓷电容器，其具有含有选自Cu，Ag，Pd，Pt，Rh，Ir，Ru和Os中的至少一种选自Ni和Sn中的0.1原子％以上的金属的内电极，以形成固体解。相对于与相邻的陶瓷电介质层接触的内部电极的表面的距离为2nm的深度的近表面区域的Ni和Sn的总量，Sn的比例为1.4原子％以上， X-Y≥1.0，其中X表示近表面区域中的Sn的原子百分数，Y表示内部电极的中间厚度区域中的Sn的原子百分比。制造多层陶瓷电容器的方法包括使陶瓷多层体退火，使内电极中的Sn附近的表面积增加。

4. 发明授权

US09111683B2 Dielectric ceramic and laminated ceramic capacitor 有权
标题翻译：介质陶瓷和层压陶瓷电容器
公开(公告)号：US09111683B2
公开(公告)日：2015-08-18
申请号：US14022343
申请日：2013-09-10
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shinichi Yamaguchi
IPC分类号： C04B35/468 , H01G4/10 , H01G4/018 , C04B35/626 , H01B3/12 , H01G4/12 , H01G4/30
CPC分类号： H01G4/018 , C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3208 , C04B2235/3224 , C04B2235/3225 , C04B2235/3239 , C04B2235/3262 , C04B2235/3427 , C04B2235/3454 , C04B2235/652 , C04B2235/6562 , C04B2235/6567 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/79 , C04B2235/80 , H01B3/12 , H01G4/1227 , H01G4/30
摘要： A dielectric ceramic that contains, as its main constituent, main-phase grains including a perovskite-type compound containing Ba, Ca, and Ti; first heterogeneous-phase grains containing Ca, a rare-earth element, and Si; and second heterogeneous-phase grains containing no Ca and containing the rare-earth element and Si. The second heterogeneous-phase grains are present in the dielectric ceramic in a ratio of 0.05 or less (including 0) of the number of the second heterogeneous-phase grains to the total of the first heterogeneous-phase grains and the second heterogeneous-phase grains. In the first heterogeneous-phase grains, the content of Ca is preferably 8% or more in terms of molar ratio with respect to the total content of Ca, the rare-earth element, and Si.
摘要翻译：以包含Ba，Ca和Ti的钙钛矿型化合物为主成分的主相成分的电介质陶瓷，含有Ca，稀土元素和Si的第一异质相晶粒; 和不含Ca并且含有稀土元素和Si的第二非均相晶粒。所述第二非均相晶粒以所述第二非均相晶粒数与所述第一非均相晶粒和所述第二非均相晶粒的总和的比例为0.05以下（包括0）的比例存在于所述电介质陶瓷中。在第一非均相晶粒中，相对于Ca，稀土元素和Si的总含量，Ca的含量以摩尔比计优选为8％以上。

5. 发明申请

US20140049877A1 DIELECTRIC CERAMIC, LAMINATED CERAMIC ELECTRONIC COMPONENT, LAMINATED CERAMIC CAPACITOR, AND METHOD FOR PRODUCING LAMINATED CERAMIC CAPACITOR 有权
标题翻译：电介质陶瓷，层压陶瓷电子元件，层压陶瓷电容器和生产层压陶瓷电容器的方法
公开(公告)号：US20140049877A1
公开(公告)日：2014-02-20
申请号：US14067591
申请日：2013-10-30
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi
IPC分类号： C04B35/468 , H01G4/12
CPC分类号： C04B35/4682 , B82Y30/00 , C04B2235/3208 , C04B2235/3244 , C04B2235/3262 , C04B2235/3418 , C04B2235/781 , C04B2235/785 , H01G4/1227 , H01G4/1245 , Y10T29/435
摘要： There are provided a dielectric ceramic having large specific resistance and even capacitance characteristic at 150° C., as well as a laminated ceramic electronic component employing such a dielectric ceramic. A ceramic layer includes crystal grains, the ceramic layer containing a perovskite type compound containing Ba, Ca, Ti, and Zr, containing Si, and optionally containing Mn. When the total content of Ti and Zr is 1 molar part, the content of Mn is 0.015 molar part or less, the content of Si is 0.005 molar part or more and less than 0.03 molar part, the molar ratio x of Ca/(Ba+Ca) satisfies 0.05
摘要翻译：提供了在150℃下具有大电阻和均匀电容特性的介电陶瓷，以及采用这种电介质陶瓷的层压陶瓷电子元件。陶瓷层包括晶粒，该陶瓷层含有含有含有Si的Ba，Ca，Ti和Zr的钙钛矿型化合物，并且任选地含有Mn。当Ti和Zr的总含量为1摩尔份数时，Mn的含量为0.015摩尔份以下，Si的含量为0.005摩尔以上且小于0.03摩尔份，Ca /（Ba + Ca）满足0.05

6. 发明申请

US20150155098A1 LAMINATED CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING LAMINATED CERAMIC CAPACITOR 有权
标题翻译：层压陶瓷电容器及制造层压陶瓷电容器的方法
公开(公告)号：US20150155098A1
公开(公告)日：2015-06-04
申请号：US14614476
申请日：2015-02-05
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shinichi Yamaguchi , Shoichiro Suzuki , Akitaka Doi
IPC分类号： H01G4/008 , H01G13/00 , H01G4/012 , H01G4/30 , H01G4/12
CPC分类号： H01G4/008 , H01G4/0085 , H01G4/012 , H01G4/12 , H01G4/30 , H01G13/00
摘要： A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.
摘要翻译：一种层叠陶瓷电容器，其包括陶瓷层叠体，该陶瓷层叠体具有叠层的多个陶瓷电介质层和彼此相对的多个内部电极，陶瓷电介质层彼此间隔开，外部电极位于陶瓷层叠体的外表面，连接到内部电极。所述内部电极含有Ni和Sn，所述Sn /（Ni + Sn）比例的比例为0.001以上，所述内部电极的相对于与所述内部电极相反的表面的深度为20nm的区域为75％以上陶瓷电介质层，并且在内部电极的厚度方向的中心区域中，Sn /（Ni + Sn）比例为0.001以上的摩尔比的比例小于40％。

7. 发明授权

US08830651B2 Laminated ceramic capacitor and producing method for laminated ceramic capacitor 有权
标题翻译：层压陶瓷电容器及层压陶瓷电容器的制造方法
公开(公告)号：US08830651B2
公开(公告)日：2014-09-09
申请号：US14058960
申请日：2013-10-21
申请人： Murata Manufacturing Co., Ltd.
发明人： Shinichi Yamaguchi
IPC分类号： H01G4/30 , C04B35/468 , H01G4/12 , C04B35/626 , H01B3/12 , H01G4/018
CPC分类号： H01G4/018 , C04B35/4682 , C04B35/62675 , C04B2235/3206 , C04B2235/3208 , C04B2235/3215 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3232 , C04B2235/3239 , C04B2235/3244 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/6584 , C04B2235/768 , C04B2235/85 , H01B3/12 , H01G4/1227 , H01G4/30
摘要： A laminated ceramic capacitor having high electrostatic capacitance and excellent lifetime characteristics, even when in a high electric field intensity employs a dielectric ceramic including crystal grains and crystal grain boundaries which contains, as its main constituent, a perovskite-type compound including Ba, Ca, and Ti, and further contains Mg, R (Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and/or Yb), and Zr, such that when the laminated body is dissolved, the contents in terms of parts by mol are Ca: 3 to 15 parts by mol, Mg: 0.01 to 0.09 parts by mol, R: 2.5 to 8.4 parts by mol, and Zr: 0.05 to 3.0 parts by mol with respect to 100 parts by mol of Ti, and there is Ca at least at the centers of the crystal grains.
摘要翻译：具有高静电电容和优异的寿命特性的层压陶瓷电容器即使在高电场强度下也采用含有晶粒和晶界的介电陶瓷作为主要成分，所述钙电晶体包含Ba，Ca，和Ti，并且还含有Mg，R（Y，La，Sm，Eu，Gd，Tb，Dy，Ho，Er，Tm和/或Yb）和Zr，使得当层压体溶解时，以摩尔数计为Ca：3〜15摩尔％，Mg：0.01〜0.09摩尔份，R：2.5〜8.4摩尔份，Zr：相对于100摩尔份为0.05〜3.0摩尔的Ti，并且至少在晶粒的中心处具有Ca。

8. 发明授权

US10468192B2 Multilayer ceramic capacitor 有权
公开(公告)号：US10468192B2
公开(公告)日：2019-11-05
申请号：US15873012
申请日：2018-01-17
申请人： Murata Manufacturing Co., Ltd.
发明人： Shinichi Yamaguchi
IPC分类号： H01G4/012 , H01G4/12 , H01G4/30 , H01G4/228 , H01G4/232 , H01G4/002 , H01G4/005 , H01G4/008 , H01G4/248
摘要： A multilayer ceramic capacitor includes a multilayer body including an inner layer section extending from an inner electrode positioned closest to a first principal surface of the multilayer body to an inner electrode positioned closest to a second principal surface of the multilayer body, and first and second principal surface-side outer layer sections positioned outside the inner layer section on the sides closer to the first and second principal surfaces, respectively. Sn is dissolved in a solid state in Ni of only the inner electrodes contacting the first and second principal surface-side outer layer sections, and a Sn content is not less than about 0.1 mol and not more than about 8.5 mol where a total of Ni and Sn in each of the inner electrodes contacting the first and second principal surface-side outer layer sections is 100 mol.

9. 发明授权

US09837210B2 Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor 有权
公开(公告)号：US09837210B2
公开(公告)日：2017-12-05
申请号：US15004040
申请日：2016-01-22
申请人： Murata Manufacturing Co., Ltd.
发明人： Akitaka Doi , Shinichi Yamaguchi
IPC分类号： H01G4/12 , H01G4/30 , H01G4/008 , H01G4/012
CPC分类号： H01G4/1227 , H01G4/008 , H01G4/012 , H01G4/12 , H01G4/232 , H01G4/30 , H01G4/385
摘要： A laminated ceramic capacitor having internal electrodes configured such that Sn is dissolved in Ni, and, in a region of each of the internal electrodes at a depth of 2 nm from a surface thereof facing a ceramic dielectric layer, a CV value representing variation of a Sn/(Ni+Sn) ratio (ratio of number of atoms) is less than or equal to 32%. As a conductive paste for forming the internal electrodes, a conductive paste containing a Ni powder and a tin oxide powder which is represented by SnO or SnO2 and has a specific surface area of more than or equal to 10 m2/g as determined by a BET method is used, or a conductive paste containing a Ni—Sn alloy powder is used, or a conductive paste containing a Ni—Sn alloy powder and a tin oxide powder which is represented by SnO or SnO2 and has a specific surface area of more than or equal to 10 m2/g is used.

10. 发明授权

US09728333B2 Method for manufacturing a ceramic laminated body 有权
公开(公告)号：US09728333B2
公开(公告)日：2017-08-08
申请号：US14614476
申请日：2015-02-05
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shinichi Yamaguchi , Shoichiro Suzuki , Akitaka Doi
IPC分类号： H01G7/00 , H01G4/008 , H01G4/30 , H01G4/012 , H01G4/12 , H01G13/00
CPC分类号： H01G4/008 , H01G4/0085 , H01G4/012 , H01G4/12 , H01G4/30 , H01G13/00
摘要： A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.

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