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1. 发明授权

US06735749B2 (Design rule check)/(electrical rule check) algorithms using a system resolution 有权
标题翻译：（设计规则检查）/（电气规则检查）算法使用系统分辨率
公开(公告)号：US06735749B2
公开(公告)日：2004-05-11
申请号：US10103521
申请日：2002-03-21
申请人： Mu-Jing Li , Amy Yang
发明人： Mu-Jing Li , Amy Yang
IPC分类号： G06F1750
CPC分类号： G06F17/5081
摘要： Method and apparatus for checking integrated circuit designs. In particular, one embodiment of the present invention is a method that for checking integrated circuit design files using (design rule check)/(electrical rule check) files (DRC/ERC files) wherein design objects are disposed on a grid having a system resolution, the method comprising steps of: (a) growing one or more rectangular boxes having at least two sides of length equal to the system resolution outward or inward from one or more of an edge of a design object and a side of a design object; (b) performing one or more of a spacing DRC/ERC check and an overlay DRC/ERC check; and (c) identifying checks relating to the rectangular boxes.
摘要翻译：用于检查集成电路设计的方法和装置。特别地，本发明的一个实施例是一种使用（设计规则检查）/（电气规则检查）文件（DRC / ERC文件）来检查集成电路设计文件的方法，其中设计对象被布置在具有系统分辨率的网格上该方法包括以下步骤：（a）从设计对象的边缘和设计对象的一侧的一个或多个边缘生长一个或多个矩形框，其具有至少两边的长度等于系统分辨率的向外或向内; （b）执行间隔DRC / ERC检查和覆盖DRC / ERC检查中的一个或多个; 和（c）识别与矩形框有关的检查。

2. 发明授权

US06871332B2 Structure and method for separating geometries in a design layout into multi-wide object classes 有权
标题翻译：将设计布局中的几何形状分离成多宽对象类的结构和方法
公开(公告)号：US06871332B2
公开(公告)日：2005-03-22
申请号：US10260813
申请日：2002-09-30
申请人： Mu-Jing Li , Amy Yang
发明人： Mu-Jing Li , Amy Yang
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： Manipulation of a multi-wide object class design layout to facilitate design rule checking or automatic correction of design rule errors is improved by deriving wide class objects from geometries of the design layout, and applying certain rules to non-virtual boundaries of the wide class objects that are not applied to virtual boundaries of the wide class objects. In an exemplary embodiment, the wide class objects are preferably derived by sizing down, then sizing up, each geometry by a sizing factor equal to half the minimum width of the particular wide class object less an amount that preferably corresponds to that represented by a minimum resolution of the design layout. Portions of a geometry that are otherwise excluded as being too narrow in width, but that lie wholly within a correction factor of the boundary of the wide class object otherwise derived, are preferably included to form effective wide class objects.
摘要翻译：通过从设计布局的几何导出宽类对象并将某些规则应用于宽类对象的非虚拟边界，可以改进多广度对象类设计布局的操纵以促进设计规则检查或设计规则错误的自动校正它们不会应用于宽类对象的虚拟边界。在示例性实施例中，宽类对象优选地通过将每个几何尺寸调整大小，然后通过等于特定宽类对象的最小宽度的一半的尺寸因子来调整尺寸，然后将其优选地对应于由最小值分辨率的设计布局。否则被排除为宽度过窄但完全位于另外导出的宽类对象的边界的校正因子内的几何的部分优选地被包括以形成有效的宽类对象。

3. 发明授权

US06892368B2 Patching technique for correction of minimum area and jog design rule violations 有权
标题翻译：用于修正最小面积和点动设计规则违规的补丁技术
公开(公告)号：US06892368B2
公开(公告)日：2005-05-10
申请号：US10374948
申请日：2003-02-26
申请人： Mu-Jing Li , Amy Yang
发明人： Mu-Jing Li , Amy Yang
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： Automated patching techniques to correct certain rule violations are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. A series of patches of predefined orientations are utilized to correct design rule violations. A set of violations are identified, patches of a predefined orientation are attempted to correct one or more violations. Patches of another predefined orientation are attempted to correct remaining violations. Attempted patching is repeated until all patches in the series have been attempted or all violations have been corrected. Patches can be added to a construction layer over the set of violations, and each patch that does not cause a design rule violation can be copied to a metal layer. A series of patches of predefined orientations are used, efficiently correcting design rule violations such as minimum area and jog rule violations.
摘要翻译：使用自动修补技术来纠正某些规则违规，简化和自动化电子电路的设计布局，无论是作为设计编码还是作为制造的电子电路。使用一系列预定义方向的修补来纠正设计规则违规。确定一组违规行为，尝试修正一个或多个违规行为的预定义方向的修补程序。尝试修补其他预定义方向的修补程序以纠正剩余违规。重复尝试修补，直到尝试了系列中的所有修补程序或所有违规行为已被更正。可以将修补程序添加到违反组中的构造层，并且不会导致违反设计规则的每个修补程序都可以复制到金属层。使用一系列预定义方向的补丁，有效地纠正设计规则违规，例如最小面积和慢跑规则违规。

4. 发明授权

US06883149B2 Via enclosure rule check in a multi-wide object class design layout 有权
标题翻译：通过机箱规则检查多宽度对象类设计布局
公开(公告)号：US06883149B2
公开(公告)日：2005-04-19
申请号：US10260811
申请日：2002-09-30
申请人： Mu-Jing Li , Amy Yang
发明人： Mu-Jing Li , Amy Yang
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： In a multi-wide class design layout, design rule checks for enclosure of multi wide class objects prevent false errors or false passes by performing such checks against the non-virtual boundaries of a wide class object, and not against the virtual boundaries. An exemplary embodiment provides a method for identifying as a violation, for each wide class wi object, any geometry on another layer which is located at least partially inside the wi object and has any portion thereof located within a distance encli of any non-virtual boundary of the wi object. The exemplary method is preferably performed using effective wide class objects.
摘要翻译：在多类别设计布局中，多宽类对象框架的设计规则检查通过对宽类对象的非虚拟边界执行此类检查，而不是针对虚拟边界来防止错误错误或错误传递。示例性实施例提供了一种用于为每个宽类别标识对象的至少部分地位于第n个对象内的另一层上的任何几何形状的冲突的方法并且其任何部分位于距离对象的任何非虚拟边界的距离范围内。优选地，使用有效的宽类对象来执行示例性方法。

5. 发明授权

US06804808B2 Redundant via rule check in a multi-wide object class design layout 有权
标题翻译：通过多重对象类设计布局中的规则检查进行冗余
公开(公告)号：US06804808B2
公开(公告)日：2004-10-12
申请号：US10260817
申请日：2002-09-30
申请人： Mu-Jing Li , Amy Yang
发明人： Mu-Jing Li , Amy Yang
IPC分类号： G06F1750
CPC分类号： G06F17/5081
摘要： A redundant via design rule check is preferably performed on multi-wide object class design layouts to ensure that each connection area between two conductive layers has at least a certain number of vias and/or has vias placed appropriately to reduce the risk of via failure due to vacancy concentration of isolated vias. In exemplary embodiments, a redundant via design rule check preferably ensures that for vias placed within a connection area of a metal feature (or within a localized region of a larger metal geometry) that is both greater than a certain width and greater than a certain area in size, the vias are both sufficient in number and/or suitable in their location. Vias located inside a geometry but falling outside a virtual edge of a wide class object may be included to satisfy exemplary rules.
摘要翻译：优选地，在多宽对象类设计布局上执行冗余通孔设计规则检查，以确保两个导电层之间的每个连接区域具有至少一定数量的通孔和/或具有适当放置的通孔，以减少通孔故障的风险孤立通孔的空缺集中。在示例性实施例中，冗余通孔设计规则检查优选地确保放置在金属特征（或较大金属几何形状的局部区域内）的连接区域内的通孔大于一定宽度并且大于某一区域尺寸上，通孔的数量和/或适合其位置都是足够的。可以包括位于几何体内但是落在宽类对象的虚拟边缘之外的通风口以满足示例性规则。

6. 发明授权

US06769099B2 Method to simplify and speed up design rule/electrical rule checks 有权
标题翻译：简化和加快设计规则/电气规则检查的方法
公开(公告)号：US06769099B2
公开(公告)日：2004-07-27
申请号：US10121322
申请日：2002-04-12
申请人： Mu-Jing Li , Amy Yang
发明人： Mu-Jing Li , Amy Yang
IPC分类号： G06F1750
CPC分类号： G06F17/5022 , G06F17/5081
摘要： A method, apparatus and computer program product for checking of integrated circuit design files using rules files. Each of the rules files has a rule associated therewith. The rules are sequentially compared with objects associated with the design files in an object-to-check-pool (OTCP). The sequence in which the rules are compared to objects in the OTCP is arrange to maximize a probability of determining whether design characteristics of the objects in the OTCP satisfies all rules associated with the rules files while minimizing a number of rules that must be compared with the OTCP.
摘要翻译：一种使用规则文件检查集成电路设计文件的方法，设备和计算机程序产品。每个规则文件都具有与之相关联的规则。将规则与对象到检查池（OTCP）中与设计文件相关联的对象进行顺序比较。将规则与OTCP中的对象进行比较的顺序排列为最大化确定OTCP中的对象的设计特征是否满足与规则文件相关联的所有规则的概率，同时最小化必须与 OTCP。

7. 发明授权

US06578201B1 Multimedia stream incorporating interactive support for multiple types of subscriber terminals 有权
标题翻译：包含多种类型的用户终端的交互式支持的多媒体流
公开(公告)号：US06578201B1
公开(公告)日：2003-06-10
申请号：US09197270
申请日：1998-11-20
申请人： Tobie J. LaRocca , Amy Yang , Gregory A. Erickson
发明人： Tobie J. LaRocca , Amy Yang , Gregory A. Erickson
IPC分类号： H04N7173
CPC分类号： H04N21/8583 , H04N5/44543 , H04N7/17318 , H04N21/2358 , H04N21/4312 , H04N21/4314 , H04N21/6547 , H04N21/8173
摘要： A multimedia stream incorporating interactive support for multiple types of subscriber terminals. The multimedia stream is created by multiplexing several component streams. The component streams include a video stream, an audio stream, and an interactive data stream. The interactive data stream includes data specific to different types of subscriber terminals multiplexed together.
摘要翻译：包含多种类型用户终端的交互式支持的多媒体流。通过复用多个组件流来创建多媒体流。组件流包括视频流，音频流和交互式数据流。交互式数据流包括特定于不同类型的用户终端多路复用的数据。

8. 发明申请

US20060066846A1 Apparatus and method for detection of contaminant particles or component defects 审中-公开
标题翻译：用于检测污染物颗粒或组分缺陷的装置和方法
公开(公告)号：US20060066846A1
公开(公告)日：2006-03-30
申请号：US11234392
申请日：2005-09-26
申请人： Ching-Too Chen , Roger Brueckner , Jim Hopkins , Amy Yang , Craig Albright , Arnold Klugman
发明人： Ching-Too Chen , Roger Brueckner , Jim Hopkins , Amy Yang , Craig Albright , Arnold Klugman
IPC分类号： G01N21/88
CPC分类号： G01N21/94 , G01N21/8851 , G01N21/896 , G01N21/958
摘要： An apparatus is described for detecting particulates on or defects in a transparent media. The apparatus includes a light source, and an array of light-sensitive elements, each of which produce an electrical signal indicating a characteristic value based on light incident on the element. The first array is disposed a predetermined distance from the at least one light source so that the transparent media may be placed between the light source and the array. An addressing circuit reads the characteristic values produced by each element, and an analog-to-digital converter circuit digitizes the characteristic values, producing digitized values. A processor processes the digitized values to determine whether a particle or defect is present at least based on a position of the shadow cast by the particle or defect on the array. A method for detecting a particulate or defect on or in a transparent media is also described.
摘要翻译：描述了一种用于检测透明介质上的微粒或缺陷的装置。该装置包括光源和一组光敏元件，每个光敏元件根据入射在元件上的光产生表示特征值的电信号。第一阵列与至少一个光源设置预定距离，使得透明介质可以被放置在光源和阵列之间。寻址电路读取由每个元件产生的特征值，并且模数转换器电路对特征值进行数字化，产生数字化值。处理器处理数字化值以至少基于粒子投射的阴影的位置或阵列上的缺陷来确定粒子或缺陷是否存在。还描述了在透明介质上或其中检测颗粒或缺陷的方法。

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