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1. 发明申请

US20050247675A1 Treatment of dies prior to nickel silicide formation 审中-公开
标题翻译：在硅化镍形成之前处理模具
公开(公告)号：US20050247675A1
公开(公告)日：2005-11-10
申请号：US10950979
申请日：2004-09-27
申请人： Mona Eissa , Nilesh Doke , Eden Zielinski , Gregory Shinn
发明人： Mona Eissa , Nilesh Doke , Eden Zielinski , Gregory Shinn
IPC分类号： B44C1/22 , C23F1/00 , C23G1/20 , H01L21/02 , H01L21/321 , H01L21/3213
CPC分类号： H01L21/02074 , C23G1/20
摘要： A post chemical-mechanical polishing cleaning method, comprising contacting a die with a first chemistry that removes at least some organic compounds and ions from a surface of the die. After contacting the die with the first chemistry, the method further comprises contacting the die with a second chemistry that removes at least some copper abutting the die surface. The method further comprises rinsing and drying the die.
摘要翻译：一种后化学机械抛光清洗方法，包括使模具与第一化学物质接触，所述第一化学物质从模具的表面除去至少一些有机化合物和离子。在使模具与第一化学品接触之后，该方法还包括使模具与第二化学物质接触，该第二化学物质移除邻近管芯表面的至少一些铜。该方法还包括冲洗和干燥模具。

2. 发明申请

US20070181532A1 CMP CLEAN PROCESS FOR HIGH PERFORMANCE COPPER/LOW-K DEVICES 审中-公开
标题翻译：用于高性能铜/低K器件的CMP清洁工艺
公开(公告)号：US20070181532A1
公开(公告)日：2007-08-09
申请号：US11734061
申请日：2007-04-11
申请人： Mona EISSA , Nilesh Doke , Eden Zielinski , Gregory Shinn
发明人： Mona EISSA , Nilesh Doke , Eden Zielinski , Gregory Shinn
IPC分类号： B08B3/00 , B44C1/22 , H01L21/302 , H01L21/461
CPC分类号： H01L21/02074 , C23G1/20
摘要： A post chemical-mechanical polishing cleaning method, comprising contacting a die with a first chemistry that removes at least some organic compounds and ions from a surface of the die. After contacting the die with the first chemistry, the method further comprises contacting the die with a second chemistry that removes at least some copper abutting the die surface. The method further comprises rinsing and drying the die.
摘要翻译：一种后化学机械抛光清洗方法，包括使模具与第一化学物质接触，所述第一化学物质从模具的表面除去至少一些有机化合物和离子。在使模具与第一化学品接触之后，该方法还包括使模具与第二化学物质接触，该第二化学物质移除邻近管芯表面的至少一些铜。该方法还包括冲洗和干燥模具。

3. 发明授权

US07183187B2 Integration scheme for using silicided dual work function metal gates 有权
标题翻译：使用硅化双功能金属门的集成方案
公开(公告)号：US07183187B2
公开(公告)日：2007-02-27
申请号：US10851750
申请日：2004-05-20
申请人： Jiong-Ping Lu , Gregory Shinn , Ping Jiang
发明人： Jiong-Ping Lu , Gregory Shinn , Ping Jiang
IPC分类号： H01L21/3205
CPC分类号： H01L29/66507 , H01L21/28097 , H01L21/823835 , H01L21/823842 , H01L27/0811 , H01L28/60
摘要： The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device, among other possible steps, includes forming a polysilicon gate electrode (250) over a substrate (210) and forming source/drain regions (610) in the substrate (210) proximate the polysilicon gate electrode (250). The method further includes forming a protective layer (710) over the source/drain regions (610) and the polysilicon gate electrode (250), then removing the protective layer (710) from over a top surface of the polysilicon gate electrode (250) while leaving the protective layer (710) over the source/drain regions (250). After the protective layer (710) has been removed from over the top surface of the polysilicon gate electrode (250), the polysilicon gate electrode (250) is silicided to form a silicided gate electrode (1310). The protective layer (710) is also removed from over the source/drain regions (610) and source/drain contact regions (1610) are formed.
摘要翻译：本发明提供一种制造半导体器件的方法及其制造方法，该集成电路包括该半导体器件。除了其他可能的步骤之外，制造半导体器件的方法包括在衬底（210）上形成多晶硅栅电极（250），并在靠近多晶硅栅电极（250）的衬底（210）中形成源/漏区（610））。该方法还包括在源极/漏极区域（610）和多晶硅栅电极（250）之上形成保护层（710），然后从多晶硅栅电极（250）的顶表面上方移除保护层（710）同时将保护层（710）留在源/漏区（250）上。在保护层（710）已从多晶硅栅电极（250）的顶表面上方移除之后，多晶硅栅电极（250）被硅化以形成硅化栅电极（1310）。保护层（710）也从源极/漏极区域（610）上去除并形成源极/漏极接触区域（1610）。

4. 发明申请

US20050260841A1 Integration scheme for using silicided dual work function metal gates 有权
标题翻译：使用硅化双功能金属门的集成方案
公开(公告)号：US20050260841A1
公开(公告)日：2005-11-24
申请号：US10851750
申请日：2004-05-20
申请人： Jiong-Ping Lu , Gregory Shinn , Ping Jiang
发明人： Jiong-Ping Lu , Gregory Shinn , Ping Jiang
IPC分类号： H01L21/02 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/4763 , H01L21/8238 , H01L27/08
CPC分类号： H01L29/66507 , H01L21/28097 , H01L21/823835 , H01L21/823842 , H01L27/0811 , H01L28/60
摘要： The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit including the semiconductor device. The method for manufacturing the semiconductor device, among other possible steps, includes forming a polysilicon gate electrode (250) over a substrate (210) and forming source/drain regions (610) in the substrate (210) proximate the polysilicon gate electrode (250). The method further includes forming a protective layer (710) over the source/drain regions (610) and the polysilicon gate electrode (250), then removing the protective layer (710) from over a top surface of the polysilicon gate electrode (250) while leaving the protective layer (710) over the source/drain regions (250). After the protective layer (710) has been removed from over the top surface of the polysilicon gate electrode (250), the polysilicon gate electrode (250) is silicided to form a silicided gate electrode (1310). The protective layer (710) is also removed from over the source/drain regions (610) and source/drain contact regions (1610) are formed.
摘要翻译：本发明提供一种制造半导体器件的方法及其制造方法，该集成电路包括该半导体器件。制造半导体器件的方法以及其它可能的步骤包括在衬底（210）上形成多晶硅栅电极（250），并在接近多晶硅栅电极（250）的衬底（210）中形成源/漏区（610））。该方法还包括在源极/漏极区域（610）和多晶硅栅电极（250）之上形成保护层（710），然后从多晶硅栅电极（250）的顶表面上方移除保护层（710）同时将保护层（710）留在源/漏区（250）上。在保护层（710）已从多晶硅栅电极（250）的顶表面上方移除之后，多晶硅栅电极（250）被硅化以形成硅化栅电极（1310）。保护层（710）也从源极/漏极区域（610）上去除并形成源极/漏极接触区域（1610）。

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