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1. 发明申请

US20070257699A1 Multi-memory module circuit topology 审中-公开
标题翻译：多内存模块电路拓扑
公开(公告)号：US20070257699A1
公开(公告)日：2007-11-08
申请号：US11407814
申请日：2006-04-20
申请人： Moises Cases , Daniel De Araujo , Erdem Matoglu , Pravin Patel , Nam Pham
发明人： Moises Cases , Daniel De Araujo , Erdem Matoglu , Pravin Patel , Nam Pham
IPC分类号： H03K17/16
CPC分类号： G11C5/04 , G11C5/063
摘要： A multi-memory module circuit topology is disclosed that includes a memory controller, a plurality of memory modules connected to the memory controller through a memory bus, and a resonator connected to the plurality of memory modules in a starburst topology. A method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing a plurality of memory modules connected to a memory controller through a memory bus, selecting a starburst topology, and connecting a resonator to the plurality of memory module in dependence upon the selected starburst topology. An additional method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing by a resonator a predetermined discontinuity reducing impedance at a predetermined location in the multi-memory module circuit between at least two memory modules, the multi-memory module circuit having a plurality of components of logically arranged around the predetermined location.
摘要翻译：公开了一种多存储器模块电路拓扑，其包括存储器控制器，通过存储器总线连接到存储器控制器的多个存储器模块，以及以星爆拓扑连接到多个存储器模块的谐振器。公开了一种用于减少多存储器模块电路中的阻抗不连续性的方法，其包括通过存储器总线提供连接到存储器控制器的多个存储器模块，选择星爆拓扑，并且依次将谐振器连接到多个存储器模块在选定的星爆拓扑上。公开了一种用于减少多存储器模块电路中的阻抗不连续性的附加方法，其包括由谐振器在至少两个存储器模块之间的多存储器模块电路中的预定位置处提供预定的不连续性减小阻抗，所述多存储器模块电路具有围绕预定位置逻辑布置的多个部件。

2. 发明申请

US20080098149A1 SIGNAL HISTORY CONTROLLED SLEW-RATE TRANSMISSION METHOD AND BUS INTERFACE TRANSMITTER 失效
标题翻译：信号历史控制的单向传输方法和总线接口发射机
公开(公告)号：US20080098149A1
公开(公告)日：2008-04-24
申请号：US11962093
申请日：2007-12-21
申请人： Daniel De Araujo , Daniel Dreps , Bhyrav Mutnury
发明人： Daniel De Araujo , Daniel Dreps , Bhyrav Mutnury
IPC分类号： G06F13/00 , H03K5/12
CPC分类号： H04L25/0286 , H04L25/0272
摘要： A signal history controlled slew-rate transmission method and bus interface transmitter provide an improved channel equalization mechanism having low complexity. A variable slew-rate feed-forward pre-emphasis circuit changes the slew rate of the applied pre-emphasis in conformity with the history of the transmitted signal. The pre-emphasis circuit may be implemented by a pair of current sources supplying the output of the transmitter, and having differing current values. The current sources are controlled such that upon a signal value change, a high slew rate is provided and when the signal value does not change for two consecutive signal periods, the slew rate is reduced. A current source having a controlled magnitude may be employed to provide a slew rate that changes over time and is continuously reduced until another transmission value change occurs.
摘要翻译：信号历史控制的转换速率传输方法和总线接口发射机提供了一种具有低复杂度的改进的信道均衡机制。可变转换速率前馈预加重电路根据发送信号的历史改变所施加的预加重的转换速率。预加重电路可以由提供发射机的输出并具有不同电流值的一对电流源来实现。控制电流源，使得在信号值变化时，提供高压摆率，并且当两个连续信号周期的信号值不变时，转换速率降低。可以使用具有受控幅度的电流源来提供随时间变化的压摆率，并且持续地减小，直到发生另一个传输值变化。

3. 发明申请

US20060123285A1 Dynamic threshold scaling in a communication system 审中-公开
标题翻译：通信系统中的动态阈值缩放
公开(公告)号：US20060123285A1
公开(公告)日：2006-06-08
申请号：US10989562
申请日：2004-11-16
申请人： Daniel De Araujo , Paul Richards , Brian Rinaldi , Todd Sorenson
发明人： Daniel De Araujo , Paul Richards , Brian Rinaldi , Todd Sorenson
IPC分类号： G11C29/00
CPC分类号： G06F11/0712 , G06F11/076
摘要： A computer system including an error recovery system establishes error threshold inversely proportional to the number of a like kind of system resources, such as host adapters. When a host adapter is initialized or deactivated, a software subcomponent of a processing device calculates a new threshold number and writes it to a memory location associated with each host adapter. When a number of errors exceeds the threshold number, the host adapter is reset, quiesced for repair, or fenced for replacement.
摘要翻译：包括错误恢复系统的计算机系统建立与类似类型的系统资源（例如主机适配器）的数量成反比的错误阈值。当主机适配器被初始化或去激活时，处理设备的软件子组件计算新的阈值数并将其写入与每个主机适配器相关联的存储器位置。当多个错误超过阈值数时，主机适配器将被重置，停止维修或者替换。

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