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    • 3. 发明授权
    • Semiconductor integrated circuit device, memory module, storage device
    • 半导体集成电路器件,存储器模块,存储器件
    • US06449197B1
    • 2002-09-10
    • US09989133
    • 2001-11-21
    • Mitsuru HirakiShoji Shukuri
    • Mitsuru HirakiShoji Shukuri
    • G11C1604
    • G11C7/08G11C7/20G11C7/22G11C11/406G11C11/40615G11C11/4072G11C11/4074G11C16/06G11C16/20G11C16/30G11C29/02G11C29/021G11C29/026G11C29/028G11C29/4401G11C29/50012G11C29/70G11C2029/0401G11C2029/1208
    • To improve the efficiency for repairing a defect of a large-scale integrated circuit. A semiconductor integrated circuit device comprises, a central processing unit (10), an electrically reprogrammable nonvolatile memory (11) and a volatile memory (12, 13) while sharing a dat bus (16), and utilizes the stored information of the nonvolatile memory so as to repair a defect of the volatile memory. This volatile memory includes volatile storage circuit (12AR, 13AR) for latching the repair information for repairing a defective normal memory cell with a redundancy memory cell. The nonvolatile memory reads out the repair information from itself in response to an instruction to initialize the semiconductor integrated circuit device. In response to the initializing instruction, the volatile storage circuit latches the repair information from the nonvolatile memory. Any fuse program circuit is not needed for the detect repair, but a defect to occur after a burn-in can be newly repaired so that the new defect can be repaired even after the packaging over a circuit substrate.
    • 一种半导体集成电路装置,包括中央处理单元(10),电可再编程非易失性存储器(11)和易失性存储器(12,13),同时共享 数据总线(16),并且利用所存储的非易失性存储器的信息来修复易失性存储器的缺陷。 这种易失性存储器包括易失性存储电路(12AR,13AR),用于通过冗余存储单元锁存用于修复有缺陷的正常存储单元的修复信息。 非易失性存储器响应于初始化半导体集成电路器件的指令从其自身读出修复信息。 响应于初始化指令,易失性存储电路锁存来自非易失性存储器的修复信息。 任何保险丝编程电路不需要用于检测修复,但是可以重新修复在老化之后发生的缺陷,使得即使在电路基板上的封装之后也可以修复新的缺陷。
    • 6. 发明授权
    • Semiconductor integrated circuit device, memory module, storage device and the method for repairing semiconductor integrated circuit device
    • 半导体集成电路器件,存储器模块,存储器件和半导体集成电路器件修复方法
    • US06438029B2
    • 2002-08-20
    • US09756747
    • 2001-01-10
    • Mitsuru HirakiShoji Shukuri
    • Mitsuru HirakiShoji Shukuri
    • G11C1606
    • G11C7/08G11C7/20G11C7/22G11C11/406G11C11/40615G11C11/4072G11C11/4074G11C16/06G11C16/20G11C16/30G11C29/02G11C29/021G11C29/026G11C29/028G11C29/4401G11C29/50012G11C29/70G11C2029/0401G11C2029/1208
    • To improve the efficiency for repairing a defect of a large-scale integrated circuit. A semiconductor integrated circuit device comprises, a central processing unit (10), an electrically reprogrammable nonvolatile memory (11) and a volatile memory (12, 13) while sharing a dat bus (16), and utilizes the stored information of the nonvolatile memory so as to repair a defect of the volatile memory. This volatile memory includes volatile storage circuit (12AR, 13AR) for latching the repair information for repairing a defective normal memory cell with a redundancy memory cell. The nonvolatile memory reads out the repair information from itself in response to an instruction to initialize the semiconductor integrated circuit device. In response to the initializing instruction, the volatile storage circuit latches the repair information from the nonvolatile memory. Any fuse program circuit is not needed for the detect repair, but a defect to occur after a burn-in can be newly repaired so that the new defect can be repaired even after the packaging over a circuit substrate.
    • 提高修复大型集成电路缺陷的效率。 半导体集成电路装置包括:中央处理单元(10),电可重新编程的非易失性存储器(11)和易失性存储器(12,13),同时共享数据总线(16),并利用所存储的非易失性存储器的信息 以便修复易失性存储器的缺陷。 这种易失性存储器包括易失性存储电路(12AR,13AR),用于通过冗余存储单元锁存用于修复有缺陷的正常存储单元的修复信息。 非易失性存储器响应于初始化半导体集成电路器件的指令从其自身读出修复信息。 响应于初始化指令,易失性存储电路锁存来自非易失性存储器的修复信息。 任何保险丝编程电路不需要用于检测修复,但是可以重新修复在老化之后发生的缺陷,使得即使在电路基板上的封装之后也可以修复新的缺陷。
    • 8. 发明申请
    • Data processing system and data processing method
    • 数据处理系统和数据处理方法
    • US20050281113A1
    • 2005-12-22
    • US11200104
    • 2005-08-10
    • Naoki YadaEiichi IshikawaMitsuru HirakiShoji Shukuri
    • Naoki YadaEiichi IshikawaMitsuru HirakiShoji Shukuri
    • G06F12/16G06F11/10G06F15/78G11C7/00G11C16/06G11C29/00
    • G06F11/1068
    • A data processing system (1) has an erasable and programmable non-volatile memory (5) and a central processing unit (2). The central processing unit allows only a specified partial storage area (20Ba) of the non-volatile memory to be intended for a software ECC process. Since ECC codes are added to the partial storage area alone and an error correction is made thereto to thereby increase the number of rewrite assurances, substantially needless waste of each storage area by ECC codes can b avoided as compared with a configuration in which the ECC codes are added to all the write data without distinction regardless of the storage areas. Further, since software copes with ECC processing, ECC correcting capability matched with a device characteristic of the non-volatile memory can easily be selected.
    • 数据处理系统(1)具有可擦除和可编程的非易失性存储器(5)和中央处理单元(2)。 中央处理单元仅允许非易失性存储器的指定的部分存储区域(20Ba)用于软件ECC处理。 由于将ECC代码单独添加到部分存储区域并且对其进行错误校正,从而增加重写保证的数量,所以与ECC代码的配置相比,可以避免基于ECC代码的每个存储区域的基本上不必要的浪费 被添加到所有写入数据,而不管存储区域如何。 此外,由于软件处理ECC处理,可以容易地选择与非易失性存储器的设备特性相匹配的ECC校正能力。
    • 10. 发明授权
    • Semiconductor integrated circuit device, memory module and storage device
    • 半导体集成电路器件,存储器模块和存储器件
    • US06538929B2
    • 2003-03-25
    • US09987189
    • 2001-11-13
    • Mitsuru HirakiShoji Shukuri
    • Mitsuru HirakiShoji Shukuri
    • G11C1604
    • G11C7/08G11C7/20G11C7/22G11C11/406G11C11/40615G11C11/4072G11C11/4074G11C16/06G11C16/20G11C16/30G11C29/02G11C29/021G11C29/026G11C29/028G11C29/4401G11C29/50012G11C29/70G11C2029/0401G11C2029/1208
    • A semiconductor integrated circuit device is provided which includes a central processing unit, an electrically reprogrammable nonvolatile memory and a volatile memory while sharing a data bus, and utilizes stored information of the nonvolatile memory to repair a defect of the volatile memory. This volatile memory includes a volatile storage circuit for latching repair information for repairing a defective normal memory cell with a redundancy memory cell. The nonvolatile memory reads out the repair information from itself in response to an instruction to initialize the semiconductor integrated circuit device. In response to the initializing instruction, the volatile storage circuit latches the repair information from the nonvolatile memory. A fuse program circuit is not needed for the defect repair, but a defect which occurs after burn-in can be newly repaired so that the new defect can be repaired even after the packaging is formed over a circuit substrate.
    • 提供一种半导体集成电路装置,其包括中央处理单元,电可重新编程的非易失性存储器和易失性存储器,同时共享数据总线,并且利用非易失性存储器的存储信息来修复易失性存储器的缺陷。 这种易失性存储器包括一个易失性存储电路,用于锁存修复信息以用冗余存储单元修复有缺陷的正常存储单元。 非易失性存储器响应于初始化半导体集成电路器件的指令从其自身读出修复信息。 响应于初始化指令,易失性存储电路锁存来自非易失性存储器的修复信息。 缺陷修复不需要保险丝编程电路,但是可以重新修复在老化之后发生的缺陷,使得即使在电路基板上形成封装之后,也可以修复新的缺陷。