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    • 4. 发明授权
    • Image judgment device
    • 图像判断装置
    • US08503721B2
    • 2013-08-06
    • US12676987
    • 2008-12-12
    • Hiroto TomitaAkihiko Inoue
    • Hiroto TomitaAkihiko Inoue
    • G06K9/00G06K9/46
    • G06K9/00248G06T7/73G06T2207/30201
    • An image judgment device stores element characteristic information for each element of a characteristic part of a sample object and first and second positional information defining a position of each element, selects the first or the second positional information, and acquires image characteristic information for a partial image in an image frame considered as an element specified by the first positional information based on a first axis. The image judgment device also extracts image characteristic information for a partial image in an image frame considered as an element specified by the second positional information based on a second axis (which is acquired by rotating the first axis), specifies element characteristic information for an element corresponding to a position of the partial image, and judges whether the characteristic part appears in the image frame with use of the specified element characteristic information and the extracted image characteristic information.
    • 图像判断装置存储针对样本对象的特征部分的各要素的元素特征信息和定义各元素的位置的第一和第二位置信息,选择第一位置信息或第二位置信息,并获取部分图像的图像特征信息 在被认为是基于第一轴的第一位置信息指定的元素的图像帧中。 图像判断装置还基于第二轴(通过旋转第一轴获取),将被认为是由第二位置信息指定的要素的图像帧中的部分图像的图像特征信息提取出来,指定要素的元素特征信息 对应于部分图像的位置,并且使用指定的元素特征信息和提取的图像特征信息判断特征部分是否出现在图像帧中。
    • 7. 发明授权
    • Image display device
    • 图像显示装置
    • US07929000B2
    • 2011-04-19
    • US12449523
    • 2007-11-30
    • Akihiko Inoue
    • Akihiko Inoue
    • G09G5/10
    • G09G3/2081G09G3/2025G09G3/3648G09G5/00G09G2310/08G09G2320/0252G09G2320/0261G09G2320/0266G09G2320/0271G09G2340/0435G09G2340/16H04N7/014
    • In one embodiment of the present invention, a frame interpolation process circuit performs an interpolation process on a video signal in units of frames. A time-division gradation process circuit performs gradation level conversion for distributing brightness for one frame cycle to two sub-frame cycles, i.e., first and second sub-frame cycles. A gradation level change detection circuit detects whether a gradation level of each pixel has changed between consecutive sub-frames. For any pixel having its gradation level changed, an overshoot process circuit outputs, instead of an output signal of the time-division gradation process circuit, a video signal obtained by subjecting an output signal of the frame interpolation process circuit to gradation level conversion for emphasizing a temporal change of the signal. A predetermined-times higher speed process circuit may be added to this circuit configuration, or may be substituted for the frame interpolation process circuit. This makes it possible to improve moving image display performance, while making up for a lack of response speed of display elements.
    • 在本发明的一个实施例中,帧内插处理电路以帧为单位对视频信号执行插值处理。 时分灰度处理电路执行用于将一个帧周期的亮度分配到两个子帧周期即第一和第二子帧周期的灰度级转换。 灰度级变化检测电路检测每个像素的灰度级是否在连续子帧之间发生变化。 对于其灰度级改变的任何像素,过冲处理电路代替时分灰度处理电路的输出信号,输出通过对帧内插处理电路的输出信号进行灰度级转换而获得的视频信号,以强调 信号的时间变化。 可以将该预定次数的更高速度的处理电路添加到该电路配置中,或者可以替代帧内插处理电路。 这使得可以改善运动图像显示性能,同时弥补显示元件的响应速度的缺乏。
    • 8. 发明申请
    • IMAGE DISPLAY DEVICE
    • 图像显示设备
    • US20100091042A1
    • 2010-04-15
    • US12449523
    • 2007-11-30
    • Akihiko Inoue
    • Akihiko Inoue
    • G09G5/10
    • G09G3/2081G09G3/2025G09G3/3648G09G5/00G09G2310/08G09G2320/0252G09G2320/0261G09G2320/0266G09G2320/0271G09G2340/0435G09G2340/16H04N7/014
    • In one embodiment of the present invention, a frame interpolation process circuit performs an interpolation process on a video signal in units of frames. A time-division gradation process circuit performs gradation level conversion for distributing brightness for one frame cycle to two sub-frame cycles, i.e., first and second sub-frame cycles. A gradation level change detection circuit detects whether a gradation level of each pixel has changed between consecutive sub-frames. For any pixel having its gradation level changed, an overshoot process circuit outputs, instead of an output signal of the time-division gradation process circuit, a video signal obtained by subjecting an output signal of the frame interpolation process circuit to gradation level conversion for emphasizing a temporal change of the signal. A predetermined-times higher speed process circuit may be added to this circuit configuration, or may be substituted for the frame interpolation process circuit. This makes it possible to improve moving image display performance, while making up for a lack of response speed of display elements.
    • 在本发明的一个实施例中,帧内插处理电路以帧为单位对视频信号执行插值处理。 时分灰度处理电路执行用于将一个帧周期的亮度分配到两个子帧周期即第一和第二子帧周期的灰度级转换。 灰度级变化检测电路检测每个像素的灰度级是否在连续子帧之间发生变化。 对于其灰度级改变的任何像素,过冲处理电路代替时分灰度处理电路的输出信号,输出通过对帧内插处理电路的输出信号进行灰度级转换而获得的视频信号,以强调 信号的时间变化。 可以将该预定次数的更高速度的处理电路添加到该电路配置中,或者可以替代帧内插处理电路。 这使得可以改善运动图像显示性能,同时弥补显示元件的响应速度的缺乏。
    • 9. 发明授权
    • Method and apparatus for displaying halftone in a liquid crystal display
    • 用于在液晶显示器中显示半色调的方法和装置
    • US07391398B2
    • 2008-06-24
    • US10870163
    • 2004-06-18
    • Akihiko Inoue
    • Akihiko Inoue
    • G09G3/36
    • G09G3/3648G09G3/2025G09G3/2051G09G3/2055G09G3/3614G09G2310/06G09G2320/0247
    • An liquid crystal display (LCD) device uses a method for displaying halftone without causing luminance differences among pixels when an FRC technique is used, and without causing stripe-shaped luminance variations when a flicker component is eliminated spatially. The LCD device includes a data splitter, a pixel location detecting circuit, a frame number determining circuit, an applied timing memory circuit, an applied voltage determining circuit, a summation process circuit, and a timing adjusting circuit. The LCD device determines driving voltages such that for each of a high voltage or a low voltage during these 2N frames, the number of applying positive voltages is the same as the number of applying negative voltages where a unit period is 2N frames for multi-gray-level display of (1+N) levels. The LCD device can improve image quality since the average luminance of each pixel is made uniform.
    • 液晶显示器(LCD)装置使用当使用FRC技术时,不会引起像素之​​间的亮度差而显示半色调的方法,并且当在空间上消除闪烁分量时不引起条形亮度变化。 LCD装置包括数据分离器,像素位置检测电路,帧号确定电路,施加定时存储电路,施加电压确定电路,求和处理电路和定时调整电路。 LCD装置确定对于2N个帧期间的高电压或低电压的驱动电压,施加正电压的数量与施加负电压的数量相同,其中单位周期为多个灰色的2N个帧 (1 + N)级的级别显示。 由于每个像素的平均亮度均匀,因此LCD装置可以提高图像质量。
    • 10. 发明申请
    • Image Encoding Device, Image Decoding Device, and Integrated Circuit Used Therein
    • 图像编码装置,图像解码装置及其中使用的集成电路
    • US20080049832A1
    • 2008-02-28
    • US11628733
    • 2005-06-07
    • Hidekatsu OzekiMasayasu IguchiTakahiro NishiHiroaki ToidaHiroto TomitaAkihiko InoueTakashi Hashimoto
    • Hidekatsu OzekiMasayasu IguchiTakahiro NishiHiroaki ToidaHiroto TomitaAkihiko InoueTakashi Hashimoto
    • H04B1/66
    • H04N19/42H04N19/122H04N19/60
    • An image decoding device and an image encoding device according to the present invention includes an arithmetic unit for performing arithmetic processing, an arithmetic data storage unit for storing an arithmetic result by the arithmetic unit, an input selection unit for selecting whether to read pixel data that is to be inputted to the arithmetic unit from compressed image data or from pixel data stored in the arithmetic data storage unit, and inputting the read pixel data to the arithmetic unit, and an arithmetic control unit for controlling, based on a transform mode used and the number of arithmetic operations in the arithmetic unit, a destination from which the pixel data that is to be inputted to the arithmetic unit by the input selection unit is read as well as a combination of pieces of pixel data targeted for the arithmetic processing by the arithmetic unit and multiplier coefficients for the arithmetic processing, the arithmetic control unit previously defining an arithmetic procedure in each transform mode for each unit executable in one arithmetic operation in the arithmetic unit in association with the number of arithmetic operations.
    • 根据本发明的图像解码装置和图像编码装置包括:运算单元,用于进行运算处理;算术数据存储单元,用于存储运算单元的算术结果;输入选择单元,用于选择是否读取像素数据, 从压缩图像数据或从存储在算术数据存储单元中的像素数据输入到运算单元,并将读取的像素数据输入到运算单元,以及运算控制单元,用于基于所使用的变换模式和 算术单元中的算术运算的数量,由输入选择单元输入到运算单元的像素数据的目的地以及由运算单元计算的运算处理对象的像素数据的组合 算术单元和乘法器系数,运算控制单元先前定义算术 在算术单元中的一个算术运算中,每个单元的每个变换模式的过程与算术运算的数量相关联。