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1. 发明授权

US06350625B1 Optoelectronic packaging submount arrangement providing 90 degree electrical conductor turns and method of forming thereof 失效
标题翻译：提供90度电导体匝的光电包装基座装置及其形成方法
公开(公告)号：US06350625B1
公开(公告)日：2002-02-26
申请号：US09753272
申请日：2000-12-28
申请人： Mitchell S. Cohen , William K. Hogan , Sudipta K. Ray , James L. Speidell , S. Jay Chey , Steven A. Cordes
发明人： Mitchell S. Cohen , William K. Hogan , Sudipta K. Ray , James L. Speidell , S. Jay Chey , Steven A. Cordes
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L33/486 , H01L33/62 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/30107 , H01S5/02268 , H01S5/02272 , H01S5/02284 , H01S5/183
摘要： A novel optoelectronic packaging submount arrangement which incorporates a 90° C. electrical conductor turn, and more specifically methods of producing optoelectronic packaging submount arrangement incorporating 90° C. electrical conductor turns.
摘要翻译：一种新颖的光电封装基座装置，其结合了90 C.电导体转弯，更具体地说，制造了包含90 C.电导线的光电封装基座装置的方法

2. 发明授权

US06798953B1 Guides lithographically fabricated on semiconductor devices 有权
标题翻译：在半导体器件上光刻制造的引导线
公开(公告)号：US06798953B1
公开(公告)日：2004-09-28
申请号：US09479109
申请日：2000-01-07
申请人： Mitchell S. Cohen , Michael J. Cordes , Steven A. Cordes , William K. Hogan , Glen W. Johnson , Daniel M. Kuchta , Dianne L. Lacey , James L. Speidell , Jeannine M. Trewhella , Joseph P. Zinter
发明人： Mitchell S. Cohen , Michael J. Cordes , Steven A. Cordes , William K. Hogan , Glen W. Johnson , Daniel M. Kuchta , Dianne L. Lacey , James L. Speidell , Jeannine M. Trewhella , Joseph P. Zinter
IPC分类号： G02B630
CPC分类号： G02B6/4246 , G02B6/3652 , G02B6/423 , G02B6/4239
摘要： A structure that includes a substrate, typically a semiconductor chip such as a VCSEL or photodetector chip, and a guide for aligning a signal conveying device, typically an optical fiber, to a transducer such as an optoelectronic device on the semiconductor chip. The guide is formed, in a preferred embodiment, by lithographically exposing and developing a thick layer of photoresist. The structure is assembled by placing and securing the signal conveying device into a cavity-like region of the guide.
摘要翻译：包括基板，通常为诸如VCSEL或光电检测器芯片的半导体芯片的结构，以及用于将信号传送装置（通常为光纤）对准到诸如半导体芯片上的光电子装置的换能器的引导件。在优选实施例中，通过光刻曝光和显影厚的光致抗蚀剂层来形成引导件。通过将信号传送装置放置并固定到引导件的腔状区域来组装结构。

3. 发明授权

US07497366B2 Global vacuum injection molded solder system and method 失效
标题翻译：全球真空注射成型焊料系统及方法
公开(公告)号：US07497366B2
公开(公告)日：2009-03-03
申请号：US11758752
申请日：2007-06-06
申请人： S. Jay Chey , Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
发明人： S. Jay Chey , Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
IPC分类号： B23K31/02
CPC分类号： B23K3/0638 , B23K35/02 , B23K2101/40 , H01L2224/11
摘要： A system and method are provided for injection molding conductive bonding material into a plurality of cavities in a mold within a vacuum chamber. A mold and a fill head are located within a vacuum chamber, wherein the mold includes a plurality of cavities. A vacuum is created within the vacuum chamber, thereby removing air from the chamber and from the cavities. Optionally, rotational motion is provided to at least one of the mold and the fill head while the fill head is in substantial contact with the mold. Conductive bonding material is forced out of the fill head toward the mold, and into at least one of the cavities, while a vacuum is maintained in the vacuum chamber.
摘要翻译：提供了一种系统和方法，用于将导电接合材料注射到真空室内的模具中的多个空腔中。模具和填充头位于真空室内，其中模具包括多个空腔。在真空室内产生真空，从而从腔室和空腔中除去空气。可选地，当填充头与模具基本接触时，将旋转运动提供给模具和填充头中的至少一个。当在真空室中保持真空时，导电接合材料被迫从灌装头朝向模具，并进入至少一个空腔中。

4. 发明授权

US08933717B2 Probe-on-substrate 有权
公开(公告)号：US08933717B2
公开(公告)日：2015-01-13
申请号：US13528947
申请日：2012-06-21
申请人： David M. Audette , Kevin Bocash , S. Jay Chey , Steven A. Cordes , Dustin M. Fregeau
发明人： David M. Audette , Kevin Bocash , S. Jay Chey , Steven A. Cordes , Dustin M. Fregeau
IPC分类号： G01R1/067
CPC分类号： G01R1/06744 , G01R1/07314 , G01R3/00
摘要： Probes are directly patterned on a test substrate, thereby eliminating a need for an interposer. Probe contact structures are formed as a two-level structure having a greater lateral dimension for a lower level portion than for an upper level portion. First cavities are formed in a masking layer applied to a test substrate, filling the cavities with a conductive material, and planarizing the top surfaces of the conductive material portions to form lower level portions. Another masking layer is applied over the lower level portions and patterned to define second cavities having a smaller lateral dimension that the lower level portions. The second cavities are filled with at least one conductive material to form upper level portions of the probe contact structures. The upper level portion of each probe contact structure can be employed to penetrate a surface oxide of solder balls.

5. 发明授权

US09057741B2 Probe-on-substrate 有权
标题翻译：探针在衬底上
公开(公告)号：US09057741B2
公开(公告)日：2015-06-16
申请号：US13554382
申请日：2012-07-20
申请人： David M. Audette , Kevin Bocash , S. Jay Chey , Steven A. Cordes , Dustin M. Fregeau
发明人： David M. Audette , Kevin Bocash , S. Jay Chey , Steven A. Cordes , Dustin M. Fregeau
IPC分类号： G01R3/00 , G01R1/067 , G01R1/073
CPC分类号： G01R1/06744 , G01R1/07314 , G01R3/00
摘要： Probes are directly patterned on a test substrate, thereby eliminating a need for an interposer. Probe contact structures are formed as a two-level structure having a greater lateral dimension for a lower level portion than for an upper level portion. First cavities are formed in a masking layer applied to a test substrate, filling the cavities with a conductive material, and planarizing the top surfaces of the conductive material portions to form lower level portions. Another masking layer is applied over the lower level portions and patterned to define second cavities having a smaller lateral dimension that the lower level portions. The second cavities are filled with at least one conductive material to form upper level portions of the probe contact structures. The upper level portion of each probe contact structure can be employed to penetrate a surface oxide of solder balls.
摘要翻译：探针直接在测试基板上图案化，从而不需要插入器。探针接触结构形成为具有较低水平部分的较大横向尺寸的上部水平部分的两级结构。在施加到测试基板的掩模层中形成第一空腔，用导电材料填充空腔，并且平坦化导电材料部分的顶表面以形成较低的水平部分。另一掩蔽层被施加在较低层部分上并被图案化以限定具有较小横向尺寸的第二空腔，下部水平部分。第二腔被至少一个导电材料填充以形成探针接触结构的上部分。可以使用每个探针接触结构的上部部分来穿透焊球的表面氧化物。

6. 发明申请

US20130344694A1 PROBE-ON-SUBSTRATE 有权
公开(公告)号：US20130344694A1
公开(公告)日：2013-12-26
申请号：US13554382
申请日：2012-07-20
申请人： David M. Audette , Kevin Bocash , S. Jay Chey , Steven A. Cordes , Dustin M. Fregeau
发明人： David M. Audette , Kevin Bocash , S. Jay Chey , Steven A. Cordes , Dustin M. Fregeau
IPC分类号： H01L21/768
CPC分类号： G01R1/06744 , G01R1/07314 , G01R3/00
摘要： Probes are directly patterned on a test substrate, thereby eliminating a need for an interposer. Probe contact structures are formed as a two-level structure having a greater lateral dimension for a lower level portion than for an upper level portion. First cavities are formed in a masking layer applied to a test substrate, filling the cavities with a conductive material, and planarizing the top surfaces of the conductive material portions to form lower level portions. Another masking layer is applied over the lower level portions and patterned to define second cavities having a smaller lateral dimension that the lower level portions. The second cavities are filled with at least one conductive material to form upper level portions of the probe contact structures. The upper level portion of each probe contact structure can be employed to penetrate a surface oxide of solder balls.

7. 发明授权

US07784673B2 Rotational fill techniques for injection molding of solder 失效
标题翻译：用于注射成型焊料的旋转填充技术
公开(公告)号：US07784673B2
公开(公告)日：2010-08-31
申请号：US12189388
申请日：2008-08-11
申请人： Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
发明人： Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
IPC分类号： B23K31/02 , B23K37/00
CPC分类号： B23K3/0638 , B23K35/02 , B23K2101/40 , H01L2224/11
摘要： A system and method for injection molding conductive bonding material into a plurality of cavities in a non-rectangular mold is disclosed. The method comprises aligning a fill head with a non-rectangular mold. The non-rectangular mold includes a plurality of cavities. The fill head is placed in substantial contact with the non-rectangular mold. Rotational motion is provided to at least one of the non-rectangular mold and the fill head while the fill head is in substantial contact with the non-rectangular mold. Conductive bonding material is forced out of the fill head toward the non-rectangular mold. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head.
摘要翻译：公开了一种用于将导电接合材料注射成非矩形模具中的多个空腔的系统和方法。该方法包括将填充头与非矩形模具对准。非矩形模具包括多个空腔。填充头被放置成与非矩形模具基本接触。旋转运动提供给非矩形模具和填充头中的至少一个，同时填充头基本上与非矩形模具接触。将导电接合材料从填充头推向非矩形模具。导电接合材料被提供到与填充头附近的至少一个空腔同时的多个空腔的至少一个空腔中。

8. 发明申请

US20080315409A1 DIRECT EDGE CONNECTION FOR MULTI-CHIP INTEGRATED CIRCUITS 有权
标题翻译：用于多芯片集成电路的直接边缘连接
公开(公告)号：US20080315409A1
公开(公告)日：2008-12-25
申请号：US11765055
申请日：2007-06-19
申请人： Steven A. Cordes , Matthew J. Farinelli , Sherif A. Goma , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
发明人： Steven A. Cordes , Matthew J. Farinelli , Sherif A. Goma , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
IPC分类号： H01L23/48
CPC分类号： H01L21/6835 , H01L24/11 , H01L24/81 , H01L24/83 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/50 , H01L2224/0401 , H01L2224/06183 , H01L2224/11003 , H01L2224/11334 , H01L2224/13099 , H01L2224/16137 , H01L2224/16238 , H01L2224/17183 , H01L2224/81005 , H01L2224/811 , H01L2224/81191 , H01L2224/81192 , H01L2224/8121 , H01L2224/81815 , H01L2224/81986 , H01L2224/97 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01054 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1532 , H01L2924/30105 , H01L2924/3025 , H01L2924/3512 , H01L2924/00 , H01L2224/83851 , H01L2224/81
摘要： The present invention allows for direct chip-to-chip connections using the shortest possible signal path.
摘要翻译：本发明允许使用尽可能短的信号路径进行直接芯片到芯片的连接。

9. 发明申请

US20080272177A1 CONDUCTIVE BONDING MATERIAL FILL TECHNIQUES 有权
标题翻译：导电粘接材料填充技术
公开(公告)号：US20080272177A1
公开(公告)日：2008-11-06
申请号：US12173346
申请日：2008-07-15
申请人： Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
发明人： Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
IPC分类号： B23K37/06
CPC分类号： H05K3/3484 , B23K3/0607 , B23K2101/42 , H05K3/4038 , H05K2201/0305 , H05K2201/09472 , H05K2203/0126 , H05K2203/043 , H05K2203/0568
摘要： A system provides solder into cavities in a circuit supporting substrate. The system places a fill head in substantial contact with a circuit supporting substrate. The circuit supporting substrate includes at least one cavity. A linear motion or a rotational motion is provided to at least one of the circuit supporting substrate and the fill head while the fill head is in substantial contact with the circuit supporting substrate. Solder is forced out of the fill head toward the circuit supporting substrate. The solder is provided into the at least one cavity contemporaneous with the at least one cavity being in proximity to the fill head. The system brings a second circuit supporting substrate in close proximity to the circuit supporting substrate, at least one receiving pad on the second circuit supporting substrate substantially contacts the conductive bonding material of the at least one cavity.
摘要翻译：系统将焊料提供到电路支撑衬底中的空腔中。该系统使填充头与电路支撑衬底基本接触。电路支撑衬底包括至少一个空腔。当填充头与电路支撑衬底基本接触时，向电路支撑衬底和填充头中的至少一个提供直线运动或旋转运动。焊料被迫从填充头朝向电路支撑基板。焊料被提供到与填充头附近的至少一个空腔同时的至少一个空腔中。系统使第二电路支撑衬底紧靠电路支撑衬底，第二电路支撑衬底上的至少一个接收衬垫基本上接触至少一个空腔的导电接合材料。

10. 发明授权

US07410090B2 Conductive bonding material fill techniques 有权
标题翻译：导电接合材料填充技术
公开(公告)号：US07410090B2
公开(公告)日：2008-08-12
申请号：US11409244
申请日：2006-04-21
申请人： Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
发明人： Steven A. Cordes , Peter A. Gruber , John U. Knickerbocker , James L. Speidell
IPC分类号： B23K31/02
CPC分类号： H05K3/3484 , B23K3/0607 , B23K2101/42 , H05K3/4038 , H05K2201/0305 , H05K2201/09472 , H05K2203/0126 , H05K2203/043 , H05K2203/0568
摘要： A system, method, and apparatus of providing conductive bonding material into a plurality of cavities in a circuit supporting substrate is disclosed. The method comprises placing a fill head in substantial contact with a circuit supporting substrate. The circuit supporting substrate includes at least one cavity. A linear motion or a rotational motion is provided to at least one of the circuit supporting substrate and the fill head while the fill head is in substantial contact with the circuit supporting substrate. Conductive bonding material is forced out of the fill head toward the circuit supporting substrate. The conductive bonding material is provided into the at least one cavity contemporaneous with the at least one cavity being in proximity to the fill head.
摘要翻译：公开了一种在电路支撑衬底中的多个空腔中提供导电接合材料的系统，方法和装置。该方法包括将填充头放置成与电路支撑衬底基本接触。电路支撑衬底包括至少一个空腔。当填充头与电路支撑衬底基本接触时，向电路支撑衬底和填充头中的至少一个提供直线运动或旋转运动。导电接合材料被迫从填充头朝向电路支撑基板排出。所述导电接合材料被提供到与所述至少一个空腔同时的至少一个空腔中，所述至少一个空腔在所述填充头附近。

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