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    • 3. 发明授权
    • Gate signal adjustment circuit
    • 门信号调节电路
    • US09319036B2
    • 2016-04-19
    • US13112862
    • 2011-05-20
    • Shih Chang ChangTing-Kuo ChangAbbas Jamshidi RoudbariCheng-Ho Yu
    • Shih Chang ChangTing-Kuo ChangAbbas Jamshidi RoudbariCheng-Ho Yu
    • G06F3/038H03K5/12G09G3/32G09G3/36
    • H03K5/12G09G3/3266G09G3/3677G09G2330/06
    • A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
    • 公开了一种用于显示器的门信号调节电路。 门信号调整电路可以调整用于驱动数据显示的门信号的转换时间。 调整可以根据显示器的要求加快或减慢转换时间。 在一个示例中,门信号调整电路可以包括多个晶体管,其中第一组晶体管输出栅极信号,第二组晶体管输出对栅极信号的调整。 第二组晶体管可以是相同或不同的尺寸,这取决于所需数量的调节选项。 电路还可以包括耦合到第二组晶体管的控制线以控制调节输出。 门信号调整可以减少显示屏中的串扰。
    • 5. 发明授权
    • Display with multilayer and embedded signal lines
    • 显示多层和嵌入式信号线
    • US08994906B2
    • 2015-03-31
    • US13584549
    • 2012-08-13
    • Shih-Chang ChangCheng-Ho YuAbbas Jamshidi RoudbariTing-Kuo Chang
    • Shih-Chang ChangCheng-Ho YuAbbas Jamshidi RoudbariTing-Kuo Chang
    • G02F1/1345G02F1/1362
    • G02F1/13454G02F1/133528G02F1/136286G02F1/1368
    • A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.
    • 显示器可以具有带有衬底层的薄膜晶体管层。 电介质层可以形成在衬底层上,并且可以具有上表面和下表面。 薄膜晶体管层可以包括显示像素阵列。 数据线和栅极线可以向显示像素提供信号。 显示器的非活动外围部分中的栅极驱动器电路可以包括用于每个栅极线的栅极驱动器电路。 栅极驱动器电路可以包括形成在电介质层的上表面上的薄膜晶体管。 耦合在栅极驱动电路和公共电极线之间的诸如栅极低线,栅极布线线的信号线可以由两个或更多个金属层形成以减小它们的宽度,或者可以嵌入在上部的电介质层之间 和薄膜晶体管下的下表面。
    • 9. 发明申请
    • Display with Multilayer and Embedded Signal Lines
    • 显示多层和嵌入式信号线
    • US20140043552A1
    • 2014-02-13
    • US13584549
    • 2012-08-13
    • Shih-Chang ChangCheng-Ho YuAbbas Jamshidi RoudbariTing-Kuo Chang
    • Shih-Chang ChangCheng-Ho YuAbbas Jamshidi RoudbariTing-Kuo Chang
    • G02F1/136
    • G02F1/13454G02F1/133528G02F1/136286G02F1/1368
    • A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.
    • 显示器可以具有带有衬底层的薄膜晶体管层。 电介质层可以形成在衬底层上,并且可以具有上表面和下表面。 薄膜晶体管层可以包括显示像素阵列。 数据线和栅极线可以向显示像素提供信号。 显示器的非活动外围部分中的栅极驱动器电路可以包括用于每个栅极线的栅极驱动器电路。 栅极驱动器电路可以包括形成在电介质层的上表面上的薄膜晶体管。 耦合在栅极驱动电路和公共电极线之间的诸如栅极低线,栅极布线线的信号线可以由两个或更多个金属层形成以减小它们的宽度,或者可以嵌入在上部的电介质层之间 和薄膜晶体管下的下表面。
    • 10. 发明申请
    • GATE SIGNAL ADJUSTMENT CIRCUIT
    • 门信号调整电路
    • US20120293485A1
    • 2012-11-22
    • US13112862
    • 2011-05-20
    • Shih Chang ChangTing-Kuo ChangAbbas Jamshidi RoudbariCheng-Ho Yu
    • Shih Chang ChangTing-Kuo ChangAbbas Jamshidi RoudbariCheng-Ho Yu
    • G09G5/00H03K5/12
    • H03K5/12G09G3/3266G09G3/3677G09G2330/06
    • A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
    • 公开了一种用于显示器的门信号调节电路。 门信号调整电路可以调整用于驱动数据显示的门信号的转换时间。 调整可以根据显示器的要求加快或减慢转换时间。 在一个示例中,门信号调整电路可以包括多个晶体管,其中第一组晶体管输出栅极信号,第二组晶体管输出对栅极信号的调整。 第二组晶体管可以是相同或不同的尺寸,这取决于所需数量的调节选项。 电路还可以包括耦合到第二组晶体管的控制线以控制调节输出。 门信号调整可以减少显示屏中的串扰。