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1. 发明授权

US07265060B2 Bi-level resist structure and fabrication method for contact holes on semiconductor substrates 有权
标题翻译：半导体衬底上的接触孔的双层抗蚀剂结构和制造方法
公开(公告)号：US07265060B2
公开(公告)日：2007-09-04
申请号：US10889416
申请日：2004-07-12
申请人： Ming Huan Tsai , Hun Jan Tao , Tsang Jiuh Wu , Ju Wang Hsu
发明人： Ming Huan Tsai , Hun Jan Tao , Tsang Jiuh Wu , Ju Wang Hsu
IPC分类号： H01L21/302
CPC分类号： H01L21/76802 , H01L21/31116 , H01L21/31138 , H01L21/31144
摘要： An improved method of etching very small contact holes through dielectric layers used to separate conducting layers in multilevel integrated circuits formed on semiconductor substrates has been developed. The method uses bi-level ARC coatings in the resist structure and a unique combination of gaseous components in a plasma etching process which is used to dry develop the bi-level resist mask as well as etch through a silicon oxide dielectric layer. The gaseous components comprise a mixture of a fluorine containing gas, such as C4F8, C5F8, C4F6, CHF3 or similar species, an inert gas, such as helium or argon, an optional weak oxidant, such as CO or O2 or similar species, and a nitrogen source, such as N2, N2O, or NH3 or similar species. The patterned masking layer can be used to reliably etch contact holes in silicon oxide layers on semiconductor substrates, where the holes have diameters of about 0.1 micron or less.
摘要翻译：已经开发了一种通过介电层蚀刻非常小的接触孔的改进方法，其用于在半导体衬底上形成的多层集成电路中分离导电层。该方法在抗蚀剂结构中使用双层ARC涂层，并且在等离子体蚀刻工艺中使用气态组分的独特组合，其用于干燥显影双电平抗蚀剂掩模以及通过氧化硅介电层进行蚀刻。气体组分包括含氟气体的混合物，例如C 4 N 5 F 8 C 5 N 5 F 8 或类似物质，惰性气体，例如氦气或氩气，任选的弱氧化剂，例如氦气或氩气，等等。作为CO或O 2或类似物质，以及氮源，例如N 2，N 2 O或NH 3 或类似物种。图案化掩模层可用于可靠地蚀刻半导体衬底上的氧化硅层中的接触孔，其中孔的直径为约0.1微米或更小。

2. 发明授权

US06436841B1 Selectivity oxide-to-oxynitride etch process using a fluorine containing gas, an inert gas and a weak oxidant 有权
标题翻译：使用含氟气体，惰性气体和弱氧化剂的选择性氧化物 - 氧氮化物蚀刻工艺
公开(公告)号：US06436841B1
公开(公告)日：2002-08-20
申请号：US09949506
申请日：2001-09-10
申请人： Ming Huan Tsai , Bao-Ching Pen , Mei-Ru Kuo , Hun-Jan Tao
发明人： Ming Huan Tsai , Bao-Ching Pen , Mei-Ru Kuo , Hun-Jan Tao
IPC分类号： H01L21302
CPC分类号： H01L21/76897 , H01L21/31116 , H01L21/3144
摘要： A method of forming a borderless contact, comprising the following steps. A substrate having an exposed conductive structure is provided. An oxynitride etch stop layer is formed over the substrate and the exposed conductive structure. An oxide dielectric layer is formed over the oxynitride etch stop layer. The oxide dielectric layer is etched with an etch process having a high selectivity of oxide-to-oxynitride to form a contact hole therein exposing a portion of the oxynitride etch stop layer over at least a portion of the exposed conductive structure. The etch process not appreciably etching the oxynitride etch stop layer and including: a fluorine containing gas; an inert gas; and a weak oxidant. The exposed portion of the oxynitride etch stop layer over at least a portion of the conductive structure is removed. A borderless contact is formed within the contact hole. The borderless contact being in electrical connection with at least a portion of the conductive structure.
摘要翻译：一种形成无边界接触的方法，包括以下步骤。提供具有暴露的导电结构的衬底。在衬底和暴露的导电结构之上形成氮氧化物蚀刻停止层。在氧氮化物蚀刻停止层上形成氧化物介电层。用具有高选择性的氧化物 - 氮氧化物的蚀刻工艺来蚀刻氧化物介电层，以在其中形成接触孔，使暴露的导电结构的至少一部分上的氮氧化物蚀刻停止层的一部分暴露。蚀刻工艺不明显地蚀刻氧氮化物蚀刻停止层，并且包括：含氟气体; 惰性气体和弱氧化剂。除去导电结构的至少一部分上的氧氮化物蚀刻停止层的暴露部分。在接触孔内形成无边界接触。无边界接触与至少一部分导电结构电连接。

3. 发明授权

US06444566B1 Method of making borderless contact having a sion buffer layer 有权
标题翻译：制造无边界接触的方法，具有隔离缓冲层
公开(公告)号：US06444566B1
公开(公告)日：2002-09-03
申请号：US09845481
申请日：2001-04-30
申请人： Ming Huan Tsai , Jyh Huei Chen , Chu Yun Fu , Hun Jan Tao
发明人： Ming Huan Tsai , Jyh Huei Chen , Chu Yun Fu , Hun Jan Tao
IPC分类号： H01L214763
CPC分类号： H01L21/76897 , H01L21/76802 , H01L21/76832 , H01L21/76834
摘要： Borderless contacts are used in integrated circuits in order to conserve chip real estate. As part of the process for manufacturing borderless contacts, an etch-stopping layer of silicon nitride is first laid over the area that is to be contacted. Investigation has now shown that this can lead to damage to the silicon at the edges of the via. The present invention eliminates this damage by introducing a buffer layer between the silicon surface and said sidon nitride layer. Suitable materials for the buffer layer that have been found to be infective include silicon oxide and silicon oxynitride with the latter offering some ditional advantages over the former. Experimental data confirming the effectiveness of the buffer layer are provided, together with a process for its manufacture.
摘要翻译：无边界接触用于集成电路，以节省芯片的不动产。作为制造无边界接触的工艺的一部分，首先将氮化硅的蚀刻停止层铺设在要接触的区域上。现在调查显示，这可能导致在通孔边缘的硅损坏。本发明通过在硅表面和所述侧氮化物层之间引入缓冲层来消除这种损害。已经发现感染的缓冲层的合适材料包括氧化硅和氮氧化硅，后者提供了比前者更多的优点。提供确认缓冲层有效性的实验数据及其制造方法。

4. 发明授权

US06630398B2 Borderless contact with buffer layer 有权
公开(公告)号：US06630398B2
公开(公告)日：2003-10-07
申请号：US10213588
申请日：2002-08-07
申请人： Ming Huan Tsai , Jyh Huei Chen , Chu Yun Fu , Hun Jan Tao
发明人： Ming Huan Tsai , Jyh Huei Chen , Chu Yun Fu , Hun Jan Tao
IPC分类号： H01L214763
CPC分类号： H01L21/76897 , H01L21/76802 , H01L21/76832 , H01L21/76834
摘要： Borderless contacts are used in integrated circuits in order to conserve chip real estate. As part of the process for manufacturing borderless contacts, an etch-stopping layer of silicon nitride is first laid over the area that is to be contacted Investigation has now shown that this can lead to damage to the silicon at the edges of the via. The present invention eliminates this damage by introducing a buffer layer between the silicon surface and said silicon nitride layer. Suitable materials for the buffer layer that have been found to be effective include silicon oxide and silicon oxynitride with the latter offering some additional advantages over the former. Experimental data confirming the effectiveness of the buffer layer are provided, together with a process for its manufacture.

5. 发明授权

US07265056B2 Method for forming novel BARC open for precision critical dimension control 有权
标题翻译：用于形成用于精密关键尺寸控制的新型BARC开口的方法
公开(公告)号：US07265056B2
公开(公告)日：2007-09-04
申请号：US10754178
申请日：2004-01-09
申请人： Ming Huan Tsai , Ru Chian Chiang , Hun Jan Tao
发明人： Ming Huan Tsai , Ru Chian Chiang , Hun Jan Tao
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76802 , H01L21/0276 , H01L21/31116 , H01L21/76807 , H01L2221/1063
摘要： A method for forming an opening in a semiconductor device is provided. In one embodiment, a bottom anti-reflective coating (BARC) layer is formed overlying an insulation layer of a substrate. A patterned photoresist layer including at least one opening therein is formed overlying the BARC layer. The BARC layer and the insulation layer are etched by employing the patterned photoresist layer as a mask in a process comprising: positioning the semiconductor device into a chamber and introducing a first gas including fluorocarbon gas for etching and polymer formation; introducing into the chamber a second gas containing oxygen for polymer formation control; partial etching the BARC layer defined by the at least one opening and subsequently forming a polymer layer on the inside of the at least one opening; repeating the step of partial etching and polymer formation to form the at least one opening in the BARC layer; and continuing the step of partial etching and polymer formation to form the at least one opening in the insulation layer.
摘要翻译：提供了一种在半导体器件中形成开口的方法。在一个实施例中，形成覆盖衬底的绝缘层的底部抗反射涂层（BARC）层。在BARC层上形成包含至少一个开口的图案化光致抗蚀剂层。通过使用图案化的光致抗蚀剂层作为掩模来蚀刻BARC层和绝缘层，该方法包括：将半导体器件定位在室中并引入包含碳氟化合物气体的第一气体用于蚀刻和聚合物形成; 将含有氧的第二气体引入室中以进行聚合物形成控制; 部分蚀刻由至少一个开口限定的BARC层，随后在该至少一个开口的内侧形成聚合物层; 重复部分蚀刻和聚合物形成步骤以形成BARC层中的至少一个开口; 并且继续部分蚀刻和聚合物形成的步骤以在绝缘层中形成至少一个开口。

6. 发明授权

US07067235B2 Bi-layer photoresist dry development and reactive ion etch method 失效
公开(公告)号：US07067235B2
公开(公告)日：2006-06-27
申请号：US10050322
申请日：2002-01-15
申请人： Ming Huan Tsai , Hun-Jan Tao
发明人： Ming Huan Tsai , Hun-Jan Tao
IPC分类号： G03F7/00 , G03F7/36
CPC分类号： G03F7/095 , G03F7/0758 , G03F7/168 , G03F7/36 , G03F7/405
摘要： A method for semiconductor device feature development using a bi-layer photoresist including providing a non-silicon containing photoresist layer over a substrate; providing a silicon containing photoresist layer over the non-silicon containing photoresist layer; exposing an exposure surface of the silicon containing photoresist layer to an activating light source said exposure surface defined by an overlying pattern according to a photolithographic process; developing the silicon containing photoresist layer according to a photolithographic process to reveal a portion the non-silicon containing photoresist layer; and, dry developing said non-silicon containing photoresist layer in a plasma reactor by igniting a plasma from an ambient mixture including at least nitrogen and oxygen.

7. 发明授权

US06720132B2 Bi-layer photoresist dry development and reactive ion etch method 失效
标题翻译：双层光致抗蚀剂干式显影和反应离子蚀刻方法
公开(公告)号：US06720132B2
公开(公告)日：2004-04-13
申请号：US10043015
申请日：2002-01-08
申请人： Ming Huan Tsai , Hun-Jan Tao
发明人： Ming Huan Tsai , Hun-Jan Tao
IPC分类号： G03F736
CPC分类号： G03F7/265 , G03F7/075 , G03F7/094 , G03F7/36
摘要： A method for semiconductor device feature development using a bi-layer photoresist including providing a non-silicon containing photoresist layer over a substrate; providing a silicon containing photoresist layer over the non-silicon containing photoresist layer; exposing an exposure surface of the silicon containing photoresist layer to an activating light source said exposure surface defined by an overlying pattern according to a photolithographic process; developing the silicon containing photoresist layer according to a photolithographic process to reveal a portion the non-silicon containing photoresist layer; and, dry developing said non-silicon containing photoresist layer in a plasma reactor by igniting a plasma from an ambient mixture including at least hydrogen and carbon monoxide.
摘要翻译：一种使用双层光致抗蚀剂的半导体器件特征显影的方法，包括在衬底上提供不含硅的光致抗蚀剂层; 在含硅光致抗蚀剂层之上提供含硅光致抗蚀剂层; 将含硅光致抗蚀剂层的曝光表面暴露于根据光刻工艺由覆盖图案限定的所述曝光表面的激活光源; 根据光刻工艺显影含硅光致抗蚀剂层以露出不含硅光致抗蚀剂层的部分; 以及通过从包括至少氢和一氧化碳的环境混合物点燃等离子体，在等离子体反应器中干燥显影所述不含硅的光致抗蚀剂层。

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