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1. 发明授权

US06946711B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06946711B2
公开(公告)日：2005-09-20
申请号：US10164314
申请日：2002-06-07
申请人： Mikimasa Suzuki , Shoji Miura , Akira Kuroyanagi , Noriyuki Iwamori , Takashi Suzuki
发明人： Mikimasa Suzuki , Shoji Miura , Akira Kuroyanagi , Noriyuki Iwamori , Takashi Suzuki
IPC分类号： H01L21/02 , H01L21/18 , H01L21/265 , H01L21/322 , H01L21/336 , H01L27/12 , H01L29/78 , H01L29/786 , H01L29/76
CPC分类号： H01L29/7802 , H01L21/187 , H01L21/263 , H01L21/26506 , H01L21/26566 , H01L21/2658 , H01L21/3221 , H01L21/3226 , H01L29/66712 , H01L29/7805 , Y10S257/913
摘要： In a semiconductor device such as MOSFET, a single crystal semiconductor substrate is provided. An epitaxitial layer is formed on the single crystal semiconductor substrate. A p-well regions are formed on the epitaxitial layer, respectively, and n+ source regions are formed on the p-well regions, respectively. A gate electrode is formed through a gate insulation film on a part of each p-well region and that of each n+ source region. The gate electrode is covered with an insulation film. On the insulation film, a source electrode is formed so that the n-channel MOSFET includes body diodes BD imbedded therein. A drain electrode is formed on the single crystal semiconductor substrate. A cluster-containing layer is implanted in the single crystal semiconductor substrate as a gettering layer so that the cluster-containing layer contains a cluster of nitrogen.
摘要翻译：在诸如MOSFET的半导体器件中，提供单晶半导体衬底。在单晶半导体衬底上形成上覆层。分别在外延层上形成p阱区，并且在p阱区上分别形成n + +源区。在每个p阱区域和每个n +源极区域的一部分上通过栅极绝缘膜形成栅电极。栅电极被绝缘膜覆盖。在绝缘膜上形成源电极，使得n沟道MOSFET包括嵌入其中的体二极管BD。在单晶半导体基板上形成漏电极。将含有簇的层植入单晶半导体衬底中作为吸杂层，使得含簇层含有氮簇。

2. 发明授权

US06972459B2 Metal oxide semiconductor transistor having a nitrogen cluster containing layer embedded in the substrate 失效
标题翻译：金属氧化物半导体晶体管，其具有嵌入到基板中的含氮簇的层
公开(公告)号：US06972459B2
公开(公告)日：2005-12-06
申请号：US10164313
申请日：2002-06-07
申请人： Shoji Miura , Mikimasa Suzuki , Akira Kuroyanagi , Yoshitaka Nakano
发明人： Shoji Miura , Mikimasa Suzuki , Akira Kuroyanagi , Yoshitaka Nakano
IPC分类号： H01L21/336 , H01L29/06 , H01L29/32 , H01L29/78 , H01L29/94
CPC分类号： H01L29/7813 , H01L29/32 , H01L29/7811 , H01L2924/0002 , H01L2924/00
摘要： A drift layer is formed on a substrate. A base region is formed on the drift layer. A plurality of source regions are formed in a surficial layer of the base region. A plurality of gate electrodes face to the base region and the source region via a gate insulating film. A source electrode is brought into contact with the base region and the source region. A nitrogen cluster containing layer is embedded in the drift layer so as to extend laterally under the base region so that at least part of the drift region is left under the nitrogen cluster containing layer.
摘要翻译：在基板上形成漂移层。在漂移层上形成基极区域。多个源极区域形成在基极区域的表面层中。多个栅电极经由栅极绝缘膜与基极区域和源极区域面对。源电极与基极区域和源极区域接触。含氮簇层包含在漂移层中，以在基底区域横向延伸，使得漂移区的至少一部分留在含氮簇层的下方。

3. 发明授权

US06809348B1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06809348B1
公开(公告)日：2004-10-26
申请号：US09675209
申请日：2000-09-29
申请人： Mikimasa Suzuki , Akira Kuroyanagi , Takeshi Miyajima , Shoji Miura , Yutaka Tomatsu , Fuminari Suzuki
发明人： Mikimasa Suzuki , Akira Kuroyanagi , Takeshi Miyajima , Shoji Miura , Yutaka Tomatsu , Fuminari Suzuki
IPC分类号： H01L2974
CPC分类号： H01L29/0696 , H01L23/4334 , H01L24/06 , H01L24/48 , H01L24/49 , H01L27/0207 , H01L29/7397 , H01L29/7813 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/4813 , H01L2224/48247 , H01L2224/4846 , H01L2224/49113 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/0106 , H01L2924/01074 , H01L2924/014 , H01L2924/10162 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2224/45099 , H01L2924/00
摘要： A semiconductor device has a semiconductor substrate, several cell blocks provided on the semiconductor substrate, several gate electrodes electrically independent of one another and respectively provided in the cell blocks, and several gate pads respectively connected with the gate electrodes. In this construction, the cell blocks can be determined whether they are defective or not by utilizing the gate pads easily. Therefore, the semiconductor device can be operated only with non-defective cell blocks.
摘要翻译：半导体器件具有半导体衬底，设置在半导体衬底上的几个单元块，彼此电独立且分别设置在单元块中的几个栅极电极以及分别与栅电极连接的多个栅极焊盘。在这种结构中，可以容易地利用栅极焊盘来确定电池块是否有缺陷。因此，半导体器件可以仅用无缺陷单元块操作。

4. 发明授权

US06864532B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06864532B2
公开(公告)日：2005-03-08
申请号：US10175294
申请日：2002-06-20
申请人： Takaaki Aoki , Akira Kuroyanagi , Mikimasa Suzuki , Takafumi Arakawa , Yukio Tsuzuki
发明人： Takaaki Aoki , Akira Kuroyanagi , Mikimasa Suzuki , Takafumi Arakawa , Yukio Tsuzuki
IPC分类号： H01L21/28 , H01L21/331 , H01L21/336 , H01L29/423 , H01L29/51 , H01L29/739 , H01L29/78 , H01L29/788
CPC分类号： H01L29/7813 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L29/42368 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/66348 , H01L29/7397
摘要： A trench-gate type transistor has a gate insulating film formed on an inner wall of a trench. The gate insulating film includes a first portion located on a wall of the trench and a second portion located on upper and bottom portions of the trench. The first portion includes a first oxide film, a nitride film, and a second oxide film. The second portion includes only an oxide film and is thicker than the first portion. Accordingly, electric field concentration on upper and lower corner portions of the trench can be reduced to improve the withstand voltage. In addition, and end of the trench may have an insulation layer that is thicker than the first portion.
摘要翻译：沟槽栅型晶体管具有形成在沟槽的内壁上的栅极绝缘膜。栅极绝缘膜包括位于沟槽的壁上的第一部分和位于沟槽的上部和底部的第二部分。第一部分包括第一氧化膜，氮化物膜和第二氧化物膜。第二部分仅包括氧化膜并且比第一部分厚。因此，可以减小沟槽的上下角部的电场集中以提高耐压。此外，沟槽的端部可以具有比第一部分更厚的绝缘层。

5. 发明授权

US07354829B2 Trench-gate transistor with ono gate dielectric and fabrication process therefor 有权
标题翻译：具有栅极电介质的沟槽栅晶体管及其制造工艺
公开(公告)号：US07354829B2
公开(公告)日：2008-04-08
申请号：US10974838
申请日：2004-10-28
申请人： Takaaki Aoki , Yutaka Tomatsu , Akira Kuroyanagi , Mikimasa Suzuki , Hajime Soga
发明人： Takaaki Aoki , Yutaka Tomatsu , Akira Kuroyanagi , Mikimasa Suzuki , Hajime Soga
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L29/42368 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/66348 , H01L29/7397
摘要： A trench-gate type transistor has a gate insulating film formed on an inner wall of a trench. The gate insulating film includes a first portion located on a wall of the trench and a second portion located on upper and bottom portions of the trench. The first portion includes a first oxide film, a nitride film, and a second oxide film. The second portion includes only an oxide film and is thicker than the first portion. Accordingly, electric field concentration on upper and lower corner portions of the trench can be reduced to improve the withstand voltage. In addition, and end of the trench may have an insulation layer that is thicker than the first portion.
摘要翻译：沟槽栅型晶体管具有形成在沟槽的内壁上的栅极绝缘膜。栅极绝缘膜包括位于沟槽的壁上的第一部分和位于沟槽的上部和底部的第二部分。第一部分包括第一氧化膜，氮化物膜和第二氧化物膜。第二部分仅包括氧化膜并且比第一部分厚。因此，可以减小沟槽的上下角部的电场集中以提高耐压。此外，沟槽的端部可以具有比第一部分更厚的绝缘层。

6. 发明申请

US20050090060A1 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20050090060A1
公开(公告)日：2005-04-28
申请号：US10974838
申请日：2004-10-28
申请人： Takaaki Aoki , Yutaka Tomatsu , Akira Kuroyanagi , Mikimasa Suzuki , Hajime Soga , Takafumi Arakawa , Yukio Tsuzuki
发明人： Takaaki Aoki , Yutaka Tomatsu , Akira Kuroyanagi , Mikimasa Suzuki , Hajime Soga , Takafumi Arakawa , Yukio Tsuzuki
IPC分类号： H01L21/28 , H01L21/331 , H01L21/336 , H01L29/423 , H01L29/51 , H01L29/739 , H01L29/78
CPC分类号： H01L29/7813 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L29/42368 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/66348 , H01L29/7397
摘要： A trench-gate type transistor has a gate insulating film formed on an inner wall of a trench. The gate insulating film includes a first portion located on a wall of the trench and a second portion located on upper and bottom portions of the trench. The first portion includes a first oxide film, a nitride film, and a second oxide film. The second portion includes only an oxide film and is thicker than the first portion. Accordingly, electric field concentration on upper and lower corner portions of the trench can be reduced to improve the withstand voltage. In addition, and end of the trench may have an insulation layer that is thicker than the first portion.
摘要翻译：沟槽栅型晶体管具有形成在沟槽的内壁上的栅极绝缘膜。栅极绝缘膜包括位于沟槽的壁上的第一部分和位于沟槽的上部和底部的第二部分。第一部分包括第一氧化膜，氮化物膜和第二氧化物膜。第二部分仅包括氧化膜并且比第一部分厚。因此，可以减小沟槽的上下角部的电场集中以提高耐压。此外，沟槽的端部可以具有比第一部分更厚的绝缘层。

7. 发明授权

US06469345B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06469345B2
公开(公告)日：2002-10-22
申请号：US09758377
申请日：2001-01-12
申请人： Takaaki Aoki , Yutaka Tomatsu , Akira Kuroyanagi , Mikimasa Suzuki , Hajime Soga
发明人： Takaaki Aoki , Yutaka Tomatsu , Akira Kuroyanagi , Mikimasa Suzuki , Hajime Soga
IPC分类号： H01L2976
CPC分类号： H01L29/7813 , H01L21/28202 , H01L29/42368 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/66348 , H01L29/7397
摘要： A trench-gate type transistor has a gate insulating film formed on an inner wall of a trench. The gate insulating film is composed of a first portion disposed on a side wall portion of the trench and a second portion disposed on upper and bottom portions of the trench. The first portion is composed of a first oxide film, a nitride film, and a second oxide film. The second portion is composed of only an oxide film and has a thickness thicker than that of the first portion. Accordingly, electric field concentration on upper and lower corner portions of the trench can be mitigated, and a decrease in withstand voltage at that portions can be prevented.
摘要翻译：沟槽栅型晶体管具有形成在沟槽的内壁上的栅极绝缘膜。栅极绝缘膜由设置在沟槽的侧壁部分上的第一部分和设置在沟槽的上部和底部的第二部分组成。第一部分由第一氧化物膜，氮化物膜和第二氧化物膜组成。第二部分仅由氧化膜构成，其厚度比第一部分厚。因此，可以减轻沟槽上下角部的电场集中，能够防止该部分的耐电压降低。

8. 发明授权

US07586151B2 Insulated gate semiconductor device 有权
标题翻译：绝缘栅半导体器件
公开(公告)号：US07586151B2
公开(公告)日：2009-09-08
申请号：US11578949
申请日：2005-05-11
申请人： Hidefumi Takaya , Yasushi Okura , Akira Kuroyanagi , Norihito Tokura
发明人： Hidefumi Takaya , Yasushi Okura , Akira Kuroyanagi , Norihito Tokura
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0623 , H01L29/0653 , H01L29/42368 , H01L29/4238 , H01L29/7811
摘要： The present invention provides an insulated gate semiconductor device which has floating regions around the bottoms of trenches and which is capable of reliably achieving a high withstand voltage. An insulated gate semiconductor device 100 includes a cell area through which current flows and an terminal area which surrounds the cell area. The semiconductor device 100 also has a plurality of gate trenches 21 in the cell area and a plurality of terminal trenches 62 in the terminal area. The gate trenches 21 are formed in a striped shape, and the terminal trenches 62 are formed concentrically. In the semiconductor device 100, the gate trenches 21 and the terminal trenches 62 are positioned in a manner that spacings between the ends of the gate trenches 21 and the side of the terminal trench 62 are uniform. That is, the length of the gate trenches 21 is adjusted according to the curvature of the corners of the terminal trench 62.
摘要翻译：本发明提供了一种绝缘栅半导体器件，其在沟槽底部附近具有浮动区域，并且能够可靠地实现高耐压。绝缘栅半导体器件100包括电流流过的单元区域和围绕单元区域的端子区域。半导体器件100还在单元区域中具有多个栅极沟槽21以及端子区域中的多个端子沟槽62。栅极沟槽21形成为条状，并且端子沟槽62同心地形成。在半导体器件100中，栅极沟槽21和端子沟槽62以栅极沟槽21的端部和端子沟槽62的侧面之间的间隔均匀的方式定位。也就是说，栅极沟槽21的长度根据端子沟槽62的拐角的曲率来调节。

9. 发明申请

US20050202117A1 Method of manufacturing resin molding and change-over device for changing over between heating medium and resin material in process of secondary forming 失效
标题翻译：在二次成型过程中制造树脂成型方法和切换装置，用于在加热介质和树脂材料之间切换
公开(公告)号：US20050202117A1
公开(公告)日：2005-09-15
申请号：US11079260
申请日：2005-03-14
申请人： Hidehisa Nasu , Akira Kuroyanagi , Masato Ichikawa , Akira Sahashi
发明人： Hidehisa Nasu , Akira Kuroyanagi , Masato Ichikawa , Akira Sahashi
IPC分类号： B29C45/26 , B29C45/00 , B29C45/14 , B29C45/72 , B29C65/70 , B29L23/00
CPC分类号： B29C45/0062 , B29C45/7207 , B29C65/103 , B29C65/42 , B29C65/542 , B29C66/0242 , B29C66/1312 , B29C66/547 , B29C2045/14877
摘要： The device includes: a runner block arranged at a position close to the injection port for resin material for secondary forming; and a slide core moved relatively with the runner block. In the runner block, a guide passage is formed which is communicated with a passage formed when pipe-shaped passages of the primary moldings are butted against each other. A heating medium passage or a resin material passage formed in the slide core are moved so that either the heating medium passage or the resin material passage can be selectively communicated with the guide passage formed in the runner block.
摘要翻译：该装置包括：设置在靠近用于二次成型的树脂材料的注入口的位置处的流道块; 并且滑块与滑块相对移动。在流道块中，形成一个引导通道，该引导通道与一次模制品的管状通道彼此对接时形成的通道连通。移动形成在滑动芯体中的加热介质通道或树脂材料通道，使得加热介质通道或树脂材料通道可以与形成在流道块中的引导通道选择性地连通。

10. 发明授权

US06373093B1 Semiconductor memory device and method of manufacturing the same 有权
公开(公告)号：US06373093B1
公开(公告)日：2002-04-16
申请号：US09776769
申请日：2001-02-06
申请人： Tetsuo Fujii , Minekazu Sakai , Akira Kuroyanagi
发明人： Tetsuo Fujii , Minekazu Sakai , Akira Kuroyanagi
IPC分类号： H01L2976
摘要： A gate oxide film is formed on a surface of a semiconductor substrate. A tunnel insulating film having a thickness smaller than that of the gate insulating film is formed in a portion thereof corresponding to a tunnel region. A first silicon film having a low impurity concentration is formed on the gate insulating film. A second silicon film having an impurity concentration higher than that of the first silicon film is formed on the first silicon film so as to be connected thereto. A third silicon film is formed on the second silicon film through an insulating film. The second and third silicon films are formed into floating and control gates, respectively, thereby forming a semiconductor memory device.

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