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    • 2. 发明授权
    • Sensor terminal
    • 传感器端子
    • US09496954B2
    • 2016-11-15
    • US14239588
    • 2011-09-06
    • Miki HayakawaNorio OhkuboYoshihiro Wakisaka
    • Miki HayakawaNorio OhkuboYoshihiro Wakisaka
    • H04B10/114
    • H04B10/1143
    • According to an embodiment of the preset invention, in a sensor terminal that is worn by a person, and detects that respective wearers face each other by the aid of an optical communication, a plurality of optical transmit/receive units each having at least one of a transmission unit that emits the light to transmit data, and a reception unit that receives the light to receive the data is arranged within the housing, and the plurality of optical transmit/receive units is arranged so that light emission axes of the transmission units, or extension lines of light detection axes of the reception units approaches each other.
    • 根据本发明的实施例,在由人佩戴的传感器终端中,借助于光通信来检测相应的佩戴者彼此面对的多个光发射/接收单元,每个光发射/接收单元各自具有 发射光发送数据的发送单元和接收数据接收光的接收单元配置在壳体内,多个光发送接收单元被配置为使发送单元的发光轴, 或接收单元的光检测轴的延长线彼此接近。
    • 3. 发明申请
    • Sensor node
    • 传感器节点
    • US20080297373A1
    • 2008-12-04
    • US12153689
    • 2008-05-22
    • Miki HayakawaNorihiko MoriwakiKazuo YanoSatomi TsujiNorio Ohkubo
    • Miki HayakawaNorihiko MoriwakiKazuo YanoSatomi TsujiNorio Ohkubo
    • G08C19/16
    • H04Q9/00H04Q2209/40H04Q2209/845H04Q2209/88
    • There is disclosed a sensor node capable of transmitting and receiving a large amount of data or data desired to be reliable without missing data, while preventing battery exhaustion and unnecessary compression of the transmission bandwidth. A name-tag type sensor node includes a detector for detecting connection of an external power supply. When the detector detects that the external power is supplied, the name-tag type sensor node transmits and receives a large amount of data, such as bulk transmission data, at an increased frequency by means of a data selector, a communication timing controller, and a wireless communication controller. Alternatively, the name-tag type sensor node transmits and receives the data desired to be reliable, such as rewriting data of firmware.
    • 公开了一种能够发送和接收大量数据或数据的传感器节点,而不会丢失数据,同时防止电池耗尽和传输带宽的不必要的压缩。 名称标签型传感器节点包括用于检测外部电源的连接的检测器。 当检测器检测到外部电源被提供时,名称标签类型传感器节点通过数据选择器,通信定时控制器以及增加的频率,以增加的频率发送和接收大量数据,例如批量传输数据 无线通信控制器。 或者,名称标签类型传感器节点发送和接收希望可靠的数据,例如重写固件的数据。
    • 4. 发明授权
    • Sensor node
    • 传感器节点
    • US08138945B2
    • 2012-03-20
    • US12153689
    • 2008-05-22
    • Miki HayakawaNorihiko MoriwakiKazuo YanoSatomi TsujiNorio Ohkubo
    • Miki HayakawaNorihiko MoriwakiKazuo YanoSatomi TsujiNorio Ohkubo
    • G08C19/04
    • H04Q9/00H04Q2209/40H04Q2209/845H04Q2209/88
    • There is disclosed a sensor node capable of transmitting and receiving a large amount of data or data desired to be reliable without missing data, while preventing battery exhaustion and unnecessary compression of the transmission bandwidth. A name-tag type sensor node includes a detector for detecting connection of an external power supply. When the detector detects that the external power is supplied, the name-tag type sensor node transmits and receives a large amount of data, such as bulk transmission data, at an increased frequency by means of a data selector, a communication timing controller, and a wireless communication controller. Alternatively, the name-tag type sensor node transmits and receives the data desired to be reliable, such as rewriting data of firmware.
    • 公开了一种能够发送和接收大量数据或数据的传感器节点,而不会丢失数据,同时防止电池耗尽和传输带宽的不必要的压缩。 名称标签型传感器节点包括用于检测外部电源的连接的检测器。 当检测器检测到外部电源被提供时,名称标签类型传感器节点通过数据选择器,通信定时控制器以及增加的频率,以增加的频率发送和接收大量数据,例如批量传输数据 无线通信控制器。 或者,名称标签类型传感器节点发送和接收希望可靠的数据,例如重写固件的数据。
    • 6. 发明授权
    • Information processing device
    • 信息处理装置
    • US08484448B2
    • 2013-07-09
    • US13399023
    • 2012-02-17
    • Motokazu OzawaNaohiko IrieSaneaki TamakiHisayoshi IdeMiki Hayakawa
    • Motokazu OzawaNaohiko IrieSaneaki TamakiHisayoshi IdeMiki Hayakawa
    • G06F9/00G06F15/177
    • G06F1/3203G06F1/3243G06F1/3287Y02D10/152Y02D10/171Y02D50/20
    • Information processing system including a first and a second operation mode with operating current lower than the first, a register holding an address of an instruction executed by a processing unit first when a boot address register returns from second to first operation mode, wherein the address is output to the processing unit when second to first operation mode shifting, wherein the boot address register is rewritable, an information holding circuit holding a value of a peripheral circuit module register, wherein the information holding circuit holds, in the second operation mode, information about the peripheral circuit module register, and, transfers information held in the information holding circuit to the peripheral circuit module register regarding a second-to-first operation mode shift, and wherein when an interrupt request is posted from outside the system in the second operation mode, the information processing system performs interrupt processing corresponding to the interrupt request.
    • 信息处理系统,包括具有低于第一操作电流的第一操作模式和第二操作模式,当引导地址寄存器从第二操作模式返回到第一操作模式时,首先保存由处理单元执行的指令的地址的寄存器,其中该地址为 当第二至第一操作模式转换时,输出到处理单元,其中引导地址寄存器是可重写的,信息保持电路保持外围电路模块寄存器的值,其中信息保持电路在第二操作模式中保持关于 外围电路模块寄存器,并且将关于第二至第一操作模式移位的信息保持电路中保存的信息传送到外围电路模块寄存器,并且其中当在第二操作模式中从系统外部发布中断请求时 信息处理系统执行与内部相对应的中断处理 破产请求
    • 7. 发明申请
    • INFORMATION PROCESSING DEVICE
    • 信息处理设备
    • US20120151197A1
    • 2012-06-14
    • US13399023
    • 2012-02-17
    • Motokazu OzawaNaohiko IrieSaneaki TamakiHisayoshi IdeMiki Hayakawa
    • Motokazu OzawaNaohiko IrieSaneaki TamakiHisayoshi IdeMiki Hayakawa
    • G06F9/00
    • G06F1/3203G06F1/3243G06F1/3287Y02D10/152Y02D10/171Y02D50/20
    • Information processing system including a first and a second operation mode with operating current lower than the first, a register holding an address of an instruction executed by a processing unit first when a boot address register returns from second to first operation mode, wherein the address is output to the processing unit when second to first operation mode shifting, wherein the boot address register is rewritable, an information holding circuit holding a value of a peripheral circuit module register, wherein the information holding circuit holds, in the second operation mode, information about the peripheral circuit module register, and, transfers information held in the information holding circuit to the peripheral circuit module register regarding a second-to-first operation mode shift, and wherein when an interrupt request is posted from outside the system in the second operation mode, the information processing system performs interrupt processing corresponding to the interrupt request.
    • 信息处理系统,包括具有低于第一操作电流的第一操作模式和第二操作模式,当引导地址寄存器从第二操作模式返回到第一操作模式时,首先保存由处理单元执行的指令的地址的寄存器,其中该地址为 当第二至第一操作模式转换时,输出到处理单元,其中引导地址寄存器是可重写的,信息保持电路保持外围电路模块寄存器的值,其中信息保持电路在第二操作模式中保持关于 外围电路模块寄存器,并且将关于第二至第一操作模式移位的信息保持电路中保存的信息传送到外围电路模块寄存器,并且其中当在第二操作模式中从系统外部发布中断请求时 信息处理系统执行与内部相对应的中断处理 破产请求
    • 8. 发明授权
    • Information processing device
    • 信息处理装置
    • US07380149B2
    • 2008-05-27
    • US10849063
    • 2004-05-20
    • Motokazu OzawaNaohiko IrieSaneaki TamakiHisayoshi IdeMiki Hayakawa
    • Motokazu OzawaNaohiko IrieSaneaki TamakiHisayoshi IdeMiki Hayakawa
    • G06F1/26G06F1/24G06F1/32G06F1/04
    • G06F1/3203G06F1/3243G06F1/3287Y02D10/152Y02D10/171Y02D50/20
    • A mechanism of making a low standby current caused by power off compatible with a fast return operation from a standby caused by an interrupt is realized. An information processing device has a first area that includes a central processing unit and peripheral circuit modules, a second area having information holding circuits for holding values of registers contained in the peripheral circuit modules, and a first power switch for controlling supply of a current to the first area. When the information processing device operates in a first mode, an operating current is supplied to the first area and the second area. When the information processing device operates in a second mode, the first power switch is controlled so that the supply of the current to the first area can be shut off, and the supply of the current to the second area is continued.
    • 实现了由与中断引起的来自待机的快速返回操作兼容的断电引起的低待机电流的机制。 信息处理装置具有包括中央处理单元和外围电路模块的第一区域,具有用于保持包含在外围电路模块中的寄存器的值的信息保持电路的第二区域和用于控制向外部电路提供电流的第一电源开关 第一个区域。 当信息处理装置以第一模式操作时,工作电流被提供给第一区域和第二区域。 当信息处理装置在第二模式下操作时,控制第一电源开关,使得可以切断对第一区域的电流的供应,并且继续向第二区域供应电流。