专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06734568B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06734568B2
公开(公告)日：2004-05-11
申请号：US10228081
申请日：2002-08-27
申请人： Mie Matsuo , Masahiro Miyata , Hirokazu Ezawa
发明人： Mie Matsuo , Masahiro Miyata , Hirokazu Ezawa
IPC分类号： H01L2348
CPC分类号： H01L24/12 , H01L21/486 , H01L23/147 , H01L23/481 , H01L23/49827 , H01L24/11 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/75 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/02126 , H01L2224/0401 , H01L2224/05027 , H01L2224/05546 , H01L2224/05557 , H01L2224/05558 , H01L2224/05572 , H01L2224/10126 , H01L2224/1147 , H01L2224/13022 , H01L2224/131 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48799 , H01L2224/73204 , H01L2224/75 , H01L2224/7565 , H01L2224/75745 , H01L2224/75753 , H01L2224/81201 , H01L2224/81205 , H01L2224/81801 , H01L2224/81895 , H01L2224/8191 , H01L2224/81948 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04953 , H01L2924/09701 , H01L2924/10253 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2224/13099 , H01L2924/00 , H01L2224/05552 , H01L2224/05599
摘要： A semiconductor device comprises an electrode formed above a substrate, an under bump metal (UBM) film on the electrode, the under bump metal film being in the shape of a recess, and a bump electrode embedded in the under bump metal film, the bump electrode having sides and bottom thereof surrounded by the under bump metal film.
摘要翻译：半导体器件包括形成在衬底上的电极，电极上的凸块下金属（UBM）膜，凹凸金属膜呈凹陷形状，以及嵌入在凸块下金属膜中的凸块电极，凸块电极的侧面和底部被下凸块金属膜包围。

2. 发明申请

US20110024901A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US20110024901A1
公开(公告)日：2011-02-03
申请号：US12845937
申请日：2010-07-29
申请人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
发明人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
IPC分类号： H01L23/52 , H01L21/283
CPC分类号： H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L2224/02311 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05548 , H01L2224/05569 , H01L2224/05571 , H01L2224/05572 , H01L2224/05666 , H01L2224/0603 , H01L2224/06051 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13083 , H01L2224/13099 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/45144 , H01L2224/48666 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/81191 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552 , H01L2224/45015 , H01L2924/207
摘要： According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.
摘要翻译：根据一个实施例，半导体器件的制造方法如下。通过改变在其上设置有第一导电层的电极端子的基板上的感光性树脂膜，形成具有第一开口和到达电极端子的第二开口的电介质层。接下来，在包括第一开口的内部的电介质层上形成与电极端子电连接的第二导电层，以及具有与氧化还原电位不同的氧化还原电位的第三导电层第一导电层小于在第二导电层上形成第一导电层和第二导电层之间的氧化还原电位的差异。接下来，通过改变感光性树脂膜形成具有到达第三导电层的第三开口的电介质层和通过第二开口到达电极端子的第四开口，并且形成与第三导电层电连接的凸块。

3. 发明授权

US06706422B2 Electroless Ni—B plating liquid, electronic device and method for manufacturing the same 有权
标题翻译：无电镀Ni-B电镀液，电子器件及其制造方法
公开(公告)号：US06706422B2
公开(公告)日：2004-03-16
申请号：US09994834
申请日：2001-11-28
申请人： Hiroaki Inoue , Kenji Nakamura , Moriji Matsumoto , Hirokazu Ezawa , Masahiro Miyata , Manabu Tsujimura
发明人： Hiroaki Inoue , Kenji Nakamura , Moriji Matsumoto , Hirokazu Ezawa , Masahiro Miyata , Manabu Tsujimura
IPC分类号： B32B1504
CPC分类号： C23C18/50 , C23C18/34 , Y10T428/12576 , Y10T428/12896 , Y10T428/12903 , Y10T428/12944 , Y10T428/265
摘要： There is provided an electroless Ni—B plating liquid for forming, a Ni—B alloy film on at least part of the interconnects of an electronic device having an embedded interconnect structure, the electroless Ni—B plating liquid comprising nickel ions, a complexing agent for nickel ions, a reducing agent for nickel ions, and ammonums (NH4+). The electroless Ni—B plating liquid can lower the boron content of the resulting plated film without increasing the plating rate and form a Ni—B alloy film having an FCC crystalline structure.
摘要翻译：提供了一种无电Ni-B电镀液，用于在具有嵌入式互连结构的电子器件的至少一部分互连上形成Ni-B合金膜，包含镍离子的无电Ni-B电镀液，络合剂用于镍离子，镍离子还原剂和氨（NH 4+）。无电镀Ni-B电镀液可以降低所得镀膜的硼含量，而不增加电镀速率，并形成具有FCC晶体结构的Ni-B合金膜。

4. 发明授权

US5885891A Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5885891A
公开(公告)日：1999-03-23
申请号：US895104
申请日：1997-07-16
申请人： Masahiro Miyata , Hirokazu Ezawa
发明人： Masahiro Miyata , Hirokazu Ezawa
IPC分类号： H01L21/60 , H01L23/485 , H05K3/34 , H01L21/44
CPC分类号： H01L24/11 , H01L24/13 , H05K3/3473 , H01L2224/0401 , H01L2224/05572 , H01L2224/1147 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2924/0001 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H05K2203/043 , H05K2203/054
摘要： Disclosed is a method of manufacturing a semiconductor device, comprising the step of forming a pad electrode on an insulating film covering a semiconductor substrate, the step of forming a first metal layer on the pad electrode, the first metal layer being capable of forming a strong adhesive bond with the pad layer, followed by forming a second metal layer on the first metal layer, the second metal layer acting as a barrier layer and being capable of forming a strong adhesive bond with a solder, the step of forming a resist pattern on the second metal layer in a manner to cover that region which corresponds to the pad electrode, the step of etching the second metal layer using the resist pattern as a mask, the step of removing the resist pattern, the step of forming a solder layer selectively on the second metal layer, and the step of selectively etching the first metal layer using the solder layer as a mask.
摘要翻译：公开了一种制造半导体器件的方法，包括在覆盖半导体衬底的绝缘膜上形成焊盘电极的步骤，在焊盘电极上形成第一金属层的步骤，第一金属层能够形成强的与焊盘层粘合，随后在第一金属层上形成第二金属层，第二金属层用作阻挡层，并且能够与焊料形成强烈的粘合剂粘合剂，形成抗蚀剂图案的步骤第二金属层以覆盖对应于焊盘电极的区域的方式，使用抗蚀剂图案作为掩模蚀刻第二金属层的步骤，去除抗蚀剂图案的步骤，选择性地形成焊料层的步骤在第二金属层上，使用焊料层作为掩模选择性地蚀刻第一金属层的步骤。

5. 发明授权

US5529634A Apparatus and method of manufacturing semiconductor device 失效
标题翻译：半导体器件制造装置及方法
公开(公告)号：US5529634A
公开(公告)日：1996-06-25
申请号：US424623
申请日：1995-04-19
申请人： Masahiro Miyata , Hidemitsu Egawa , Johta Fukuhara , Shinzi Takeda , Hirokazu Ezawa
发明人： Masahiro Miyata , Hidemitsu Egawa , Johta Fukuhara , Shinzi Takeda , Hirokazu Ezawa
IPC分类号： C23C14/04 , C23C14/22 , H01L21/60 , H01L21/768 , H01L23/522 , H01L23/532 , C23C16/00
CPC分类号： C23C14/228 , C23C14/04 , C23C14/22 , H01L21/76885 , H01L23/5226 , H01L23/53242 , H01L24/11 , H01L2224/1147 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/19043 , H01L2924/3025
摘要： An evaporation chamber for forming fine metal particles is separated from a film formation chamber in which the substrate having a metal film such as a metal column thereon is placed during metal film deposition. The pressure of the film formation chamber is set to be lower than that of the evaporation chamber, and the fine metal particles are sprayed on the substrate by the pressure difference to form the metal column. Therefore, a wiring layer, a connection electrode for connecting the wiring layer to another wiring layer, and the like can easily be formed by a small number of steps.
摘要翻译：用于形成细金属颗粒的蒸发室与成膜室分离，其中在金属膜沉积期间放置有金属膜如金属柱的金属膜的基板。成膜室的压力被设定为低于蒸发室的压力，并且通过压力差将金属微粒喷射在基板上以形成金属柱。因此，可以通过少量的步骤容易地形成布线层，用于将布线层连接到另一布线层的连接电极等。

6. 发明授权

US08314491B2 Manufacturing method of semiconductor device and semiconductor device 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US08314491B2
公开(公告)日：2012-11-20
申请号：US12845937
申请日：2010-07-29
申请人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
发明人： Soichi Yamashita , Tatsuo Migita , Tadashi Iijima , Masahiro Miyata , Masayuki Uchida , Takashi Togasaki , Hirokazu Ezawa
IPC分类号： H01L23/48
CPC分类号： H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L2224/02311 , H01L2224/02381 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05548 , H01L2224/05569 , H01L2224/05571 , H01L2224/05572 , H01L2224/05666 , H01L2224/0603 , H01L2224/06051 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13083 , H01L2224/13099 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/45144 , H01L2224/48666 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/81191 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/14 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552 , H01L2224/45015 , H01L2924/207
摘要： According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer. Next, a dielectric layer having a third opening reaching the third conductive layer and a fourth opening reaching the electrode terminal via the second opening is formed by modifying a photosensitive resin film, and a bump that is electrically connected to the third conductive layer is formed.
摘要翻译：根据一个实施例，半导体器件的制造方法如下。通过改变在其上设置有第一导电层的电极端子的基板上的感光性树脂膜，形成具有第一开口和到达电极端子的第二开口的电介质层。接下来，在包括第一开口的内部的电介质层上形成与电极端子电连接的第二导电层，以及具有与氧化还原电位不同的氧化还原电位的第三导电层第一导电层小于在第二导电层上形成第一导电层和第二导电层之间的氧化还原电位的差异。接下来，通过改变感光性树脂膜形成具有到达第三导电层的第三开口的电介质层和通过第二开口到达电极端子的第四开口，并且形成与第三导电层电连接的凸块。

7. 发明授权

US06569752B1 Semiconductor element and fabricating method thereof 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US06569752B1
公开(公告)日：2003-05-27
申请号：US09522820
申请日：2000-03-10
申请人： Soichi Homma , Masahiro Miyata , Hirokazu Ezawa , Junichiro Yoshioka , Hiroaki Inoue , Tsuyoshi Tokuoka
发明人： Soichi Homma , Masahiro Miyata , Hirokazu Ezawa , Junichiro Yoshioka , Hiroaki Inoue , Tsuyoshi Tokuoka
IPC分类号： H01L2144
CPC分类号： H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L2224/02126 , H01L2224/0347 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/05027 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05541 , H01L2224/05558 , H01L2224/05572 , H01L2224/0558 , H01L2224/05639 , H01L2224/1132 , H01L2224/1147 , H01L2224/11901 , H01L2224/11902 , H01L2224/13006 , H01L2224/13023 , H01L2224/13111 , H01L2224/16238 , H01L2224/16507 , H01L2924/00013 , H01L2924/0002 , H01L2924/01004 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01092 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/207 , H01L2224/13099 , H01L2924/00014 , H01L2224/05099 , H01L2224/13599 , H01L2224/05599 , H01L2224/29099 , H01L2224/29599 , H01L2924/00 , H01L2224/05552
摘要： The present semiconductor element comprises a semiconductor substrate, a wiring pad formed thereon, a layer of barrier metal formed thereon, an intermetallic compound Ag3Sn formed thereon, and a protruded electrode consisting of low-melting metal formed thereon. In addition, a fabricating method of a semiconductor element comprises the steps of forming a wiring pad on a semiconductor substrate, forming a layer of barrier metal thereon, forming a metallic layer containing Ag thereon, forming a layer of low-melting metal containing Sn thereon, and melting the layer of low-melting metal containing Sn to form a protruded electrode and simultaneously to form an intermetallic compound Ag3Sn at an interface between the metallic layer containing Ag and the layer of low-melting metal containing Sn. Thus, with Pb-free solder, a semiconductor element of high reliability can be obtained.
摘要翻译：本半导体元件包括半导体衬底，形成在其上的布线衬垫，形成在其上的阻挡金属层，形成在其上的金属间化合物Ag 3 Sn，以及由其上形成的低熔点金属组成的突出电极。此外，半导体元件的制造方法包括以下步骤：在半导体衬底上形成布线焊盘，在其上形成阻挡金属层，在其上形成含有Ag的金属层，在其上形成含有Sn的低熔点金属层并且熔化含有Sn的低熔点金属层以形成突出电极，同时在包含Ag的金属层和含有Sn的低熔点金属层之间的界面处形成金属间化合物Ag 3 Sn。因此，利用无铅焊料，可以获得高可靠性的半导体元件。

8. 再颁专利

USRE37882E1 Semiconductor device manufacturing method 失效
标题翻译：半导体器件制造方法
公开(公告)号：USRE37882E1
公开(公告)日：2002-10-15
申请号：US09000865
申请日：1997-12-30
申请人： Hirokazu Ezawa , Masahiro Miyata
发明人： Hirokazu Ezawa , Masahiro Miyata
IPC分类号： H01L2144
CPC分类号： H01L21/76885 , H01L2924/0002 , H05K1/0306 , H05K3/4647 , H01L2924/00
摘要： With a semiconductor device manufacturing method, a lower-layer interconnection is formed on a circuit board on which a plurality of semiconductor chips are mounted. Using a screen plate with openings corresponding to desired positions on the lower-layer interconnection, screen printing of a metal paste is effected, and the printed metal paste is dried and calcined by heat treatment to form a metal pillar on the lower-layer interconnection. An insulating film covering the lower-layer interconnection and the metal pillar is formed so that the tip of the metal pillar may be exposed. An upper-layer interconnection is formed on the insulating film so that this layer may contact with the exposed tip of the metal pillar.
摘要翻译：利用半导体器件制造方法，在安装有多个半导体芯片的电路板上形成下层布线。使用具有对应于下层互连上的期望位置的开口的筛板，进行金属糊的丝网印刷，并且通过热处理干燥并煅烧印刷的金属糊料，以在下层互连上形成金属柱。形成覆盖下层布线和金属支柱的绝缘膜，使金属支柱的前端露出。在绝缘膜上形成上层布线，使得该层可与金属柱的露出端接触。

9. 发明授权

US06798050B1 Semiconductor device having semiconductor element with copper pad mounted on wiring substrate and method for fabricating the same 有权
标题翻译：具有安装在布线基板上的具有铜焊盘的半导体元件的半导体器件及其制造方法
公开(公告)号：US06798050B1
公开(公告)日：2004-09-28
申请号：US09672783
申请日：2000-09-18
申请人： Soichi Homma , Masahiro Miyata , Hirokazu Ezawa
发明人： Soichi Homma , Masahiro Miyata , Hirokazu Ezawa
IPC分类号： H01L2302
CPC分类号： H01L24/13 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05082 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05171 , H01L2224/05179 , H01L2224/05181 , H01L2224/05187 , H01L2224/05556 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/1146 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13023 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48463 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/73204 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01041 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01083 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04953 , H01L2924/0496 , H01L2924/10253 , H01L2924/15311 , H01L2924/1532 , H01L2924/16152 , H01L2924/181 , H01L2924/00014 , H01L2924/04941 , H01L2224/13099 , H01L2924/00 , H01L2924/00012
摘要： After a copper diffusion preventing film 4 is formed on a copper pad 1, a barrier metal including a titanium film 5, a nickel film 6, and a palladium film 7 is formed on the copper diffusion preventing film 4. The copper diffusion preventing film formed on the copper pad suppresses diffusion of copper. Even when a solder bump is formed on the copper pad, diffusion of tin in the solder and copper is suppressed. This prevents formation of an intermetallic compound between copper and tin, so no interface de-adhesion or delamination occurs and a highly reliable connection is obtained. This structure can be realized by a simple fabrication process unlike a method of forming a thick barrier metal by electroplating. In this invention, high shear strength can be ensured by connecting a solder bump, gold wire, or gold bump to a copper pad without increasing the number of fabrication steps.
摘要翻译：在铜焊盘1上形成铜扩散防止膜4之后，在铜扩散防止膜4上形成包含钛膜5，镍膜6和钯膜7的阻挡金属。形成铜扩散防止膜在铜垫上抑制铜的扩散。即使在铜焊盘上形成焊料凸块，也抑制锡在焊料和铜中的扩散。这样可防止在铜和锡之间形成金属间化合物，因此不会发生界面剥离或脱层，并且获得高度可靠的连接。这种结构可以通过简单的制造工艺来实现，这与通过电镀形成厚的阻挡金属的方法不同。在本发明中，通过将焊锡凸块，金线或金凸块连接到铜焊盘上，可以确保高剪切强度，而不增加制造步骤的数量。

10. 发明授权

US06605522B1 Method of manufacturing a semiconductor device having a protruding bump electrode 失效
标题翻译：制造具有突起电极的半导体器件的方法
公开(公告)号：US06605522B1
公开(公告)日：2003-08-12
申请号：US09627431
申请日：2000-07-27
申请人： Hirokazu Ezawa , Masahiro Miyata
发明人： Hirokazu Ezawa , Masahiro Miyata
IPC分类号： H01L2144
CPC分类号： H01L23/3171 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/50 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/13099 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01027 , H01L2924/01033 , H01L2924/01046 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2224/05655 , H01L2924/00014 , H01L2224/05664 , H01L2224/05666 , H01L2224/05124 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166
摘要： A present semiconductor device includes a plurality of bump electrodes formed over a semiconductor substrate to allow signals to be input and output to and from a semiconductor element. After the formation of the bump electrodes an organic insulting film is coated on the whole surface of a resultant wafer structure, followed by a drying, a solidifying and an etch-back step. By so doing, a top area of the bump electrode is more projected than a top area of the organic insulating film. A lead is connected by a pressure and heat to the top area of the bump electrode.
摘要翻译：本半导体器件包括形成在半导体衬底上的多个凸起电极，以允许输入和输出半导体元件的信号。在凸起电极形成之后，将有机绝缘膜涂覆在所得晶片结构的整个表面上，随后进行干燥，凝固和回蚀步骤。通过这样做，突起电极的顶部区域比有机绝缘膜的顶部区域更多地突出。引线通过压力和热量连接到凸块电极的顶部区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式