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    • 1. 发明申请
    • Interface design system and method with integrated usability considerations
    • 接口设计系统和方法具有集成的可用性考虑
    • US20060271856A1
    • 2006-11-30
    • US11137309
    • 2005-05-25
    • Michelle RaymondTodd CarpenterChristopher MillerDal Vernon Reising
    • Michelle RaymondTodd CarpenterChristopher MillerDal Vernon Reising
    • G06F19/00
    • G06F8/38
    • A method of user interface design including creating an interaction requirement and generating one or more available presentations configured to meet the interaction requirement, where generating includes identifying available presentation devices based upon the device model and meeting the interaction requirement and determining one or more available presentation elements configured to meet the interaction requirement. The device model includes a plurality of attributes and characteristics of a presentation device meeting the interaction requirement. Each presentation element is configured to be communicated to a user via at least one of the available presentation devices. The method further includes assigning each of the plurality of available presentations a usability score, selecting one or more of the available presentations based at least in part upon the usability score of each of the available presentations, and designing a user interface incorporating one of the available presentations.
    • 一种用户界面设计的方法,包括创建交互需求并生成被配置为满足交互需求的一个或多个可用呈现,其中生成包括基于所述设备模型识别可用的呈现设备并满足所述交互需求并且确定一个或多个可用的呈现元素 配置为满足交互需求。 设备模型包括满足交互需求的呈现设备的多个属性和特征。 每个呈现元素被配置为经由可用呈现设备中的至少一个来传达给用户。 该方法还包括:分配多个可用演示中的每一个可用性分数,至少部分地基于每个可用演示的可用性分数来选择可用演示中的一个或多个,以及设计包含可用演示中的一个的用户界面 演示文稿。
    • 3. 发明申请
    • Interaction design system
    • 互动设计系统
    • US20050091601A1
    • 2005-04-28
    • US10507024
    • 2003-03-06
    • Michelle RaymondTodd CarpenterChristopher MillerDal Vernon ReisingLiana-Maria Kiff
    • Michelle RaymondTodd CarpenterChristopher MillerDal Vernon ReisingLiana-Maria Kiff
    • G06F3/00G06F9/44G06F15/00
    • G06F8/38
    • An interaction design system (12) may be used by a designer to design a user interface. The designer supplies the interaction design system with a domain model (22) that contains information characterizing an application in a domain, a user model (24) that contains information characterizing the users of the user interface, a task model (26) that contains task primitives to be performed between the user and the user interface and the type of information required by the task primitives, and a device model (28) that contains information characterizing the interaction delivery devices that are available to deliver the user interface. The interaction design system (10) then matches the interaction delivery devices in the device model (28) to the type of information required by the task primitives and to the information characterizing the users, matches presentation objects (30) to the task primitives and to the information of the domain model (22), and generates the user interface based on the matches (32).
    • 设计者可以使用交互设计系统(12)来设计用户界面。 所述设计者向所述交互设计系统提供包含表征领域中的应用的信息的域模型(22),包含表征所述用户界面的用户的信息的用户模型(24),包含任务的任务模型(26) 要在用户和用户界面之间执行的原语以及任务原语所需的信息类型,以及包含表征可用于递送用户界面的交互传送设备的信息的设备模型(28)。 交互设计系统(10)然后将设备模型(28)中的交互传送设备与任务原语所需的信息类型和表征用户的信息相匹配,将呈现对象(30)与任务原语相匹配,并将 (22)的信息,并且基于匹配(32)生成用户界面。
    • 8. 发明申请
    • Bitline leakage limiting with improved voltage regulation
    • 位线泄漏限制与改进的电压调节
    • US20070253265A1
    • 2007-11-01
    • US11414364
    • 2006-05-01
    • Christopher MillerCharles Drake
    • Christopher MillerCharles Drake
    • G11C7/00G11C7/02
    • G11C7/12G11C7/02
    • Circuit arrangements and methods are provided for regulating and maintaining voltage on bitlines of a semiconductor memory device. According to one embodiment, first and second regulation devices are connected to a charging circuit. At the beginning of a charging period, voltage on the bitlines is regulated with the second regulation device as the bitlines are initially charged to a voltage. After initially charging the bitlines to the voltage, voltage on the bitlines is regulated with the first regulation device that also limits current to the bitlines when there is a leakage anomaly associated with the bitlines. According to another embodiment, a charging circuit that is connected to sense nodes of a sense amplifier while the sense nodes are connected to the bitlines is activated so that the charging circuit assists in charging the bitlines at the beginning of a charging period. After the bitlines are initially charged at the beginning of the charging period, voltage on the bitlines is regulated with a first regulation device that regulates current to the bitlines and limits current to the bitlines when there is a leakage anomaly associated with the bitlines.
    • 提供电路布置和方法用于调节和维持半导体存储器件的位线上的电压。 根据一个实施例,第一和第二调节装置连接到充电电路。 在充电周期开始时,由于位线最初被充电到电压,所以利用第二调节装置调节位线上的电压。 在最初将位线充电到电压之后,利用第一调节装置来调节位线上的电压,当与位线相关联的泄漏异常时也将电流限制到位线。 根据另一个实施例,当感测节点连接到位线时连接到感测放大器的感测节点的充电电路被激活,使得充电电路在充电周期开始时协助对位线充电。 在充电周期开始之后,位线最初充电之后,利用第一调节装置来调节位线上的电压,该第一调节装置在与位线相关联的泄漏异常时将电流调节到位线并限制位线的电流。