专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07149095B2 Stacked microelectronic assemblies 有权
标题翻译：堆叠的微电子组件
公开(公告)号：US07149095B2
公开(公告)日：2006-12-12
申请号：US10281550
申请日：2002-10-28
申请人： Michael Warner , Philip Damberg , John B. Riley , David Gibson , Young-Gon Kim , Belgacem Haba , Vernon Solberg
发明人： Michael Warner , Philip Damberg , John B. Riley , David Gibson , Young-Gon Kim , Belgacem Haba , Vernon Solberg
IPC分类号： H05K1/11
CPC分类号： H05K1/189 , H01L23/5387 , H01L25/0657 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06555 , H01L2225/06579 , H01L2225/06582 , H01L2225/06586 , H01L2924/00014 , H01L2924/3011 , H01L2224/05599
摘要： A stacked microelectronic assembly includes a plurality of microelectronic subassemblies. Each subassembly includes a substrate having at least one site, a plurality of first contacts and a plurality of second contacts. Each subassembly also has at least one microelectronic element assembled to the at least one attachment site and electrically connected to at least some of the first and second contacts. The substrate is folded so that the first contacts are accessible at a bottom of a subassembly and the second contacts are accessible at a top of a subassembly. The plurality of subassemblies are stacked one on top of another in a generally vertical configuration. The substrate of at least one of the subassemblies has a plurality of attachment sites and a plurality of microelectronic elements assembled to the attachment sites. The substrate is folded so that at least some of the plurality of microelectronic elements are disposed alongside one another.
摘要翻译：堆叠的微电子组件包括多个微电子子组件。每个子组件包括具有至少一个位置，多个第一触点和多个第二触点的基板。每个子组件还具有组装到至少一个附接位置并电连接到第一和第二触点中的至少一些的至少一个微电子元件。折叠基板使得第一触头在子组件的底部可接近，并且第二触头可在子组件的顶部接近。多个子组件以大致垂直的配置堆叠在另一个之上。至少一个子组件的衬底具有多个附接位置和组装到附接位置的多个微电子元件。折叠基板使得多个微电子元件中的至少一些彼此并排设置。

2. 发明申请

US20060286717A1 Stacked microelectronic assemblies having basal compliant layers 审中-公开
标题翻译：堆叠的微电子组件具有基底柔性层
公开(公告)号：US20060286717A1
公开(公告)日：2006-12-21
申请号：US11123989
申请日：2005-05-06
申请人： Vernon Solberg , Pieter Bellaar , Young-Gon Kim , Belgacem Haba
发明人： Vernon Solberg , Pieter Bellaar , Young-Gon Kim , Belgacem Haba
IPC分类号： H01L21/00
CPC分类号： H01L25/0657 , H01L23/5387 , H01L25/105 , H01L2224/16225 , H01L2225/06513 , H01L2225/107
摘要： A method of making a stacked microelectronic assembly includes providing a flexible substrate having first and second ends, the flexible substrate having a plurality of attachment sites located between the first and second ends thereof including a first one of the attachment sites located adjacent the first end of the flexible substrate, the flexible substrate including conductive terminals accessible at a surface of the flexible substrate and wiring connected to the terminals, providing a compliant layer over the first attachment site, assembling a plurality of microelectronic elements over the attachment sites, wherein a first one of the microelectronic elements engages the compliant layer and is movable relative to the flexible substrate, electrically interconnecting the microelectronic elements and the wiring, folding the flexible substrate and stacking at least some of the microelectronic elements in generally vertical alignment with one another so that the first one of the microelectronic elements engaging the compliant layer is disposed at a bottom of the stacked assembly, and maintaining the stacked microelectronic elements in the substantially vertical alignment, wherein the conductive terminals are exposed at the bottom end of the stacked assembly.
摘要翻译：制造堆叠的微电子组件的方法包括提供具有第一和第二端的柔性衬底，所述柔性衬底具有位于其第一和第二端之间的多个附接位置，所述附接位置包括邻近第一端和第二端的第一附接位置柔性基板，柔性基板包括在柔性基板的表面可接触的导电端子和连接到端子的布线，在第一附接位置上提供柔性层，在附接位置上组装多个微电子元件，其中第一个的微电子元件接合顺应层并且可相对于柔性基板移动，将微电子元件和布线电互连，折叠柔性基板并将至少一些微电子元件堆叠成彼此大致垂直对准，使得第一其中一个microe 接合柔性层的电极元件设置在堆叠组件的底部，并且将堆叠的微电子元件保持在基本上垂直的对准中，其中导电端子在堆叠组件的底端处露出。

3. 发明授权

US06699730B2 Stacked microelectronic assembly and method therefor 有权
标题翻译：堆叠微电子组件及其方法
公开(公告)号：US06699730B2
公开(公告)日：2004-03-02
申请号：US09776356
申请日：2001-02-02
申请人： Young Kim , Belgacem Haba , Vernon Solberg
发明人： Young Kim , Belgacem Haba , Vernon Solberg
IPC分类号： H01L2144
CPC分类号： H05K1/189 , H01L23/5387 , H01L25/0657 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06555 , H01L2225/06579 , H01L2225/06582 , H01L2225/06586 , H01L2924/15192 , H01L2924/15311
摘要： A method of making a stacked microelectronic assembly includes providing a flexible substrate having a plurality of attachment sites, test contacts and conductive terminals, and including a wiring layer with leads extending to the attachment sites. The method includes assembling a plurality of microelectronic elements to the attachment sites and electrically interconnecting the microelectronic elements and the leads. The flexible substrate is then folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack and the test contacts exposed at the top end of the stack.
摘要翻译：制造堆叠的微电子组件的方法包括提供具有多个附接位置的柔性基板，测试触点和导电端子，并且包括具有延伸到附接位置的引线的布线层。该方法包括将多个微电子元件组装到附接位置并电连接微电子元件和引线。然后折叠柔性基板，以将至少一些微电子元件堆叠成彼此基本垂直对准，以提供堆叠的组件，其中导电端子暴露在堆叠的底端，并且测试触点暴露在顶端的堆栈。

4. 发明授权

US06225688B1 Stacked microelectronic assembly and method therefor 失效
标题翻译：堆叠微电子组件及其方法
公开(公告)号：US06225688B1
公开(公告)日：2001-05-01
申请号：US09244581
申请日：1999-02-04
申请人： Young Kim , Belgacem Haba , Vernon Solberg
发明人： Young Kim , Belgacem Haba , Vernon Solberg
IPC分类号： H01L2302
CPC分类号： H05K1/189 , H01L23/5387 , H01L25/0657 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06555 , H01L2225/06579 , H01L2225/06582 , H01L2225/06586 , H01L2924/15192 , H01L2924/15311
摘要： A stacked microelectronic assembly and its resulting structure includes a flexible substrate having a plurality of attachment sites, test contacts and conductive terminals, and including a wiring layer with leads extending to the attachment sites. The assembly includes a plurality of microelectronic elements assembled to the attachment sites and electrically interconnecting the microelectronic elements and the leads. The flexible substrate is folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack and the test contacts exposed at the top end of the stack. The assembly may be made using a dam and or a spacer to facilitate the folding process. Two stacked microelectronic assemblies may be stacked together by providing a first stacked assembly with a plurality of connection pads exposed at the top end and providing a second stacked assembly with a plurality of solder balls connected to the terminals at the bottom end. The first and second assemblies may be stacked by connecting the solder balls to the connection pads.
摘要翻译：堆叠的微电子组件及其所得到的结构包括具有多个附接位置的柔性基板，测试触点和导电端子，并且包括具有延伸到附接位置的导线的布线层。组件包括组装到附接位置并将微电子元件和引线电互连的多个微电子元件。柔性基底被折叠以便将至少一些微电子元件堆叠成彼此基本上垂直对准，以提供堆叠的组件，其中导电端子暴露在堆叠的底端，并且测试触点暴露在顶端堆栈。可以使用坝和/或间隔件来制造组件以便于折叠过程。通过提供具有暴露在顶端的多个连接焊盘的第一堆叠组件并且提供具有连接到底端处的端子的多个焊球的第二堆叠组件，可以将两个叠置的微电子组件堆叠在一起。可以通过将焊球连接到连接焊盘来堆叠第一和第二组件。

5. 发明授权

US06054337A Method of making a compliant multichip package 失效
标题翻译：制造兼容多芯片封装的方法
公开(公告)号：US06054337A
公开(公告)日：2000-04-25
申请号：US989710
申请日：1997-12-12
申请人： Vernon Solberg
发明人： Vernon Solberg
IPC分类号： H01L21/98 , H01L25/065 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L25/50 , H01L24/01 , H01L25/0657 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06527 , H01L2225/06575 , H01L2225/06579 , H01L2225/06586 , H01L2225/06589 , H01L2225/06593 , H01L2924/14
摘要： A method of making a multichip package includes providing a flexible substrate having a plurality of conductive traces and flexible leads connected to outer ends of the conductive traces adjacent the periphery of said flexible substrate. The flexible substrate includes conductive terminals accessible at a surface thereof connected to at least some of the conductive traces. The method includes providing a first microelectronic element having a front face including contacts and a back surface and assembling the front face thereof with the flexible substrate; depositing a compliant element over the back surface of the first microelectronic element; providing a second microelectronic element having a front face including contacts and assembling the front face thereof with the compliant element so that the second microelectronic element overlies the first microelectronic element; and electrically interconnecting the first and second microelectronic elements with one another and with the conductive terminals by connecting the flexible leads to the second microelectronic element and connecting at least some of the traces to the first microelectronic element.
摘要翻译：制造多芯片封装的方法包括提供具有多个导电迹线的柔性基板和连接到邻近所述柔性基板周边的导电迹线的外端的柔性引线。柔性基板包括在其连接到至少一些导电迹线的表面处可访问的导电端子。该方法包括提供具有前面的第一微电子元件，其包括触点和后表面，并将其前表面与柔性基板组装; 在所述第一微电子元件的背表面上沉积柔顺元件; 提供具有前面的第二微电子元件，所述前表面包括触点并且将其前表面与所述顺应元件组装，使得所述第二微电子元件覆盖所述第一微电子元件; 以及将所述第一和第二微电子元件彼此电连接并且通过将所述柔性引线连接到所述第二微电子元件并将至少一些所述迹线连接到所述第一微电子元件而与所述导电端子电连接。

6. 发明授权

US5885849A Methods of making microelectronic assemblies 失效
标题翻译：制造微电子组件的方法
公开(公告)号：US5885849A
公开(公告)日：1999-03-23
申请号：US19637
申请日：1998-02-06
申请人： Thomas H. DiStefano , Vernon Solberg
发明人： Thomas H. DiStefano , Vernon Solberg
IPC分类号： H01L23/31 , H01L23/498 , H01L23/538 , H01L25/065 , H01L21/283 , H01L21/58 , H01L21/60
CPC分类号： H01L23/3157 , H01L23/49827 , H01L23/5387 , H01L25/0657 , H01L2224/16 , H01L2225/0652 , H01L2225/06579
摘要： A method of making a microelectronic assembly includes providing a starting subassembly having a microelectronic component with a top surface and having electrical contacts, the subassembly further including a plurality of terminals over the top surface of the component, each terminal being connected to at least one contact of the component but moveable with respect to the component; positioning a plurality of joining units each having a solid core on the terminal; providing a unit bonding material at interfaces between each core terminal; and bonding the joining units to the terminals by heating the joining units and terminals so as to convert the unit bonding material to a liquid phase without melting the cores and solidifying the unit bonding material.
摘要翻译：制造微电子组件的方法包括提供具有顶表面并具有电触点的微电子部件的起始子组件，所述子组件还包括在部件的顶表面上的多个端子，每个端子连接到至少一个触点的部件，但可相对于部件移动; 在端子上定位多个具有实芯的接合单元; 在每个核心终端之间的接口处提供单元接合材料; 以及通过加热所述接合单元和端子将所述接合单元结合到所述端子，以将所述单元接合材料转化为液相而不熔化所述芯并固化所述单元接合材料。

7. 发明授权

US5801446A Microelectronic connections with solid core joining units 失效
标题翻译：与实芯连接单元的微电子连接
公开(公告)号：US5801446A
公开(公告)日：1998-09-01
申请号：US411472
申请日：1995-03-28
申请人： Thomas H. DiStefano , Vernon Solberg
发明人： Thomas H. DiStefano , Vernon Solberg
IPC分类号： H01L23/31 , H01L23/498 , H01L23/538 , H01L25/065 , H01L23/12 , H01L23/14 , H01L23/50
CPC分类号： H01L23/3157 , H01L23/49827 , H01L23/5387 , H01L25/0657 , H01L2224/16 , H01L2225/0652 , H01L2225/06579
摘要： A microelectronic component such as a semiconductor chip having electrical contacts is provided with terminals, the terminals being movable relative to the component. A joining unit having a solid core is disposed on each terminal and extends upwardly, away from the component. Each unit includes a bonding material such as a solder bonding the terminal and the solid core, the bonding material desirably defining a waist or narrow section spaced above the terminal, the waist having a curved surface forming a stress-relieving fillet. The joining units are bonded to contact pads of a substrate such as a circuit panel as by bonding the solder of the joining units to the terminals, or by means of a further solder on the contact pads having a lower melting point. The assembly provides substantial resistance to mechanical stress caused by thermal expansion. Preferably, the terminals are movable in vertical directions towards the component to compensate for nonplanarity during assembly.
摘要翻译：诸如具有电触点的半导体芯片的微电子部件设置有端子，端子可相对于部件移动。具有实芯的接合单元设置在每个端子上并且向上远离部件延伸。每个单元包括接合材料，例如焊接端子和实芯，焊接材料期望地限定在端子之上间隔开的腰部或窄部分，腰部具有形成应力消除内圆角的弯曲表面。接合单元通过将接合单元的焊料接合到端子，或者通过在具有较低熔点的接触焊盘上的另外的焊料粘合到诸如电路板的衬底的接触焊盘。该组件提供了对由热膨胀引起的机械应力的实质性阻力。优选地，端子可以在垂直方向上朝向部件移动以在组装期间补偿非平面性。

8. 发明授权

US06313528B1 Compliant multichip package 有权
标题翻译：符合多芯片封装
公开(公告)号：US06313528B1
公开(公告)日：2001-11-06
申请号：US09632986
申请日：2000-08-04
申请人： Vernon Solberg
发明人： Vernon Solberg
IPC分类号： H01L2334
CPC分类号： H01L25/50 , H01L24/01 , H01L25/0657 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06527 , H01L2225/06575 , H01L2225/06579 , H01L2225/06586 , H01L2225/06589 , H01L2225/06593 , H01L2924/14 , H01L2924/00
摘要： A multichip package includes a substrate including a plurality of conductive traces and flexible leads connected to outer ends of at least some of the conductive traces adjacent the periphery of said flexible substrate, the substrate including conductive terminals accessible at a surface thereof connected to at least some of the traces. The package includes a first microelectronic element having a front face including contacts and a back face, the front face of the first microelectronic element confronting the flexible substrate. The package also includes a second microelectronic element larger than the first microelectronic element, the second microelectronic element having a front face including contacts, the second microelectronic element overlying the first microelectronic element with the front face of the second microelectronic element facing toward the substrate. The flexible leads are connected to the second microelectronic element and at least some of the traces are connected to the first microelectronic element for electrically interconnecting the first and second microelectronic elements with one another and with the terminals.
摘要翻译：多芯片封装包括包括多个导电迹线的衬底和与邻近所述柔性衬底的周边的至少一些导电迹线的外端连接的柔性引线，该衬底包括可在其表面连接至少一些的导电端子的痕迹。该封装包括具有包括触点和背面的前表面的第一微电子元件，第一微电子元件的正面与柔性基板相对。封装还包括大于第一微电子元件的第二微电子元件，第二微电子元件具有包括触点的前表面，第二微电子元件覆盖第一微电子元件，第二微电子元件的正面朝向衬底。柔性引线连接到第二微电子元件，并且至少一些迹线连接到第一微电子元件，用于将第一和第二微电子元件与端子电连接。

9. 发明授权

US6121676A Stacked microelectronic assembly and method therefor 失效
标题翻译：堆叠微电子组件及其方法
公开(公告)号：US6121676A
公开(公告)日：2000-09-19
申请号：US987569
申请日：1997-12-11
申请人： Vernon Solberg
发明人： Vernon Solberg
IPC分类号： H01L23/538 , H01L25/065 , H05K1/18 , H01L21/60
CPC分类号： H05K1/189 , H01L23/5387 , H01L25/0657 , H01L2224/05573 , H01L2224/16 , H01L2224/32145 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06555 , H01L2225/06579 , H01L2225/06582 , H01L2225/06586 , H01L2924/00014 , H01L2924/15311
摘要： A method of making a stacked microelectronic assembly such as a semiconductor chip assembly and its resulting structure includes providing a flexible substrate having a plurality of attachment sites and conductive terminals and including a wiring layer with leads extending to the attachment sites. The method includes assembling a plurality of microelectronic elements to the attachment sites and electrically interconnecting the microelectronic elements and the leads so that the electrically connected microelectronic elements are movable relative to the flexible substrate. The flexible substrate is then folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack. The stacked assembly is held in place using a thermally conductive adhesive and/or a mechanical element. The stacking structure and methods of the present invention provide an economical and space-saving assembly for use in electronic components. The flexibility of the electrical connection between each microelectronic element and the substrate provides for reliable electrical interconnections between the substrate and the microelectronic elements during thermal cycling.
摘要翻译：制造诸如半导体芯片组件的层叠微电子组件的方法及其所得到的结构包括提供具有多个附接位置和导电端子的柔性基板，并且包括具有延伸到附接位置的引线的布线层。该方法包括将多个微电子元件组装到附接位置并电连接微电子元件和引线，使得电连接的微电子元件相对于柔性基板可移动。然后折叠柔性基板，以将至少一些微电子元件堆叠成彼此基本上垂直对准，以提供堆叠的组件，其中导电端子暴露在堆叠的底端。使用导热粘合剂和/或机械元件将堆叠的组件保持就位。本发明的堆叠结构和方法提供了一种用于电子部件的经济且节省空间的组件。每个微电子元件和衬底之间的电连接的灵活性在热循环期间提供了衬底和微电子元件之间的可靠的电互连。

10. 发明授权

US6147401A Compliant multichip package 有权
标题翻译：符合多芯片封装
公开(公告)号：US6147401A
公开(公告)日：2000-11-14
申请号：US500364
申请日：2000-02-08
申请人： Vernon Solberg
发明人： Vernon Solberg
IPC分类号： H01L21/98 , H01L25/065 , H01L23/30
CPC分类号： H01L25/50 , H01L24/01 , H01L25/0657 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06527 , H01L2225/06575 , H01L2225/06579 , H01L2225/06586 , H01L2225/06589 , H01L2225/06593 , H01L2924/14
摘要： A multichip package includes a substrate including a plurality of conductive traces and flexible leads connected to outer ends of at least some of the conductive traces adjacent the periphery of said flexible substrate, the substrate including conductive terminals accessible at a surface thereof connected to at least some of the traces. The package includes a first microelectronic element having a front face including contacts and a back face, the front face of the first microelectronic element confronting the flexible substrate. The package also includes a second microelectronic element larger than the first microelectronic element, the second microelectronic element having a front face including contacts, the second microelectronic element overlying the first microelectronic element with the front face of the second microelectronic element facing toward the substrate. A compliant element is disposed alongside the first microelectronic element between the second microelectronic element and the substrate. The flexible leads are connected to the second microelectronic element and at least some of the traces are connected to the first microelectronic element for electrically interconnecting the first and second microelectronic elements with one another and with the terminals.
摘要翻译：多芯片封装包括包括多个导电迹线的衬底和与邻近所述柔性衬底的周边的至少一些导电迹线的外端连接的柔性引线，该衬底包括可在其表面连接至少一些的导电端子的痕迹。该封装包括具有包括触点和背面的前表面的第一微电子元件，第一微电子元件的正面与柔性基板相对。封装还包括大于第一微电子元件的第二微电子元件，第二微电子元件具有包括触点的前表面，第二微电子元件覆盖第一微电子元件，第二微电子元件的正面朝向衬底。柔性元件沿着第一微电子元件与第二微电子元件和衬底之间设置。柔性引线连接到第二微电子元件，并且至少一些迹线连接到第一微电子元件，用于将第一和第二微电子元件与端子电连接。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式