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1. 发明授权

US08650440B2 Processor based system having ECC based check and access validation information means 有权
标题翻译：具有基于ECC的检查和访问验证信息的基于处理器的系统意味着
公开(公告)号：US08650440B2
公开(公告)日：2014-02-11
申请号：US12811454
申请日：2008-01-16
申请人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
发明人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
IPC分类号： G06F11/00
CPC分类号： G06F11/1645 , G06F11/10 , G06F11/1654 , G06F2201/845
摘要： A system comprises a first master element; and at least one shared communication element arranged to operably couple the first master element to at least one slave element. The system further comprises at least one validation element located on at least one further validation path located between the first master element and the at least one slave element, wherein the at least one validation element is arranged to validate at least one of: at least one access request by the first master element; and a response to an access request from the at least one slave element.
摘要翻译：一种系统包括第一主元件; 以及布置成将第一主元件可操作地耦合到至少一个从属元件的至少一个共享通信元件。所述系统还包括位于位于所述第一主元件和所述至少一个从属元件之间的至少一个另外的验证路径上的至少一个验证元件，其中所述至少一个验证元件被布置成验证以下至少一个：至少一个由第一个主元素访问请求; 以及对来自所述至少一个从属单元的访问请求的响应。

2. 发明授权

US08589737B2 Memory system with redundant data storage and error correction 有权
标题翻译：具有冗余数据存储和纠错的存储系统
公开(公告)号：US08589737B2
公开(公告)日：2013-11-19
申请号：US12995297
申请日：2008-06-20
申请人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
发明人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
IPC分类号： G06F11/00
CPC分类号： G06F11/167 , G11C29/74 , G11C2029/0411
摘要： A system comprises at least two random access memory (RAM) elements arranged to store data redundantly. The system further comprises RAM routing logic comprising comparison logic operably coupled to the at least two RAM elements and arranged to compare redundant data read from the at least two RAM elements, and check and validation logic, independent of the RAM routing logic, operably coupled to the at least two RAM elements and arranged to additionally detect an error in the redundant data read from the at least two RAM elements and provide an error indication signal to the RAM routing logic in response thereto. The RAM routing logic further comprises selection logic arranged to dynamically select redundant data from one of the at least two RAM elements based on the comparison of the redundant data and the error indication signal.
摘要翻译：系统包括被布置为冗余地存储数据的至少两个随机存取存储器（RAM）元件。所述系统还包括RAM路由逻辑，其包括可操作地耦合到所述至少两个RAM元件的比较逻辑，并且被布置为比较从所述至少两个RAM元素读取的冗余数据，以及独立于所述RAM路由逻辑的检查和验证逻辑，其可操作地耦合到所述至少两个RAM元件并且被布置为附加地检测从所述至少两个RAM元素读取的冗余数据中的错误，并且响应于此向RAM路由逻辑提供错误指示信号。 RAM路由逻辑还包括选择逻辑，其被布置为基于冗余数据和错误指示信号的比较来动态地从至少两个RAM元素中的一个RAM元素中选择冗余数据。

3. 发明申请

US20100287443A1 PROCESSOR BASED SYSTEM HAVING ECC BASED CHECK AND ACCESS VALIDATION INFORMATION MEANS 有权
标题翻译：基于ECC的基于处理器的系统检查和访问验证信息手段
公开(公告)号：US20100287443A1
公开(公告)日：2010-11-11
申请号：US12811454
申请日：2008-01-16
申请人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
发明人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
IPC分类号： H03M13/09 , G06F13/40
CPC分类号： G06F11/1645 , G06F11/10 , G06F11/1654 , G06F2201/845
摘要： A system comprises a first master element; and at least one shared communication element arranged to operably couple the first master element to at least one slave element. The system further comprises at least one validation element located on at least one further validation path located between the first master element and the at least one slave element, wherein the at least one validation element is arranged to validate at least one of: at least one access request by the first master element; and a response to an access request from the at least one slave element.
摘要翻译：一种系统包括第一主元件; 以及布置成将第一主元件可操作地耦合到至少一个从属元件的至少一个共享通信元件。所述系统还包括位于位于所述第一主元件和所述至少一个从属元件之间的至少一个另外的验证路径上的至少一个验证元件，其中所述至少一个验证元件被布置成验证以下至少一个：至少一个由第一个主元素访问请求; 以及对来自所述至少一个从属单元的访问请求的响应。

4. 发明授权

US09152511B2 System for dynamically distributing an available memory resource to redundant and non-redundant storage areas using RAM routing logic 有权
标题翻译：使用RAM路由逻辑将可用内存资源动态分配到冗余和非冗余存储区域的系统
公开(公告)号：US09152511B2
公开(公告)日：2015-10-06
申请号：US12995317
申请日：2008-06-20
申请人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
发明人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
IPC分类号： G06F11/16 , G11C29/26 , G11C29/00 , G11C7/10 , G11C29/04
CPC分类号： G06F11/1666 , G06F11/1629 , G06F11/167 , G06F2201/845 , G11C7/1075 , G11C29/74 , G11C2029/0411
摘要： A system for distributing an available memory resource comprising at least two random access memory (RAM) elements and RAM routing logic. The RAM routing logic comprises configuration logic to dynamically distribute the available memory resource into a first memory area providing redundant memory storage and a second memory area providing non-redundant memory storage. The system may further comprise bus access ports which support at least one of concurrent access by a bus access port to access redundantly stored data or non-redundantly stored data, or concurrent access by at least two bus access ports to respective RAM elements to access redundantly stored data or to a respective one of the RAM elements to access non-redundantly stored data. Comparison logic and error detection or correction logic may be provided to detect or correct errors in information read from the RAM elements.
摘要翻译：一种用于分发包括至少两个随机存取存储器（RAM）元件和RAM路由逻辑的可用存储器资源的系统。 RAM路由逻辑包括用于动态地将可用存储器资源分配到提供冗余存储器存储器的第一存储器区域和提供非冗余存储器存储器的第二存储器区域的配置逻辑。该系统还可以包括总线访问端口，其支持总线访问端口的并发访问中的至少一个以访问冗余存储的数据或非冗余存储的数据，或者由至少两个总线访问端口到相应的RAM元件的并发访问以冗余访问存储数据或RAM元素中的相应一个以访问非冗余存储的数据。可以提供比较逻辑和错误检测或校正逻辑来检测或纠正从RAM元件读取的信息中的错误。

5. 发明申请

US20110083041A1 MEMORY SYSTEM WITH REDUNDANT DATA STORAGE AND ERROR CORRECTION 有权
标题翻译：具有冗余数据存储和错误校正的存储器系统
公开(公告)号：US20110083041A1
公开(公告)日：2011-04-07
申请号：US12995297
申请日：2008-06-20
申请人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
发明人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
IPC分类号： G06F11/14
CPC分类号： G06F11/167 , G11C29/74 , G11C2029/0411
摘要： A system comprises at least two random access memory (RAM) elements arranged to store data redundantly. The system further comprises RAM routing logic comprising comparison logic operably coupled to the at least two RAM elements and arranged to compare redundant data read from the at least two RAM elements, and check and validation logic, independent of the RAM routing logic, operably coupled to the at least two RAM elements and arranged to additionally detect an error in the redundant data read from the at least two RAM elements and provide an error indication signal to the RAM routing logic in response thereto. The RAM routing logic further comprises selection logic arranged to dynamically select redundant data from one of the at least two RAM elements based on the comparison of the redundant data and the error indication signal.
摘要翻译：系统包括被布置为冗余地存储数据的至少两个随机存取存储器（RAM）元件。所述系统还包括RAM路由逻辑，其包括可操作地耦合到所述至少两个RAM元件的比较逻辑，并且被布置为比较从所述至少两个RAM元素读取的冗余数据，以及独立于所述RAM路由逻辑的检查和验证逻辑，其可操作地耦合到所述至少两个RAM元件并且被布置为附加地检测从所述至少两个RAM元素读取的冗余数据中的错误，并且响应于此向RAM路由逻辑提供错误指示信号。 RAM路由逻辑还包括选择逻辑，其被布置为基于冗余数据和错误指示信号的比较来动态地从至少两个RAM元素中的一个RAM元素中选择冗余数据。

6. 发明申请

US20110082970A1 SYSTEM FOR DISTRIBUTING AVAILABLE MEMORY RESOURCE 有权
标题翻译：分配可用存储资源的系统
公开(公告)号：US20110082970A1
公开(公告)日：2011-04-07
申请号：US12995317
申请日：2008-06-20
申请人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
发明人： Michael Rohleder , Gary Hay , Stephan Mueller , Manfred Thanner
IPC分类号： G06F12/02
CPC分类号： G06F11/1666 , G06F11/1629 , G06F11/167 , G06F2201/845 , G11C7/1075 , G11C29/74 , G11C2029/0411
摘要： A system for distributing available memory resource comprising at least two random access memory (RAM) elements and RAM routing logic. The RAM routing logic comprises configuration logic to dynamically distribute the available memory resource into a first memory area providing redundant memory storage and a second memory area providing non-redundant memory storage.
摘要翻译：一种用于分发可用存储器资源的系统，包括至少两个随机存取存储器（RAM）元件和RAM路由逻辑。 RAM路由逻辑包括用于动态地将可用存储器资源分配到提供冗余存储器存储器的第一存储器区域和提供非冗余存储器存储器的第二存储器区域的配置逻辑。

7. 发明授权

US09781120B2 System on chip and method therefor 有权
公开(公告)号：US09781120B2
公开(公告)日：2017-10-03
申请号：US14899338
申请日：2013-07-18
申请人： Michael Rohleder , Gary Hay , Thomas Luedeke , Stephan Mueller
发明人： Michael Rohleder , Gary Hay , Thomas Luedeke , Stephan Mueller
IPC分类号： G06F12/14 , G06F21/62 , G06F21/76 , H04L29/06 , G06F21/78 , G06F1/00 , G06F21/30 , G06F21/60 , G06F21/79 , G06F21/70 , G06F13/00
CPC分类号： H04L63/101 , G06F1/00 , G06F21/30 , G06F21/60 , G06F21/70 , G06F21/78 , G06F21/79 , H04L63/08
摘要： A system on chip comprises a responder unit comprising a set of responder elements and an access control unit associated with an authorization list and the responder unit. An entry of the authorization list defines a set of access requirements in relation to an address space identifying at least part of the responder unit. The access control unit is arranged to: receive a request for access to a target responder element among the responder elements of the responder unit, determine the corresponding set of access requirements for the received access request from the authorization list, and evaluate the request for access with respect to the determined set of access requirements and generate a first request evaluation result. A protection unit associated with the responder unit is arranged to: provide a group assignment assigning a group to each of the responder elements of the responder unit, provide a group authorization list, an entry of the group authorization list defining a set of group access requirements for the group assigned, receive the request for access to the target responder element, determine the group assigned to the target responder element from the group assignment and further determine the set of group access requirements from the group authorization list for the group assigned. The system-on-chip also evaluates the request with respect to the determined set of group access requirements and generates a second request evaluation result. Interaction with the target responder element is controlled in response to the first and/or second evaluation result.

8. 发明授权

US09904802B2 System on chip 有权
公开(公告)号：US09904802B2
公开(公告)日：2018-02-27
申请号：US14647089
申请日：2012-11-23
申请人： Michael Rohleder , Stefan Singer , Manfred Thanner
发明人： Michael Rohleder , Stefan Singer , Manfred Thanner
IPC分类号： G06F21/71 , H04L29/06 , G06F21/78 , G06F21/74 , G06F21/62
CPC分类号： G06F21/71 , G06F21/6218 , G06F21/74 , G06F21/78 , G06F2217/66 , H04L63/105
摘要： A system on chip having two or more responder units and two or more protection units is provided. Each of the responder units comprises a set of responder elements. Each of the protection units is associated with and protects one of the responder units and is arranged to provide a group mapping. The group mapping assigns one or more group identifiers to each of the responder elements of the respective responder unit.

9. 发明授权

US09336411B2 System on chip 有权
标题翻译：片上系统
公开(公告)号：US09336411B2
公开(公告)日：2016-05-10
申请号：US14442241
申请日：2012-11-23
申请人： Michael Rohleder , Stefan Singer , Manfred Thanner
发明人： Michael Rohleder , Stefan Singer , Manfred Thanner
IPC分类号： G06F21/71 , G06F21/74 , G06F21/78 , G06F21/80
CPC分类号： G06F21/71 , G06F21/74 , G06F21/78 , G06F21/805 , G06F2213/0038
摘要： In a system on chip responder units comprise one or more responder elements and is associated with one or more protection units. A request analysis unit is arranged to receive from a requesting requestor unit a request for access to one or more target responder elements among responder elements within a target responder unit among the responder units. The request analysis unit determines relevant protection data based on the request and an authorization list, which comprises one or more entries For each entry of the authorization list: taking access requirements specified by the respective entry into account if one or more of the target responder elements are part of the group of responder elements specified by the respective entry. The request analysis unit provides the relevant protection data to one or more target protection unit(s) associated with the responder unit(s), and located in a hierarchical path between the requesting requestor unit requestor unit and the target responder unit. The target protection unit(s) are arranged to perform a protective action for the target responder elements based on relevant protection data.
摘要翻译：在系统片上响应器单元包括一个或多个应答器元件并与一个或多个保护单元相关联。请求分析单元被配置为从请求请求者单元接收对应答单元中的目标响应器单元内的响应者元素中的一个或多个目标响应者元素的访问请求。所述请求分析单元基于所述请求和授权列表来确定相关的保护数据，所述授权列表包括一个或多个条目对于授权列表的每个条目：如果一个或多个目标响应者元素考虑到由相应条目指定的访问要求是由相应条目指定的响应者元素组的一部分。请求分析单元将相关保护数据提供给与应答单元相关联的一个或多个目标保护单元，并且位于请求请求单元请求单元与目标应答单元之间的分层路径中。目标保护单元被设置为基于相关保护数据对目标响应者元素执行保护动作。

10. 发明授权

US09430230B2 Method for automated managing of the usage of alternative code and a processing system of operating thereof 有权
标题翻译：用于自动管理替代代码的使用的方法及其操作的处理系统
公开(公告)号：US09430230B2
公开(公告)日：2016-08-30
申请号：US14459419
申请日：2014-08-14
申请人： Tobias Thiel , Markus Regner , Michael Rohleder
发明人： Tobias Thiel , Markus Regner , Michael Rohleder
IPC分类号： G06F9/44
CPC分类号： G06F8/71 , G06F8/36 , G06F8/73 , G06F17/5045
摘要： The present application relates to a method and a processing system for automated managing of the usage of alternative code. Code sections including original code and alternative code are retrieved from a code basis and the retrieved code is analyzed to detect an alternative code section. A condition definition associated with the identified alternative code section is further retrieved and the condition of the retrieved condition definition is evaluated. The identified alternative code section is activated in accordance with the evaluation result.
摘要翻译：本申请涉及用于自动管理替代代码的使用的方法和处理系统。从代码基础中检索包括原始代码和替代代码的代码段，并分析检索到的代码以检测替代代码段。进一步检索与识别的替代代码部分相关联的条件定义，并且评估检索到的条件定义的条件。识别的替代代码部分根据评估结果被激活。

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