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    • 1. 发明授权
    • N-drive, p-common light-emitting devices fabricated on an n-type
substrate and method of making same
    • 在n型衬底上制造的N驱动p普通发光器件及其制造方法
    • US5892787A
    • 1999-04-06
    • US635838
    • 1996-04-22
    • Michael R. T. TanAlbert T. YuenShih-Yuan WangGhulam HasnainYu-Min Houng
    • Michael R. T. TanAlbert T. YuenShih-Yuan WangGhulam HasnainYu-Min Houng
    • H01S5/00H01L33/00H01L33/30H01S5/042H01S5/183H01S5/30H01S5/42H01S3/19
    • H01L33/30H01L33/0016H01L33/0062H01S5/18308H01S5/0207H01S5/0421H01S5/18305H01S5/2059H01S5/2063H01S5/3054H01S5/3095H01S5/423
    • A substantially n-type substrate structure having a p-type surface for use in semiconductor devices as a substitute for a p-type semiconductor substrate. The substrate structure comprises a substrate region and a buffer region. The substrate region is a region of n-type compound semiconductor, and includes a degeneratively n-doped portion adjacent its first surface. The buffer region is a region of compound semiconductor doped with a p-type dopant. The buffer region is located on the first surface of the substrate region and includes a surface remote from the substrate region that provides the p-type surface of the substrate structure. The buffer region also includes a degeneratively p-doped portion adjacent the degeneratively n-doped portion of the substrate region. The substrate structure includes a tunnel junction between the degeneratively n-doped portion of the substrate region and the degeneratively p-doped portion of the buffer region. The substrate structure is made by degeneratively doping a substrate region of n-type compound semiconductor material adjacent its first surface with an n-type impurity, and depositing a layer of compound semiconductor material doped with a p-type impurity on the first surface of the substrate region to form a buffer region that includes a surface remote from the substrate region. In the course of depositing the compound semiconductor material to form the buffer region, the compound semiconductor material is degeneratively doped with the p-type impurity at least in a portion adjacent the substrate region to form a tunnel junction between the substrate region and the buffer region.
    • 具有用于半导体器件的p型表面作为p型半导体衬底的替代物的基本为n型衬底结构。 衬底结构包括衬底区域和缓冲区域。 衬底区域是n型化合物半导体的区域,并且包括与其第一表面相邻的退化的n-掺杂部分。 缓冲区是掺杂有p型掺杂剂的化合物半导体的区域。 缓冲区域位于衬底区域的第一表面上并且包括远离衬底区域的表面,该表面提供衬底结构的p型表面。 缓冲区还包括与衬底区域的退化的n掺杂部分相邻的退化的p掺杂部分。 衬底结构包括在衬底区域的退化的n掺杂部分和缓冲区域的退化的p掺杂部分之间的隧道结。 衬底结构是通过用n型杂质将邻近其第一表面的n型化合物半导体材料的衬底区域简单地掺杂制成的,并且在第一表面上沉积掺杂有p型杂质的化合物半导体材料层 衬底区域以形成包括远离衬底区域的表面的缓冲区域。 在沉积化合物半导体材料以形成缓冲区的过程中,化合物半导体材料至少在与衬底区域相邻的部分中被p型杂质退变掺杂以在衬底区域和缓冲区域之间形成隧道结 。
    • 2. 发明授权
    • Current and heat spreading transparent layers for surface-emitting lasers
    • 用于表面发射激光器的电流和散热透明层
    • US5596595A
    • 1997-01-21
    • US486008
    • 1995-06-08
    • Michael R. T. TanYu-Min HoungShih-Yuan Wang
    • Michael R. T. TanYu-Min HoungShih-Yuan Wang
    • H01S3/04H01S5/00H01S5/024H01S5/042H01S5/183H01S3/08H01S3/18
    • H01S5/18308H01S5/02461H01S5/02476H01S5/0425
    • A surface-emitting laser includes optically transparent layers on a side of a DBR mirror structure that is opposite to an optical cavity of the laser. In one embodiment, the transparent layer is a heat-conducting layer that has an efficient heat transfer relationship with an opening in a top electrode and with a heat-spreading layer. The heat-spreading layer increases the diameter of the electrode, so as to reduce the thermal impedance of the surface-emitting laser. The heat-spreading layer may be annular in shape and may have an inside diameter that is less than the outside diameter of the electrode, allowing the heat-spreading layer to first overlap the electrode and then overlap the portion of the heat-conducting layer that resides on the inside portion of the electrode. In another embodiment, the optically transparent layer is positioned between the top electrode and the top DBR mirror structure of the surface-emitting laser. In this embodiment, the transparent layer is a current-spreading layer that reduces the lateral resistance of the laser. Lateral resistance is reduced by providing a layer having a thickness of one-half of the wavelength of the light energy generated in the laser times an odd multiple greater than one. Optionally, two half-wavelength layers may be formed between the electrode and the mirror structure, with the upper layer being selected primarily for its electrical properties and the lower layer being selected primarily for its optical properties.
    • 表面发射激光器包括在与激光器的光腔相对的DBR镜结构侧的光学透明层。 在一个实施例中,透明层是与顶部电极和散热层中的开口具有有效热传递关系的导热层。 散热层增加了电极的直径,从而降低了表面发射激光器的热阻抗。 散热层可以是环形的,并且可以具有小于电极的外径的内径,使得热扩散层首先与电极重叠,然后与导热层的部分重叠, 位于电极的内部。 在另一个实施例中,光学透明层位于表面发射激光器的顶部电极和顶部DBR镜面结构之间。 在本实施例中,透明层是降低激光器的横向电阻的电流扩散层。 通过提供具有在激光器中产生的光能的波长的一半的厚度的层的厚度乘以大于1的奇数倍来减小横向电阻。 可选地,可以在电极和反射镜结构之间形成两个半波长层,其中上层主要由于其电性质而选择,而下层主要由于其光学性质而选择。
    • 3. 发明申请
    • NANOWIRE-BASED PHOTOVOLTAIC ENERGY CONVERSION DEVICES AND RELATED FABRICATION METHODS
    • 基于纳米级的光伏能量转换器件及相关制造方法
    • US20130068286A1
    • 2013-03-21
    • US13261289
    • 2010-08-23
    • Shih-Ping WangNobuhiko KobayashiYu-Min Houng
    • Shih-Ping WangNobuhiko KobayashiYu-Min Houng
    • H01L31/042H01L31/18
    • H01L31/035227
    • Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For one preferred embodiment, a canopy-style tip-side electrode layer contacts the tip ends of the PV nanowires and is separated from the substrate surface layer by an air gap layer, the PV nanowires being disposed within the air gap layer. For another preferred embodiment, a tip-side electrode layer is disposed upon a layer of optically transparent, electrically insulating solid filler material that laterally surrounds the PV nanowires along a portion of their lengths, wherein an air gap is disposed between the solid filler layer and the substrate surface layer. Methods for fabricating the nanowire-based photovoltaic energy conversion devices are also described.
    • 描述了基于纳米线的光能转换装置及其制造方法。 多个光伏(PV)纳米线从衬底的表面层向外延伸,每个PV纳米线具有靠近衬底表面层的根端和与根端相对的尖端。 对于一个优选实施例,冠盖式末端侧电极层接触PV纳米线的末端,并通过气隙层与衬底表面层分离,PV纳米线设置在气隙层内。 对于另一个优选实施例,尖端侧电极层设置在沿其长度的一部分横向围绕PV纳米线的光学透明的电绝缘固体填充材料层上,其中气隙设置在固体填充层和 衬底表面层。 还描述了制造基于纳米线的光能转换装置的方法。
    • 4. 发明授权
    • Heterojunction bipolar transistor (HBT) having an improved emitter-base junction
    • 具有改进的发射极 - 基极结的异质结双极晶体管(HBT)
    • US06696710B2
    • 2004-02-24
    • US09796180
    • 2001-02-27
    • Nicolas J. MollYu-Min Houng
    • Nicolas J. MollYu-Min Houng
    • H01L310328
    • H01L29/7371H01L29/0817
    • A heterojunction bipolar transistor (HBT) having a base-emitter junction that exhibits the desirable properties of a GaAsSb/AlInAs interface, but which includes an intermediate layer in the emitter such that the intermediate layer contacts the GaAsSb base and the AlInAs emitter. The intermediate layer is sufficiently thin to be substantially electrically transparent, but sufficiently thick to provide a surface over which to grow the AlInAs emitter. The intermediate layer may be of a material such as InP, which has a bulk lattice constant that matches the lattice constant of the GaAsSb base and the AlInAs emitter. Alternatively, the intermediate layer may be of a material having a lattice constant different than that of the GaAsSb base and the AlInAs emitter, but may be pseudomorphically grown so as to provide an apparent lattice-match to the GaAsSb base and the AlInAs emitter.
    • 具有基极 - 发射极结的异质结双极晶体管(HBT),其表现出GaAsSb / AlInAs界面的所需性质,但是在发射极中包括中间层,使得中间层接触GaAsSb基极和AlInAs发射极。 中间层足够薄以至于基本上是电透明的,但是足够厚以提供在其上生长AlInAs发射体的表面。 中间层可以是诸如InP的材料,其具有与GaAsSb基极和AlInAs发射极的晶格常数匹配的体晶格常数。 或者,中间层可以是具有与GaAsSb基极和AlInAs发射极的晶格常数不同的晶格常数的材料,但是可以伪造生长以提供与GaAsSb基极和AlInAs发射极的表观晶格匹配。
    • 6. 发明授权
    • Nanowire-based photovoltaic energy conversion devices and related fabrication methods
    • 基于纳米线的光伏能量转换器件及相关制造方法
    • US09059344B2
    • 2015-06-16
    • US13261289
    • 2010-08-23
    • Shih-Ping WangNobuhiko KobayashiYu-Min Houng
    • Shih-Ping WangNobuhiko KobayashiYu-Min Houng
    • H01L31/0224H01L31/0352
    • H01L31/035227
    • Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For one preferred embodiment, a canopy-style tip-side electrode layer contacts the tip ends of the PV nanowires and is separated from the substrate surface layer by an air gap layer, the PV nanowires being disposed within the air gap layer. For another preferred embodiment, a tip-side electrode layer is disposed upon a layer of optically transparent, electrically insulating solid filler material that laterally surrounds the PV nanowires along a portion of their lengths, wherein an air gap is disposed between the solid filler layer and the substrate surface layer. Methods for fabricating the nanowire-based photovoltaic energy conversion devices are also described.
    • 描述了基于纳米线的光能转换装置及其制造方法。 多个光伏(PV)纳米线从衬底的表面层向外延伸,每个PV纳米线具有靠近衬底表面层的根端和与根端相对的尖端。 对于一个优选实施例,冠盖式末端侧电极层接触PV纳米线的末端,并通过气隙层与衬底表面层分离,PV纳米线设置在气隙层内。 对于另一个优选实施例,尖端侧电极层设置在沿其长度的一部分横向围绕PV纳米线的光学透明的电绝缘固体填充材料层上,其中气隙设置在固体填充层和 衬底表面层。 还描述了制造基于纳米线的光能转换装置的方法。
    • 9. 发明授权
    • Etching heterojunction interfaces
    • 蚀刻异质结界面
    • US06586113B1
    • 2003-07-01
    • US09619418
    • 2000-07-19
    • Sandeep R. BahlYu-Min HoungVirginia M. RobbinsFred Sugihwo
    • Sandeep R. BahlYu-Min HoungVirginia M. RobbinsFred Sugihwo
    • B32B900
    • H01L21/3065Y10T428/12528Y10T428/12681
    • Systems and methods of manufacturing etchable heterojunction interfaces and etched heterojunction structures are described. A bottom layer is deposited on a substrate, a transition etch layer is deposited over the bottom layer, and a top layer is deposited over the transition etch layer. The transition etch layer substantially prevents the bottom layer and the top layer from forming a material characterized by a composition substantially different than the bottom layer and a substantially non-selective etchability with respect to the bottom layer. By tailoring the structure of the heterojunction interface to respond to heterojunction etching processes with greater predictability and control, the transition etch layer enhances the robustness of previously unreliable heterojunction device manufacturing processes. The transition etch layer enables one or more vias to be etched down to the top surface of the bottom layer in a reliable and repeatable manner. In particular, because the transition etch layer enables use of an etchant that is substantially selective with respect to the bottom layer, the thickness of critical device layers may be determined by the precise epitaxial growth processes used to form the bottom layer rather than relatively imprecise non-selective etch processes.
    • 描述了制造可蚀刻异质结界面和蚀刻异质结结构的系统和方法。 底层沉积在衬底上,过渡蚀刻层沉积在底层上,顶层沉积在过渡蚀刻层上。 过渡蚀刻层基本上防止底层和顶层形成特征在于基本上不同于底层的组成和相对于底层的基本非选择性蚀刻性的材料。 通过调整异质结界面的结构以响应具有更大可预测性和控制性的异质结蚀刻工艺,过渡蚀刻层增强了先前不可靠的异质结器件制造工艺的鲁棒性。 过渡蚀刻层使得一个或多个通孔以可靠和可重复的方式被向下蚀刻到底层的顶表面。 特别地,由于过渡蚀刻层能够使用相对于底​​层基本选择性的蚀刻剂,关键器件层的厚度可以通过用于形成底层的精确的外延生长工艺来确定,而不是相对不精确的非 - 选择性蚀刻工艺。