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1. 发明申请

US20080136532A1 PHASE LOCKED LOOP WITH ADAPTIVE PHASE ERROR COMPENSATION 有权
标题翻译：相位锁定环路，具有自适应相位误差补偿
公开(公告)号：US20080136532A1
公开(公告)日：2008-06-12
申请号：US11608213
申请日：2006-12-07
申请人： Michael M. HUFFORD , Eric Naviasky , Tony Caviglia
发明人： Michael M. HUFFORD , Eric Naviasky , Tony Caviglia
IPC分类号： H03L7/089 , H03L7/08 , H03L7/085
CPC分类号： H03L7/081 , H03L7/0891 , H03L7/1976
摘要： An adaptive phase-locked loop (PLL) circuit produces an output signal having a frequency in reference to the frequency of a reference signal. The PLL circuit includes an oscillator configured to generate the output signal according to a frequency control signal, and a processing circuit configured to generate a feedback signal deriving from the output signal. An adjustable shift circuit is provided to time-shift the feedback signal. The PLL further includes a phase comparison circuit configured to generate a phase error signal indicating a phase error between the time-shifted feedback signal and the reference signal, and a control circuit configured to generate the frequency control signal based on the phase error signal. The adjustable shift circuit adjusts a time-shift amount to time-shift the feedback signal according to the phase error signal.
摘要翻译：自适应锁相环（PLL）电路产生具有参考参考信号的频率的频率的输出信号。 PLL电路包括被配置为根据频率控制信号产生输出信号的振荡器，以及被配置为产生从输出信号导出的反馈信号的处理电路。提供可调移位电路来对反馈信号进行时移。 PLL还包括相位比较电路，被配置为产生指示时移反馈信号和参考信号之间的相位误差的相位误差信号，以及配置为基于相位误差信号产生频率控制信号的控制电路。可调移位电路根据相位误差信号调整时移量以使反馈信号进行时移。

2. 发明授权

US07579886B2 Phase locked loop with adaptive phase error compensation 有权
标题翻译：具有自适应相位误差补偿的锁相环
公开(公告)号：US07579886B2
公开(公告)日：2009-08-25
申请号：US11608213
申请日：2006-12-07
申请人： Michael M. Hufford , Eric Naviasky , Tony Caviglia
发明人： Michael M. Hufford , Eric Naviasky , Tony Caviglia
IPC分类号： H03L7/06
CPC分类号： H03L7/081 , H03L7/0891 , H03L7/1976
摘要： An adaptive phase-locked loop (PLL) circuit produces an output signal having a frequency in reference to the frequency of a reference signal. The PLL circuit includes an oscillator configured to generate the output signal according to a frequency control signal, and a processing circuit configured to generate a feedback signal deriving from the output signal. An adjustable shift circuit is provided to time-shift the feedback signal. The PLL further includes a phase comparison circuit configured to generate a phase error signal indicating a phase error between the time-shifted feedback signal and the reference signal, and a control circuit configured to generate the frequency control signal based on the phase error signal. The adjustable shift circuit adjusts a time-shift amount to time-shift the feedback signal according to the phase error signal.
摘要翻译：自适应锁相环（PLL）电路产生具有参考参考信号的频率的频率的输出信号。 PLL电路包括被配置为根据频率控制信号产生输出信号的振荡器，以及被配置为产生从输出信号导出的反馈信号的处理电路。提供可调移位电路来对反馈信号进行时移。 PLL还包括相位比较电路，被配置为产生指示时移反馈信号和参考信号之间的相位误差的相位误差信号，以及配置为基于相位误差信号产生频率控制信号的控制电路。可调移位电路根据相位误差信号调整时移量以使反馈信号进行时移。

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