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1. 发明授权

US5847578A Programmable multiplexing input/output port 失效
标题翻译：可编程复用输入/输出端口
公开(公告)号：US5847578A
公开(公告)日：1998-12-08
申请号：US780527
申请日：1997-01-08
申请人： Michael Donald Noakes , Charles W. Selvidge , Anant Argarwal , Jonathan Babb , Matthew L. Dahl
发明人： Michael Donald Noakes , Charles W. Selvidge , Anant Argarwal , Jonathan Babb , Matthew L. Dahl
IPC分类号： H03K19/173 , H03K7/38 , H03K19/00
CPC分类号： G06F17/5054 , H03K19/1732 , H03K19/1737
摘要： A programmable logic circuit includes a programmable logic array which generates a plurality of output signals for output from a single port on the programmable logic circuit, and which processes a plurality of input signals received from a single port on the programmable logic circuit. The programmable logic circuit also includes multiplexing means for receiving the plurality of output signals generated by the programmable logic array and for multiplexing the plurality of output signals. An output port outputs, from the programmable logic circuit, the multiplexed plurality of output signals generated by the programmable logic array. An input port receives a multiplexed plurality of input signals, and a demultiplexing means demultiplexes the multiplexed plurality of input signals and configurably communicates the demultiplexed plurality of input signals to the programmable logic array. This demultiplexing means and the multiplexing means are each operable at a clock speed which is different from a clock speed of the programmable logic array.
摘要翻译：可编程逻辑电路包括可编程逻辑阵列，其产生用于从可编程逻辑电路上的单个端口输出的多个输出信号，并且其处理从可编程逻辑电路上的单个端口接收的多个输入信号。可编程逻辑电路还包括用于接收由可编程逻辑阵列产生的多个输出信号并用于复用多个输出信号的多路复用装置。输出端口从可编程逻辑电路输出由可编程逻辑阵列产生的复用的多个输出信号。输入端口接收复用的多个输入信号，并且解复用装置对多路复用的多个输入信号进行解复用，并将可解复用的多个输入信号可配置地传送到可编程逻辑阵列。该解复用装置和多路复用装置各自以与可编程逻辑阵列的时钟速度不同的时钟速度工作。

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