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1. 发明授权

US09502638B2 Method of manufacturing flexible piezoelectric structures 有权
标题翻译：柔性压电结构的制造方法
公开(公告)号：US09502638B2
公开(公告)日：2016-11-22
申请号：US13566738
申请日：2012-08-03
申请人： Michael C. McAlpine , Yi Qi
发明人： Michael C. McAlpine , Yi Qi
IPC分类号： H01L41/314 , H01L21/762 , H01L41/09 , H01L41/08 , H01L41/053 , A61L31/16 , A61K51/12 , A61B5/0408
CPC分类号： H01L41/314 , A61B5/0408 , A61K51/1282 , A61L31/16 , H01L21/76251 , H01L21/76259 , H01L41/0533 , H01L41/0805 , H01L41/0986 , Y10T29/42 , Y10T29/49124
摘要： A method of making a flexible piezoelectric structure is disclosed. A piezoelectric film is deposited by film deposition on a planar substrate. A biocompatible flexible substrate is contacted with the piezoelectric film. The piezoelectric film and biocompatible flexible substrate are separated from the planar substrate, and the piezoelectric film remaining is attached to the biocompatible flexible substrate.
摘要翻译：公开了制造柔性压电结构的方法。通过膜沉积在平面基板上沉积压电膜。生物相容性柔性基板与压电膜接触。将压电膜和生物相容性柔性基板从平面基板分离，剩下的压电膜附着在生物相容的柔性基板上。

2. 发明申请

US20120312456A1 FLEXIBLE PIEZOELECTRIC STRUCTURES AND METHOD OF MAKING SAME 有权
标题翻译：柔性压电结构及其制造方法
公开(公告)号：US20120312456A1
公开(公告)日：2012-12-13
申请号：US13566738
申请日：2012-08-03
申请人： Michael C. McAlpine , Yi Qi
发明人： Michael C. McAlpine , Yi Qi
IPC分类号： H01L41/22
CPC分类号： H01L41/314 , A61B5/0408 , A61K51/1282 , A61L31/16 , H01L21/76251 , H01L21/76259 , H01L41/0533 , H01L41/0805 , H01L41/0986 , Y10T29/42 , Y10T29/49124
摘要： A flexible piezoelectric structure and a method of making the structure are disclosed. A piezoelectric film having a relatively high piezoelectric coefficient is attached to a flexible substrate. The piezoelectric film is fabricated on a different substrate and transferred to the flexible substrate by contact.
摘要翻译：公开了柔性压电结构和制造该结构的方法。将具有较高压电系数的压电膜附着在柔性基板上。压电薄膜制造在不同的基底上，并通过接触转移到柔性基底上。

3. 发明申请

US20110109203A1 FLEXIBLE PIEZOELECTRIC STRUCTURES AND METHOD OF MAKING SAME 审中-公开
标题翻译：柔性压电结构及其制造方法
公开(公告)号：US20110109203A1
公开(公告)日：2011-05-12
申请号：US12727798
申请日：2010-03-19
申请人： Michael C. McAlpine , Yi Qi
发明人： Michael C. McAlpine , Yi Qi
IPC分类号： H01L41/053 , H01L41/22
CPC分类号： H01L41/314 , A61B5/0408 , A61K51/1282 , A61L31/16 , H01L21/76251 , H01L21/76259 , H01L41/0533 , H01L41/0805 , H01L41/0986 , Y10T29/42 , Y10T29/49124
摘要： A flexible piezoelectric structure and a method of making the structure are disclosed. A piezoelectric film having a relatively high piezoelectric coefficient is attached to a flexible substrate. The piezoelectric film is fabricated on a different substrate and transferred to the flexible substrate by contact.
摘要翻译：公开了柔性压电结构和制造该结构的方法。将具有较高压电系数的压电膜附着在柔性基板上。压电薄膜制造在不同的基底上，并通过接触转移到柔性基底上。

4. 发明申请

US20140183551A1 BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS 有权
公开(公告)号：US20140183551A1
公开(公告)日：2014-07-03
申请号：US13729207
申请日：2012-12-28
申请人： Laegu Kang , Vara Govindeswara Reddy Vakada , Michael P. Ganz , Yi Qi , Puneet Khanna , Sri Charan Vemula , Srikanth Samavedam
发明人： Laegu Kang , Vara Govindeswara Reddy Vakada , Michael P. Ganz , Yi Qi , Puneet Khanna , Sri Charan Vemula , Srikanth Samavedam
IPC分类号： H01L21/762 , H01L29/16
CPC分类号： H01L29/0692 , H01L21/76224 , H01L21/823807 , H01L21/823878 , H01L21/823892 , H01L29/0649 , H01L29/1054 , H01L29/1095 , H01L29/165 , H01L29/167 , H01L29/66651
摘要： A method of forming SSRW FETs with controlled step height between a field oxide and epitaxially grown silicon and the resulting devices are provided. Embodiments include providing a SiN layer on a substrate, forming first, second, and third spaced STI regions of field oxide through the SiN layer and into the substrate, removing a top portion of the field oxide for each STI region by a controlled deglaze, removing the SiN layer, forming an n-type region in the substrate between the first and second STI regions and a p-type region in the substrate between the second and third STI regions, and epitaxially growing a Si based layer on the substrate over the n-type and p-type regions.
摘要翻译：提供了在场氧化物和外延生长的硅之间形成具有受控步长的SSRW FET的方法以及所得到的器件。实施例包括在衬底上提供SiN层，通过SiN层形成第一，第二和第三间隔的场区氧化物的STI区域并进入衬底，通过受控的消光去除每个STI区域的场氧化物的顶部部分，去除 SiN层，在第一和第二STI区域之间的衬底中形成n型区域和在第二和第三STI区域之间的衬底中的p型区域，并且在衬底上在n上外延生长Si基层型和p型区。

5. 发明申请

US20140070358A1 METHOD OF TAILORING SILICON TRENCH PROFILE FOR SUPER STEEP RETROGRADE WELL FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：用于超级退火井场效应晶体管的硅介质轮廓的方法
公开(公告)号：US20140070358A1
公开(公告)日：2014-03-13
申请号：US13612032
申请日：2012-09-12
申请人： Yi Qi , Puneet Khanna , Srikanth Samavedam , Vara G. Vakada , Michael P. Ganz , Sri Charan Vemula , Laegu Kang , Bharat V. Krishnan
发明人： Yi Qi , Puneet Khanna , Srikanth Samavedam , Vara G. Vakada , Michael P. Ganz , Sri Charan Vemula , Laegu Kang , Bharat V. Krishnan
IPC分类号： H01L29/06 , H01L21/76
CPC分类号： H01L21/76224 , H01L21/02381 , H01L21/02529 , H01L21/02658
摘要： A methodology is disclosed enabling the formation of silicon trench profiles for devices, such as SSRW FETs, having a resultant profile that enables desirable epitaxial growth of semiconductor materials. Embodiments include forming a trench in a silicon wafer between STI regions, thermally treating the silicon surfaces of the trench, and forming Si:C in the trench. The process eliminates a need for an isotropic silicon etch to achieve a desirable flat surface. Further, the flat bottom surface provides a desirable surface for epitaxial growth of semiconductor materials, such as Si:C.
摘要翻译：公开了一种能够形成用于诸如SSRW FET的器件的硅沟槽轮廓的方法，其具有能够实现半导体材料的期望的外延生长的合成轮廓。实施例包括在STI区域之间的硅晶片中形成沟槽，热处理沟槽的硅表面，并在沟槽中形成Si：C。该方法消除了对各向同性硅蚀刻的需要以实现期望的平坦表面。此外，平坦的底表面为诸如Si：C的半导体材料的外延生长提供期望的表面。

6. 发明申请

US20130067435A1 METHOD AND APPARATUS FOR PROGRAMMING ASSISTANCE 有权
标题翻译：编程辅助的方法和装置
公开(公告)号：US20130067435A1
公开(公告)日：2013-03-14
申请号：US13606094
申请日：2012-09-07
申请人： Sheng Huang , Shao Chun Li , Ying Liu , Ming Lou , Yi Qi , Jun Zhu
发明人： Sheng Huang , Shao Chun Li , Ying Liu , Ming Lou , Yi Qi , Jun Zhu
IPC分类号： G06F9/44
CPC分类号： G06F8/33
摘要： A programming assistance technical solution for a framework-based application program. The application program contains program files and configuration files, including: processing configuration files of an application program history base into a configuration file classification base according to types of frameworks; constructing a Closed Frequent Subtree Set according to the configuration file classification base and determining a support of the Closed Frequent Subtree; and providing the Closed Frequent Subtree Set and the support for programming assistance. The technical solution of the present invention can be employed to assist in programming of a framework-based application program.
摘要翻译：用于基于框架的应用程序的编程辅助技术解决方案。应用程序包含程序文件和配置文件，包括：根据框架的类型，将应用程序历史库的配置文件处理成配置文件分类库; 根据配置文件分类基础构建关闭频繁子树组，并确定关闭频繁子树的支持; 并提供关闭频繁子树组和对编程帮助的支持。本发明的技术方案可用于协助编程基于框架的应用程序。

7. 发明授权

US09099525B2 Blanket EPI super steep retrograde well formation without Si recess 有权
标题翻译：毯子EPI超陡逆行井形成无Si凹陷
公开(公告)号：US09099525B2
公开(公告)日：2015-08-04
申请号：US13729207
申请日：2012-12-28
申请人： Laegu Kang , Vara Govindeswara Reddy Vakada , Michael P. Ganz , Yi Qi , Puneet Khanna , Sri Charan Vemula , Srikanth Samavedam
发明人： Laegu Kang , Vara Govindeswara Reddy Vakada , Michael P. Ganz , Yi Qi , Puneet Khanna , Sri Charan Vemula , Srikanth Samavedam
IPC分类号： H01L21/762 , H01L29/66 , H01L29/10 , H01L21/8238 , H01L29/165
CPC分类号： H01L29/0692 , H01L21/76224 , H01L21/823807 , H01L21/823878 , H01L21/823892 , H01L29/0649 , H01L29/1054 , H01L29/1095 , H01L29/165 , H01L29/167 , H01L29/66651
摘要： A method of forming SSRW FETs with controlled step height between a field oxide and epitaxially grown silicon and the resulting devices are provided. Embodiments include providing a SiN layer on a substrate, forming first, second, and third spaced STI regions of field oxide through the SiN layer and into the substrate, removing a top portion of the field oxide for each STI region by a controlled deglaze, removing the SiN layer, forming an n-type region in the substrate between the first and second STI regions and a p-type region in the substrate between the second and third STI regions, and epitaxially growing a Si based layer on the substrate over the n-type and p-type regions.
摘要翻译：提供了在场氧化物和外延生长的硅之间形成具有受控步长的SSRW FET的方法以及所得到的器件。实施例包括在衬底上提供SiN层，通过SiN层形成第一，第二和第三间隔的场区氧化物的STI区域并进入衬底，通过受控的消光去除每个STI区域的场氧化物的顶部部分，去除 SiN层，在第一和第二STI区域之间的衬底中形成n型区域和在第二和第三STI区域之间的衬底中的p型区域，并且在衬底上在n上外延生长Si基层型和p型区。

8. 发明授权

US09229691B2 Method and apparatus for programming assistance 有权
标题翻译：用于编程辅助的方法和装置
公开(公告)号：US09229691B2
公开(公告)日：2016-01-05
申请号：US13606094
申请日：2012-09-07
申请人： Sheng Huang , Shao Chun Li , Ying Liu , Ming Lou , Yi Qi , Jun Zhu
发明人： Sheng Huang , Shao Chun Li , Ying Liu , Ming Lou , Yi Qi , Jun Zhu
IPC分类号： G06F9/44
CPC分类号： G06F8/33
摘要： A programming assistance technical solution for a framework-based application program. The application program contains program files and configuration files, including: processing configuration files of an application program history base into a configuration file classification base according to types of frameworks; constructing a Closed Frequent Subtree Set according to the configuration file classification base and determining a support of the Closed Frequent Subtree; and providing the Closed Frequent Subtree Set and the support for programming assistance. The technical solution of the present invention can be employed to assist in programming of a framework-based application program.
摘要翻译：用于基于框架的应用程序的编程辅助技术解决方案。应用程序包含程序文件和配置文件，包括：根据框架的类型，将应用程序历史库的配置文件处理成配置文件分类库; 根据配置文件分类基础构建关闭频繁子树组，并确定关闭频繁子树的支持; 并提供关闭频繁子树组和对编程帮助的支持。本发明的技术方案可用于协助编程基于框架的应用程序。

9. 发明申请

US20140044889A1 METHODS OF MAKING STRESSED MATERIAL LAYERS AND A SYSTEM FOR FORMING SUCH LAYERS 审中-公开
标题翻译：制造受压材料层的方法和形成这样的层的系统
公开(公告)号：US20140044889A1
公开(公告)日：2014-02-13
申请号：US13571604
申请日：2012-08-10
申请人： Yi Qi , Chandra Reddy
发明人： Yi Qi , Chandra Reddy
IPC分类号： C23C14/28
CPC分类号： C23C16/45536 , C23C16/45551 , C23C16/482
摘要： Disclosed herein are various methods of making stressed material layers and a system for forming such layers. In one example, a deposition/irradiation system disclosed herein includes a process chamber, a wafer stage positioned within the process chamber, a deposition region and an irradiation region within the process chamber, wherein the system is adapted to separate the deposition region and the irradiation region by generating at least one isolating gas region between the deposition region and the irradiation region, means for supplying a precursor gas to the deposition region, means for supplying ultraviolet radiation to the irradiation region and means for supplying an isolation gas to the at least one isolating gas region.
摘要翻译：本文公开了制备应力材料层的各种方法和用于形成这种层的系统。在一个示例中，本文公开的沉积/照射系统包括处理室，位于处理室内的晶片台，处理室内的沉积区域和照射区域，其中该系统适于分离沉积区域和照射通过在所述沉积区域和所述照射区域之间产生至少一个隔离气体区域，用于向所述沉积区域供应前体气体的装置，用于向所述照射区域供应紫外线辐射的装置和用于向所述至少一个隔离气体区域。

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