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    • 4. 发明申请
    • Coaxial Capacitor Bus Termination
    • 同轴电容总线终端
    • US20120229977A1
    • 2012-09-13
    • US13416900
    • 2012-03-09
    • Terry HoskingMichael Brubaker
    • Terry HoskingMichael Brubaker
    • H05K7/20H03H7/00
    • H01G9/008G06F13/4086H01G4/35H02M7/003
    • Parallel plate bus structures are commonly used for high-current applications where low inductance is a requirement. Such bus structures are very well suited for inverter topologies used to convert from DC to AC power and a capacitor is needed to minimize ripple on the DC bus. However, such arrangements are not able to provide sufficiently low inductance to easily eliminate bypass capacitors which typically requires a system inductance below 10 nH nor do they provide any natural EMI suppression. The present invention utilizes that natural circular symmetry of a circular film capacitor winding by implementing a coaxial shaped bus connection from the capacitor to the switching semiconductors in the DC bus application of DC to AC inverter. The result is an achievement of lower ESL and geometry based EMI suppression without the use of external-lumped filtering components.
    • 平行板总线结构通常用于要求低电感的大电流应用。 这种总线结构非常适合用于从直流转换为交流电源的逆变器拓扑,并且需要电容器来最小化直流总线上的纹波。 然而,这种布置不能提供足够低的电感以容易地消除通常需要低于10nH的系统电感的旁路电容器,也不提供任何自然的EMI抑制。 本发明通过在直流到交流逆变器的直流总线应用中实现从电容器到开关半导体的同轴形状的总线连接,利用圆形电容器绕组的自然圆形对称性。 结果是在不使用外部集总滤波组件的情况下实现较低的ESL和基于几何的EMI抑制。
    • 6. 发明申请
    • PATTERNED METALLIZED FILM WITH ENHANCED UNDERLAYER FOR METALLIZED CAPACITOR APPLICATIONS
    • 用于金属化电容器应用的具有增强底层的图案化金属膜
    • US20120287554A1
    • 2012-11-15
    • US13397105
    • 2012-02-15
    • Terry Hosking
    • Terry Hosking
    • H01G4/32
    • H01G4/32H01G4/008H01G4/015H01G4/14
    • A technique is described for increasing the capacitance of a metallized polymer film capacitor where the capacitor electrodes have been fabricated with so-called patterned film. The pattern as typically embodied by prior art allows the capacitor to better survive dielectric failures, or exhibit improved tolerance to extreme pulse current. The pattern is created by areas on the capacitor electrodes which have no metal, so there will be a capacitance reduction penalty for using said patterned electrodes. Each section of the pattern is connected by a local fuse, which is disconnected from the rest of the capacitor when the current flowing through a defect vaporizes the surrounding metal. An extremely light metallization underlayer is described which allows the better survival characteristic provided by pattern film should a dielectric failure occur, yet mitigates the capacitance loss previously seen for capacitors made with conventional patterned metallized electrodes on the capacitor film.
    • 描述了一种用于增加金属化聚合物膜电容器的电容的技术,其中电容器电极已经用所谓的图案化膜制造。 通常由现有技术体现的图案允许电容器更好地承受介电故障,或显示出对极端脉冲电流的改善的容限。 该图案由电容器电极上没有金属的区域产生,因此对于使用所述图案化电极将产生电容减小损失。 图案的每个部分通过本地熔断器连接,当流过缺陷的电流使周围的金属蒸发时,该熔断器与电容器的其余部分断开。 描述了一种非常轻的金属化底层,其允许在发生介电故障时由图案膜提供的更好的存活特性,而减轻了先前在电容器膜上用传统图案化金属化电极制成的电容器所观察到的电容损耗。
    • 7. 发明申请
    • Annular Capacitor with power conversion components arranged and attached in manners uniquely allowed by the ring shaped form factor
    • 具有功率转换元件的环形电容器以环形形状因子唯一允许的方式排列和附接
    • US20100321859A1
    • 2010-12-23
    • US12807310
    • 2008-10-30
    • Terry Hosking
    • Terry Hosking
    • H01G4/32H05K7/00H05K7/20
    • H01G4/228H01G2/14H01G4/32H01G9/08
    • The formation of an assembled unit consisting of an annular capacitor [a wound, metallized dielectric capacitor in the shape of a closed path ring] with other power conversion components arranged and attached in manners uniquely allowed by the ring design will allow higher density converter designs [power/unit volume]. The resulting short connection paths between the capacitor element and the switching semiconductors also provide a very low inductance path that minimizes voltage spikes on the switching semiconductors as a result of turn-off di/dt. The capacitor serves as a short time current source and sink for the switching semiconductors. With the described configuration the RMS current seen by the capacitor can be made more volumetrically uniform enabling more uniform capacitor rise. The single capacitor configured as described also mitigates bus resonance problems often observed in prior art when multiple discrete capacitors are connected in parallel.
    • 组合单元的形成由环形电容器[具有封闭路径环形的绕制金属化介质电容器]和以环形设计唯一允许的方式布置和附接的其它功率转换部件将允许更高密度的转换器设计[ 功率/单位体积]。 电容器元件和开关半导体之间产生的短连接路径也提供了非常低的电感路径,其最小化由于截止di / dt导致的开关半导体上的电压尖峰。 电容器用作开关半导体的短时间电流源和吸收器。 通过上述配置,可以使电容器所看到的RMS电流更加体积均匀,使电容器上升更均匀。 如上所述配置的单个电容器还减轻了当多个分立电容器并联连接时在现有技术中经常观察到的总线谐振问题。