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1. 发明授权

US06368958B2 Method to deposit a cooper seed layer for dual damascence interconnects 失效
标题翻译：沉积铜离子种子层用于双重马氏体互连的方法
公开(公告)号：US06368958B2
公开(公告)日：2002-04-09
申请号：US09876598
申请日：2001-06-08
申请人： Paul Kwok Keung Ho , Subhash Gupta , Mei Sheng Zhou , Simon Chooi
发明人： Paul Kwok Keung Ho , Subhash Gupta , Mei Sheng Zhou , Simon Chooi
IPC分类号： H01L214763
CPC分类号： H01L21/76843 , C23C18/1608 , C25D7/123 , H01L21/288 , H01L21/76873 , H01L21/76874 , H01L21/76877
摘要： A new method of depositing a copper layer, using disproportionation of Cu(I) ions from a solution stabilized by a polar organic solvent, for single and dual damascene interconnects in the manufacture of an integrated circuit device has been achieved. A dielectric layer, which may comprise a stack of dielectric material, is provided overlying a semiconductor substrate. The dielectric layer is patterned to form vias and trenches for planned dual damascene interconnects. A barrier layer is deposited overlying the dielectric layer to line the vias and trenches. A simple Cu(I) ion solution, stabilized by a polar organic solvent, is coated overlying said barrier layer. Water is added to the stabilized simple Cu(I) ion solution to cause disproportionation of the simple Cu(I) ion from the Cu(I) ion solution. A copper layer is deposited overlying the barrier layer. The copper layer may comprise a thin seed layer for use in subsequent electroplating or electroless plating of copper or may comprise a thick copper layer to fill the vias and trenches. The integrated circuit is completed.
摘要翻译：已经实现了在制造集成电路器件中使用Cu（I）离子从由极性有机溶剂稳定的溶液中进行歧化的单层和双镶嵌互连的沉积铜层的新方法。提供覆盖在半导体衬底上的介电层，其可以包括电介质材料的叠层。图案化电介质层以形成用于计划的双镶嵌互连的通孔和沟槽。沉积覆盖在介电层上的阻挡层以对通孔和沟槽进行排列。将由极性有机溶剂稳定的简单的Cu（I）离子溶液涂覆在所述阻挡层上。向稳定化的简单的Cu（I）离子溶液中加入水以引起Cu（I）离子溶液中简单的Cu（I）离子的歧化。沉积在屏障层上的铜层。铜层可以包括用于铜的后续电镀或无电镀的薄种子层，或者可以包括用于填充通孔和沟槽的厚铜层。集成电路完成。

2. 发明授权

US06261954B1 Method to deposit a copper layer 失效
标题翻译：沉积铜层的方法
公开(公告)号：US06261954B1
公开(公告)日：2001-07-17
申请号：US09501968
申请日：2000-02-10
申请人： Paul Kwok Keung Ho , Subhash Gupta , Mei Sheng Zhou , Simon Chooi
发明人： Paul Kwok Keung Ho , Subhash Gupta , Mei Sheng Zhou , Simon Chooi
IPC分类号： H01L2144
CPC分类号： H01L21/76843 , C23C18/1608 , C25D7/123 , H01L21/288 , H01L21/76873 , H01L21/76874 , H01L21/76877
摘要： A new method of depositing a copper layer, using disproportionation of Cu(I) ions from a solution stabilized by a polar organic solvent, for single and dual damascene interconnects in the manufacture of an integrated circuit device has been achieved. A dielectric layer, which may comprise a stack of dielectric material, is provided overlying a semiconductor substrate. The dielectric layer is patterned to form vias and trenches for planned dual damascene interconnects. A barrier layer is deposited overlying the dielectric layer to line the vias and trenches. A simple Cu(I) ion solution, stabilized by a polar organic solvent, is coated overlying said barrier layer. Water is added to the stabilized simple Cu(I) ion solution to cause disproportionation of the simple Cu(I) ion from the Cu(I) ion solution. A copper layer is deposited overlying the barrier layer. The copper layer may comprise a thin seed layer for use in subsequent electroplating or electroless plating of copper or may comprise a thick copper layer to fill the vias and trenches. The integrated circuit is completed.
摘要翻译：已经实现了在制造集成电路器件中使用Cu（I）离子从由极性有机溶剂稳定的溶液中进行歧化的单层和双镶嵌互连的沉积铜层的新方法。提供覆盖在半导体衬底上的介电层，其可以包括电介质材料的叠层。图案化电介质层以形成用于计划的双镶嵌互连的通孔和沟槽。沉积覆盖在介电层上的阻挡层以对通孔和沟槽进行排列。将由极性有机溶剂稳定的简单的Cu（I）离子溶液涂覆在所述阻挡层上。向稳定化的简单的Cu（I）离子溶液中加入水以引起Cu（I）离子溶液中简单的Cu（I）离子的歧化。沉积在屏障层上的铜层。铜层可以包括用于铜的后续电镀或无电镀的薄种子层，或者可以包括用于填充通孔和沟槽的厚铜层。集成电路完成。

3. 发明授权

US06540841B1 Method and apparatus for removing contaminants from the perimeter of a semiconductor substrate 失效
标题翻译：从半导体衬底的周边去除污染物的方法和装置
公开(公告)号：US06540841B1
公开(公告)日：2003-04-01
申请号：US09607284
申请日：2000-06-30
申请人： Sudipto Ranendra Roy , Subhash Gupta , Simon Chooi , Xu Yi , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono , Paul Kwok Keung Ho
发明人： Sudipto Ranendra Roy , Subhash Gupta , Simon Chooi , Xu Yi , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono , Paul Kwok Keung Ho
IPC分类号： B08B700
CPC分类号： B08B1/04 , B08B3/04
摘要： A new method and apparatus is provided that can be applied to clean outer edges of semiconductor substrates. Under the first embodiment of the invention, a brush is mounted on the surface of the substrate around the periphery of the substrate, chemicals are fed to the surface that is being cleaned by means of a hollow core on which the cleaning brush is mounted. The surface that is being cleaned rotates at a relatively high speed thereby causing the chemicals that are deposited on this surface (by the brush) to remain in the edge of the surface. Under the second embodiment of the invention, a porous roller is mounted between a chemical reservoir and the surface that is being cleaned, the surface that is being cleaned rotates at a relatively high speed. The chemicals that are deposited by the interfacing porous roller onto the surface that is being cleaned therefore remain at the edge of this surface thereby causing optimum cleaning action of the edge of the surface. After contaminants have been removed in this manner from the surface, the surface can be further cleaned by applying DI water.
摘要翻译：提供了可用于清洁半导体衬底的外边缘的新方法和装置。在本发明的第一实施例中，刷子安装在基板周围的基板的表面上，化学品通过其上安装有清洁刷的中空芯被供给到待清洁的表面。待清洁的表面以相对高的速度旋转，从而使沉积在该表面（由刷子）上的化学物质残留在表面的边缘。在本发明的第二实施例中，多孔辊安装在化学容器和待清洁的表面之间，待清洁的表面以相对较高的速度旋转。因此，由界面多孔辊沉积在待清洗的表面上的化学物质保留在该表面的边缘，从而引起表面边缘的最佳清洁作用。污染物以这种方式从表面除去后，可以通过加入去离子水进一步清洁表面。

4. 发明授权

US06475810B1 Method of manufacturing embedded organic stop layer for dual damascene patterning 失效
标题翻译：用于双镶嵌图案的嵌入式有机停止层的制造方法
公开(公告)号：US06475810B1
公开(公告)日：2002-11-05
申请号：US09636579
申请日：2000-08-10
申请人： Mei Sheng Zhou , John Leonard Sudijono , Subhash Gupta , Sudipto Ranendra Roy , Paul Kwok Keung Ho , Yi Xu , Simon Chooi , Yakub Aliyu
发明人： Mei Sheng Zhou , John Leonard Sudijono , Subhash Gupta , Sudipto Ranendra Roy , Paul Kwok Keung Ho , Yi Xu , Simon Chooi , Yakub Aliyu
IPC分类号： H01L2158
CPC分类号： H01L21/76834 , H01L21/31116 , H01L21/31138 , H01L21/76807 , H01L21/76832
摘要： A new method of forming a dual damascene interconnect structure, wherein damage of interconnect and contamination of dielectrics during etching is minimized by having an embedded organic stop layer over the lower interconnect and later etching the organic stop layer with an H2 containing plasma, or hydrogen radical.
摘要翻译：形成双镶嵌互连结构的新方法，其中在蚀刻期间互连和电介质污染的损害最小化，在下互连上具有嵌入的有机阻挡层，并且随后用含H2的等离子体或氢自由基蚀刻有机阻挡层。

5. 发明授权

US06358821B1 Method of copper transport prevention by a sputtered gettering layer on backside of wafer 有权
标题翻译：通过晶片背面的溅射吸气层预防铜传输的方法
公开(公告)号：US06358821B1
公开(公告)日：2002-03-19
申请号：US09619376
申请日：2000-07-19
申请人： Subhash Gupta , Simon Chooi , Sudipto Ranendra Roy , Paul Kwok Keung Ho , Xu Yi , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono
发明人： Subhash Gupta , Simon Chooi , Sudipto Ranendra Roy , Paul Kwok Keung Ho , Xu Yi , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono
IPC分类号： H01L2122
CPC分类号： H01L21/3221 , C23C14/165 , H01L21/2885
摘要： A method of preventing copper transport on a semiconductor wafer, comprising the following steps. A semiconductor wafer having a front side and a backside is provided. Metal, selected from the group comprising aluminum, aluminum-copper, aluminum-silicon, and aluminum-copper-silicon is sputtered on the backside of the wafer to form a layer of metal. The back side sputtered aluminum layer may be partially oxidized at low temperature to further decrease the copper penetration possibility and to also provide greater flexibility in subsequent copper interconnect related processing. Once the back side layer is in place, the wafer can be processed as usual. The sputtered back side aluminum layer can be removed during final backside grinding.
摘要翻译：一种防止半导体晶片上的铜传输的方法，包括以下步骤。提供具有正面和背面的半导体晶片。从包括铝，铝 - 铜，铝 - 硅和铝 - 铜 - 硅的组中选择的金属溅射在晶片的背面以形成一层金属。背面溅射的铝层可以在低温下部分氧化，以进一步降低铜的渗透可能性，并且在随后的铜互连相关处理中也提供更大的灵活性。一旦背面层就位，就可以照常处理晶片。最后的背面研磨可以除去溅射的背面铝层。

6. 发明授权

US06274499B1 Method to avoid copper contamination during copper etching and CMP 有权
标题翻译：在铜蚀刻和CMP期间避免铜污染的方法
公开(公告)号：US06274499B1
公开(公告)日：2001-08-14
申请号：US09442493
申请日：1999-11-19
申请人： Subhash Gupta , Paul Kwok Keung Ho , Mei Sheng Zhou , Ramasamy Chockalingam
发明人： Subhash Gupta , Paul Kwok Keung Ho , Mei Sheng Zhou , Ramasamy Chockalingam
IPC分类号： H01L21302
CPC分类号： H01L21/76801 , H01L21/3212 , H01L21/32134 , H01L21/76807 , H01L21/76834
摘要： In accordance with the objects of this invention a new method to prevent copper contamination of the intermetal dielectric layer during etching, CMP, or post-etching and post-CMP cleaning by forming a dielectric cap for isolation of the underlying dielectric layer is described. In one embodiment of the invention, a dielectric layer is provided overlying a semiconductor substrate. A dielectric cap layer is deposited overlying the dielectric layer. A via is patterned and filled with a metal layer and planarized. A copper layer is deposited overlying the planarized metal layer and dielectric cap layer. The copper layer is etched to form a copper line wherein the dielectric cap layer prevents copper contamination of the dielectric layer during etching and cleaning. In another embodiment of the invention, a dielectric layer is provided overlying a semiconductor substrate. A dielectric cap layer is deposited overlying the dielectric layer. A dual damascene opening is formed through the dielectric cap layer and the dielectric layer. A copper layer is deposited overlying a barrier metal layer over the dielectric cap layer and filling the dual damascene opening. The copper layer is polished back to leave the copper layer only within the dual damascene opening where the dielectric cap layer prevents copper contamination of the dielectric layer during polishing and cleaning.
摘要翻译：根据本发明的目的，描述了通过形成用于隔离下面介电层的电介质盖，在蚀刻，CMP或后蚀刻和后CMP清洗中防止金属间电介质层的铜污染的新方法。在本发明的一个实施例中，提供覆盖在半导体衬底上的电介质层。介电覆盖层沉积在介电层上。通孔被图案化并填充有金属层并且被平坦化。沉积在平坦化的金属层和电介质盖层上的铜层。铜层被蚀刻以形成铜线，其中电介质盖层在蚀刻和清洁期间防止电介质层的铜污染。在本发明的另一个实施例中，提供覆盖半导体衬底的电介质层。介电覆盖层沉积在介电层上。通过电介质盖层和电介质层形成双镶嵌开口。将铜层沉积在电介质盖层上方的阻挡金属层上，并填充双镶嵌开口。将铜层抛光回来，仅在双镶嵌开口中留下铜层，其中介电盖层在抛光和清洁期间防止电介质层的铜污染。

7. 发明授权

US06251786B1 Method to create a copper dual damascene structure with less dishing and erosion 有权
标题翻译：创建铜双镶嵌结构的方法，具有较少的凹陷和侵蚀
公开(公告)号：US06251786B1
公开(公告)日：2001-06-26
申请号：US09390783
申请日：1999-09-07
申请人： Mei Sheng Zhou , Paul Kwok Keung Ho , Subhash Gupta
发明人： Mei Sheng Zhou , Paul Kwok Keung Ho , Subhash Gupta
IPC分类号： H01L2100
CPC分类号： H01L21/76834 , H01L21/3212 , H01L21/76807 , H01L21/7684 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A dual damascene structure is created in a dielectric layer, the structure contains a barrier layer while a cap layer may or may not be provided over the layer of dielectric for further protection of the dual damascene structure. The surface of the copper in the dual damascene structure is recessed, a thin film is deposited and planarized/partially removed by either CMP or a plasma etch thereby providing a sturdy surface above the copper of the dual damascene structure that prevents dishing and erosion of this surface.
摘要翻译：在电介质层中产生双镶嵌结构，该结构包含阻挡层，而覆盖层可以设置在电介质层上，也可以不设置在电介质层上，以进一步保护双镶嵌结构。双镶嵌结构中的铜的表面是凹进的，通过CMP或等离子体蚀刻沉积并平面化/部分去除薄膜，从而在双镶嵌结构的铜上方提供坚固的表面，防止该镶嵌结构的凹陷和侵蚀表面。

8. 发明授权

US06184138B2 Method to create a controllable and reproducible dual copper damascene structure 有权
标题翻译：创建可控和可重复的双铜镶嵌结构的方法
公开(公告)号：US06184138B2
公开(公告)日：2001-02-06
申请号：US09390782
申请日：1999-09-07
申请人： Paul Kwok Keung Ho , Mei Sheng Zhou , Subhash Gupta
发明人： Paul Kwok Keung Ho , Mei Sheng Zhou , Subhash Gupta
IPC分类号： H01L2144
CPC分类号： H01L21/76843 , H01L21/7684 , H01L21/76874 , H01L21/76876 , H01L21/76877 , H01L21/76879
摘要： A new method is provided to construct a copper dual damascene structure. A layer of IMD is deposited over the surface of a substrate. A cap layer is deposited over this layer of IMD, the dual damascene structure is then patterned through the cap layer and into the layer of IMD. A barrier layer is blanket deposited, a copper seed layer is deposited over the barrier layer. The dual damascene structure is then filled with a spin-on material. The barrier layer and the copper seed layer are removed above the cap layer; the cap layer can be partially removed or can be left in place. The spin on material remains in place in the via and trench opening during the operation of removing the copper seed layer and the barrier layer from above the cap surface thereby protecting the inside surfaces of these openings. The spin-on material is next removed from the dual damascene structure and copper is deposited. The cap layer that is still present above the surface of the IMD protects the dielectric from being contaminated with copper solution during the deposition of the copper. The excess copper is removed using a touch-up CMP. The cap layer over the surface of the IMD can, after the copper has been deposited, be removed if this is so desired. As a final step in the process, a liner or oxidation/diffusion protection layer is deposited over the dual damascene structure and its surrounding area.
摘要翻译：提供了一种构建铜双镶嵌结构的新方法。一层IMD沉积在衬底的表面上。覆盖层沉积在IMD的该层上，然后将双镶嵌结构通过盖层图案化并进入IMD层。阻挡层被覆盖沉积，铜晶种层沉积在阻挡层上。然后用镶嵌材料填充双镶嵌结构。在盖层上除去阻挡层和铜籽晶层; 盖层可以被部分地去除或可以留在原处。在从盖表面上方去除铜种子层和阻挡层的操作期间，材料上的旋转保持在通孔和沟槽开口中的适当位置，从而保护这些开口的内表面。随后从双镶嵌结构中去除旋涂材料，并沉积铜。仍然存在于IMD表面之上的盖层保护铜在沉积期间不被铜溶液污染。使用上层CMP去除多余的铜。如果这样做是希望的话，在沉积铜之后，IMD表面上的盖层可以被去除。作为该方法的最后一步，衬垫或氧化/扩散保护层沉积在双镶嵌结构及其周围区域上。

9. 发明授权

US06813796B2 Apparatus and methods to clean copper contamination on wafer edge 失效
标题翻译：清洁晶圆边缘铜污染的设备和方法
公开(公告)号：US06813796B2
公开(公告)日：2004-11-09
申请号：US10357137
申请日：2003-02-03
申请人： Sudipto Ranendra Roy , Subhash Gupta , Simon Chooi , Xu Yi , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono , Paul Kwok Keung Ho
发明人： Sudipto Ranendra Roy , Subhash Gupta , Simon Chooi , Xu Yi , Yakub Aliyu , Mei Sheng Zhou , John Leonard Sudijono , Paul Kwok Keung Ho
IPC分类号： B08B700
CPC分类号： B08B1/04 , B08B3/04
摘要： A new apparatus is provided that can be applied to clean outer edges of semiconductor substrates. Under the first embodiment of the invention, a brush is mounted on the surface of the substrate around the periphery of the substrate, chemicals are fed to the surface that is being cleaned by means of a hollow core on which the cleaning brush is mounted. The surface that is being cleaned rotates at a relatively high speed thereby causing the chemicals that are deposited on this surface (by the brush) to remain in the edge of the surface. Under the second embodiment of the invention, a porous roller is mounted between a chemical reservoir and the surface that is being cleaned, the surface that is being cleaned rotates at a relatively high speed. The chemicals that are deposited by the interfacing porous roller onto the surface that is being cleaned therefore remain at the edge of this surface thereby causing optimum cleaning action of the edge of the surface. After contaminants have been removed in this manner from the surface, the surface can be further cleaned by applying DI water.
摘要翻译：提供了可用于清洁半导体衬底的外边缘的新设备。在本发明的第一实施例中，刷子安装在基板周围的基板的表面上，化学品通过其上安装有清洁刷的中空芯被供给到被清洁的表面。待清洁的表面以相对高的速度旋转，从而使沉积在该表面（由刷子）上的化学物质残留在表面的边缘。在本发明的第二实施例中，多孔辊安装在化学容器和待清洁的表面之间，待清洁的表面以相对较高的速度旋转。因此，由界面多孔辊沉积在待清洗的表面上的化学物质保留在该表面的边缘，从而引起表面边缘的最佳清洁作用。污染物以这种方式从表面除去后，可以通过加入去离子水进一步清洁表面。

10. 发明授权

US06720204B2 Method of using hydrogen plasma to pre-clean copper surfaces during Cu/Cu or Cu/metal bonding 有权
标题翻译：在Cu / Cu或Cu /金属接合期间使用氢等离子体预清洁铜表面的方法
公开(公告)号：US06720204B2
公开(公告)日：2004-04-13
申请号：US10120836
申请日：2002-04-11
申请人： John Leonard Sudijono , Yakub Aliyu , Mei Sheng Zhou , Simon Chooi , Subhash Gupta , Sudipto Ranendra Roy , Paul Kwok Keung Ho , Yi Xu
发明人： John Leonard Sudijono , Yakub Aliyu , Mei Sheng Zhou , Simon Chooi , Subhash Gupta , Sudipto Ranendra Roy , Paul Kwok Keung Ho , Yi Xu
IPC分类号： H01L2144
CPC分类号： H01L24/05 , C23G5/00 , H01L21/02046 , H01L21/32136 , H01L23/4824 , H01L24/03 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2224/04042 , H01L2224/05001 , H01L2224/05073 , H01L2224/05118 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05556 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/4813 , H01L2224/4846 , H01L2224/48463 , H01L2224/4847 , H01L2224/48624 , H01L2224/48644 , H01L2224/48647 , H01L2224/48724 , H01L2224/48747 , H01L2224/48824 , H01L2224/48844 , H01L2224/48847 , H01L2224/49111 , H01L2224/85013 , H01L2224/85201 , H01L2224/85203 , H01L2224/85205 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/05042 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/19042 , H01L2924/19043 , H01L2924/00014 , H01L2924/00 , H01L2224/48744 , H01L2924/00015
摘要： A method of bonding a wire to a metal bonding pad, comprising the following steps. A semiconductor die structure having an exposed metal bonding pad within a chamber is provided. The bonding pad has an upper surface. A hydrogen-plasma is produced within the chamber from a plasma source. The metal bonding pad is pre-cleaned and passivated with the hydrogen-plasma to remove any metal oxide formed on the metal bonding pad upper surface. A wire is then bonded to the passivated metal bonding pad.
摘要翻译：一种将金属丝焊接到金属焊盘上的方法，包括以下步骤。提供一种在室内具有暴露的金属接合焊盘的半导体管芯结构。接合垫具有上表面。在等离子体源室内产生氢等离子体。用氢 - 等离子体对金属接合垫进行预清洁和钝化以去除在金属焊盘上表面上形成的任何金属氧化物。然后将线接合到钝化金属接合焊盘。

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