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1. 发明申请

US20070128776A1 ISOLATED FULLY DEPLETED SILICON-ON-INSULATOR REGIONS BY SELECTIVE ETCH 审中-公开
标题翻译：通过选择性蚀刻分离完全绝缘的绝缘体绝缘体区域
公开(公告)号：US20070128776A1
公开(公告)日：2007-06-07
申请号：US11670262
申请日：2007-02-01
申请人： Matthew Breitwisch , Chung Lam , Randy Mann , Dale Martin
发明人： Matthew Breitwisch , Chung Lam , Randy Mann , Dale Martin
IPC分类号： H01L21/84 , H01L27/12 , H01L29/00
CPC分类号： H01L21/764 , H01L21/76283 , H01L21/76289 , H01L29/78654
摘要： The present invention provides a method of forming an ultra-thin and uniform layer of Si including the steps of providing a substrate having semiconducting regions separated by insulating regions; implanting dopants into the substrate to provide an etch differential doped portion in the semiconducting regions underlying an upper Si-containing surface of the semiconducting regions; forming a trench in the substrate including the semiconducting regions and the insulating regions; removing the etch differential doped portion from the semiconductor regions to produce a cavity underlying the upper surface of the semiconducting regions; and filling the trench with a trench dielectric, wherein the trench dielectric material encloses the cavity underlying the upper Si-containing surface of the semiconducting regions. The upper Si-containing surface of the semiconducting regions has a uniform thickness of less than about 100 Å.
摘要翻译：本发明提供一种形成超薄且均匀的Si层的方法，包括以下步骤：提供具有由绝缘区分隔开的半导体区域的衬底; 将掺杂剂注入衬底中以在半导体区域的上部含Si表面下方的半导体区域中提供蚀刻差分掺杂部分; 在包括半导体区域和绝缘区域的衬底中形成沟槽; 从所述半导体区域去除所述蚀刻差分掺杂部分以在所述半导体区域的上表面下方形成空腔; 以及用沟槽电介质填充所述沟槽，其中所述沟槽电介质材料包围在所述半导体区域的所述上部含Si表面之下的空腔。半导体区域的上部含Si表面具有小于约的均匀厚度。

2. 发明申请

US20060027889A1 Isolated fully depleted silicon-on-insulator regions by selective etch 失效
标题翻译：通过选择性蚀刻隔离完全耗尽的绝缘体上硅区域
公开(公告)号：US20060027889A1
公开(公告)日：2006-02-09
申请号：US10710821
申请日：2004-08-05
申请人： Matthew Breitwisch , Chung Lam , Randy Mann , Dale Martin
发明人： Matthew Breitwisch , Chung Lam , Randy Mann , Dale Martin
IPC分类号： H01L29/06 , H01L21/76
CPC分类号： H01L21/764 , H01L21/76283 , H01L21/76289 , H01L29/78654
摘要： The present invention provides a method of forming an ultra-thin and uniform layer of Si including the steps of providing a substrate having semiconducting regions separated by insulating regions; implanting dopants into the substrate to provide an etch differential doped portion in the semiconducting regions underlying an upper Si-containing surface of the semiconducting regions; forming a trench in the substrate including the semiconducting regions and the insulating regions; removing the etch differential doped portion from the semiconductor regions to produce a cavity underlying the upper surface of the semiconducting regions; and filling the trench with a trench dielectric, wherein the trench dielectric material encloses the cavity underlying the upper Si-containing surface of the semiconducting regions. The upper Si-containing surface of the semiconducting regions has a uniform thickness of less than about 100 Å.
摘要翻译：本发明提供一种形成超薄且均匀的Si层的方法，包括以下步骤：提供具有由绝缘区分隔开的半导体区域的衬底; 将掺杂剂注入衬底中以在半导体区域的上部含Si表面下方的半导体区域中提供蚀刻差分掺杂部分; 在包括半导体区域和绝缘区域的衬底中形成沟槽; 从所述半导体区域移除所述蚀刻差分掺杂部分以产生位于所述半导体区域的上表面下方的空腔; 以及用沟槽电介质填充所述沟槽，其中所述沟槽电介质材料包围在所述半导体区域的所述上部含Si表面下面的空腔。半导体区域的上部含Si表面具有小于约的均匀厚度。

3. 发明申请

US20070246748A1 Phase change memory cell with limited switchable volume 失效
标题翻译：相变容量有限的相变存储单元
公开(公告)号：US20070246748A1
公开(公告)日：2007-10-25
申请号：US11410466
申请日：2006-04-25
申请人： Matthew Breitwisch , Chung Lam , Jan Philipp , Stephen Rossnagel , Alejandro Schrott
发明人： Matthew Breitwisch , Chung Lam , Jan Philipp , Stephen Rossnagel , Alejandro Schrott
IPC分类号： H01L29/768
CPC分类号： H01L45/144 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1625 , H01L45/1666
摘要： A memory cell comprises a dielectric layer and a phase change material. The dielectric layer defines a trench having both a wide portion and a narrow portion. The narrow portion is substantially narrower than the wide portion. The phase change material, in turn, at least partially fills the wide and narrow portions of the trench. What is more, the phase change material within the narrow portion of the trench defines a void. Data can be stored in the memory cell by heating the phase change material by applying a pulse of switching current to the memory cell. Advantageously, embodiments of the invention provide high switching current density and heating efficiency so that the magnitude of the switching current pulse can be reduced.
摘要翻译：存储单元包括介电层和相变材料。电介质层限定了具有宽部分和窄部分的沟槽。狭窄部分基本上比宽部分窄。相变材料又至少部分地填充沟槽的宽而窄的部分。此外，沟槽狭窄部分内的相变材料限定了空隙。通过向存储单元施加切换电流的脉冲来加热相变材料，可以将数据存储在存储单元中。有利地，本发明的实施例提供高开关电流密度和加热效率，从而可以减小开关电流脉冲的幅度。

4. 发明申请

US20060077719A1 REPROGRAMMABLE INTEGRATED CIRCUIT (IC) WITH OVERWRITABLE NONVOLATILE STORAGE 失效
标题翻译：可重复集成电路（IC）与非易失性存储
公开(公告)号：US20060077719A1
公开(公告)日：2006-04-13
申请号：US10711819
申请日：2004-10-07
申请人： Matthew Breitwisch , Chung Lam , Steven Mittl , Jian Zhu
发明人： Matthew Breitwisch , Chung Lam , Steven Mittl , Jian Zhu
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C16/28
摘要： A reprogrammable integrated circuit (IC) including overwritable nonvolatile storage cells. Cell contents are compared in a differential sense amplifier against a variable reference signal that has a number of selectable reference levels corresponding to reprogrammed cell threshold voltages. With each write cycle the nonvolatile storage cells are overwritten and then, compared against a different, e.g., higher, selectable reference level.
摘要翻译：包括可重写非易失性存储单元的可重复编程集成电路（IC）。在差分读出放大器中将单元内容与可变参考信号进行比较，该可变参考信号具有对应于重新编程的单元阈值电压的多个可选参考电平。在每个写周期中，非易失性存储单元被覆盖，然后与不同的，例如更高的可选参考电平进行比较。

5. 发明申请

US20060278895A1 Reprogrammable fuse structure and method 有权
标题翻译：可编程熔丝结构及方法
公开(公告)号：US20060278895A1
公开(公告)日：2006-12-14
申请号：US11152750
申请日：2005-06-14
申请人： Geoffrey Burr , Chandrasekharan Kothandaraman , Chung Lam , Xiao Liu , Stephen Rossnagel , Christy Tyberg , Robert Wisnieff
发明人： Geoffrey Burr , Chandrasekharan Kothandaraman , Chung Lam , Xiao Liu , Stephen Rossnagel , Christy Tyberg , Robert Wisnieff
IPC分类号： H01L27/10 , H01L29/73
CPC分类号： H01L23/5256 , H01L23/5252 , H01L45/06 , H01L45/1206 , H01L45/1226 , H01L45/1286 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1683 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.
摘要翻译：集成电路中的可逆熔丝结构通过实现具有短路相变材料的熔断电池获得，所述相变材料与能够使电流通过相变材料线（熔丝电池）的通孔和线结构相接触。电流通过熔丝电池，以便通过将结晶状态的相变材料加热至熔点，从而将材料从较小电阻的材料转变为更电阻的材料，然后快速将材料淬火成非晶状态。可逆编程通过使较低电流通过熔丝电池来实现，以将高电阻率无定形材料转换成较低电阻率的晶体材料。集成适当的感测电路以读取存储在熔丝中的信息，其中所述感测电路用于启用或禁用电路。

6. 发明申请

US20060091017A1 Electrolysis process and cell for use in same 审中-公开
标题翻译：电解过程和电池用于其中
公开(公告)号：US20060091017A1
公开(公告)日：2006-05-04
申请号：US10531862
申请日：2003-10-21
申请人： Chung Lam
发明人： Chung Lam
IPC分类号： C25D5/18 , C25C7/02
CPC分类号： C25C1/00 , C22B15/0063 , C25C1/12 , C25C5/02 , C25C7/02 , C25C7/08 , Y02P10/236
摘要： An electrolysis process for the recovery of metal from an aqueous solution is defined. On electrolysing the solution metal is caused to deposit on a deposition surface of a cathode. The process includes the step of inducing a non-uniform current density across the deposition surface so as to form areas of high current density interspaced by areas of low current density. The difference between the areas of high current density and low current density is sufficient to cause metal deposition to be concentrated on the areas of high current density so as to promote non-uniform deposition of metal across the deposition surface. An electrolysis cell for the electro-recovery of metal from an aqueous solution is also defined. The cell includes a cathode which includes a deposition surface on which metal is deposited on electrolysing of the aqueous solution. In operation of the cell, the deposition surface has a non-uniform electrical field having areas of strong electrical field interspaced by areas of weak electrical field. The difference between the areas of strong electrical field and weak electrical field is sufficient to cause metal deposition to be concentrated on the areas of high electrical field so as to promote non-uniform deposition of metal on the surface.
摘要翻译：定义了从水溶液中回收金属的电解方法。在电解时，使溶液金属沉积在阴极的沉积表面上。该方法包括在沉积表面上引起不均匀电流密度的步骤，以形成由低电流密度的区域间隔的高电流密度的区域。高电流密度和低电流密度的区域之间的差异足以使金属沉积集中在高电流密度的区域上，从而促使金属在沉积表面上的不均匀沉积。还定义了用于从水溶液中电还原金属的电解槽。该电池包括阴极，其包含沉积表面，在该沉积表面上电解水溶液时沉积金属。在电池的操作中，沉积表面具有不均匀的电场，其具有由弱电场区域间隔的强电场区域。强电场和弱电场的区域之间的差异足以使金属沉积集中在高电场的区域，以促进金属在表面上的不均匀沉积。

7. 发明申请

US20050260839A1 Non-volatile resistance switching memory 有权
标题翻译：非易失性电阻切换存储器
公开(公告)号：US20050260839A1
公开(公告)日：2005-11-24
申请号：US11105849
申请日：2005-04-14
申请人： Rolf Allenspach , Johannes Bednorz , Gerhard Meijer , Chung Lam , Richard Stutz , Daniel Widmer
发明人： Rolf Allenspach , Johannes Bednorz , Gerhard Meijer , Chung Lam , Richard Stutz , Daniel Widmer
IPC分类号： C23C16/40 , G11C11/56 , H01L21/02 , H01L21/20 , H01L21/316 , H01L21/8238 , H01L21/8246 , H01L27/10 , H01L45/00
CPC分类号： G11C13/0007 , G11C2213/31 , H01L21/31691 , H01L27/101 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625
摘要： Processes, apparatus and systems for depositing a switching material that is switchable between conductivity states and where the states are persistent. The invention further relates to a microelectronic device or non-volatile resistance switching memory comprising the switching material for storing digital information. A process includes a step of depositing the switching material by a CMOS deposition technique at a temperature lower than 400° C.
摘要翻译：用于沉积切换材料的过程，装置和系统，其可在导电状态之间切换，并且状态持续存在。本发明还涉及包括用于存储数字信息的切换材料的微电子装置或非易失性电阻切换存储器。一种方法包括通过CMOS沉积技术在低于400℃的温度下沉积开关材料的步骤。

8. 发明申请

US20050208699A1 Phase Change Memory Cell On Silicon-On Insulator Substrate 有权
标题翻译：在硅绝缘子基板上的相变存储单元
公开(公告)号：US20050208699A1
公开(公告)日：2005-09-22
申请号：US10708667
申请日：2004-03-18
申请人： Stephen Furkay , Hendrick Hamann , Jeffrey Johnson , Chung Lam , Hon-Sum Wong
发明人： Stephen Furkay , Hendrick Hamann , Jeffrey Johnson , Chung Lam , Hon-Sum Wong
IPC分类号： G11C13/00 , G11C11/56 , H01L21/06 , H01L21/331 , H01L27/10 , H01L27/105 , H01L27/12 , H01L27/24 , H01L29/00 , H01L29/68 , H01L45/00
CPC分类号： H01L29/685 , G11C11/5678 , G11C13/0004 , H01L27/1203
摘要： The present invention includes a method for forming a phase change material memory device and the phase change memory device produced therefrom. Specifically, the phase change memory device includes a semiconductor structure including a substrate having a first doped region flanked by a set of second doped regions; a phase change material positioned on the first doped region; and a conductor positioned on the phase change material, wherein when the phase change material is a first phase the semiconductor structure operates as a bipolar junction transistor, and when the phase change material is a second phase the semiconductor structure operates as a field effect transistor.
摘要翻译：本发明包括一种形成相变材料存储装置的方法和由其制成的相变存储装置。具体地，相变存储器件包括半导体结构，该半导体结构包括具有侧面为一组第二掺杂区的第一掺杂区的衬底; 位于所述第一掺杂区上的相变材料; 以及位于所述相变材料上的导体，其中当所述相变材料为第一相时，所述半导体结构作为双极结型晶体管工作，并且当所述相变材料为第二相时，所述半导体结构作为场效应晶体管工作。

9. 发明申请

US20050185515A1 Methods and systems for performing horological functions using time cells 有权
标题翻译：使用时间单元执行钟表功能的方法和系统
公开(公告)号：US20050185515A1
公开(公告)日：2005-08-25
申请号：US11059279
申请日：2005-02-15
申请人： Viktors Berstis , Peter Klim , Chung Lam
发明人： Viktors Berstis , Peter Klim , Chung Lam
IPC分类号： G04C10/00 , G04F1/00 , G04F10/10 , G06Q30/02 , H03K17/28 , H03K17/284 , G04C3/00
CPC分类号： H01L27/115 , G04F1/005 , G04F10/10 , G06Q30/0207
摘要： A simple electronic horological device, termed a time cell, is presented with associated methods, systems, and computer program products. A time cell has an insulated, charge storage element that receives an electrostatic charge through its insulating medium, i.e. it is programmed. Over time, the charge storage element then loses the electrostatic charge through its insulating medium. Given the reduction of the electric potential of the programmed charge storage element at a substantially known discharge rate, and by observing the electric potential of the programmed charge storage element at a given point in time, an elapsed time period can be determined. Thus, the time cell is able to measure an elapsed time period without a continuous power source.
摘要翻译：被称为时间单元的简单的电子钟表装置被提供有相关的方法，系统和计算机程序产品。时间单元具有绝缘的电荷存储元件，其通过其绝缘介质接收静电电荷，即它被编程。随着时间的推移，电荷存储元件然后通过其绝缘介质失去静电荷。考虑到以基本上已知的放电速率降低编程电荷存储元件的电位，并且通过在给定时间点观察编程电荷存储元件的电位，可以确定经过时间。因此，时间单元能够测量经过的时间段而没有连续的电源。

10. 发明授权

US06831879B1 Batteryless, osciliatorless, analog time cell usable as an horological device with associated programming methods and devices 失效
标题翻译：无电池，无振荡器，模拟时间单元可用作具有相关编程方法和设备的钟表装置
公开(公告)号：US06831879B1
公开(公告)日：2004-12-14
申请号：US09703335
申请日：2000-10-31
申请人： Viktors Berstis , Peter Juergen Klim , Chung Lam
发明人： Viktors Berstis , Peter Juergen Klim , Chung Lam
IPC分类号： G04F1000
CPC分类号： G04G99/00 , G04F10/10
摘要： A simple electronic horological device, termed a time cell, is presented with associated methods, systems, and computer program products. A time cell has an insulated, charge storage element that receives an electrostatic charge through its insulating medium, i.e. it is programmed. Over time, the charge storage element then loses the charge through its insulating medium. Given the reduction of the electric potential of the programmed charge storage element at a substantially known discharge rate, and by observing the potential of the programmed charge storage element at a given point in time, an elapsed time period can be determined. Thus, the time cell measures an elapsed time period without a continuous power source. One type of time cell is an analog time cell that may have a form similar to a non-volatile memory cell, particularly a floating gate field effect transistor (FGFET). The time cell may have an expanded floating gate for storing an electrostatic charge. At a given point in time after programming the analog time cell, a sensing operation indirectly observes the retained charge in the floating gate by directly or indirectly observing the threshold voltage of the FGFET. By knowing the operational characteristics of the time cell and its initial programming condition, the observation can be converted into an elapsed time value. A time cell can be designed and/or programmed to select the range of time to be measured.
摘要翻译：被称为时间单元的简单的电子钟表装置被提供有相关的方法，系统和计算机程序产品。时间单元具有绝缘的电荷存储元件，其通过其绝缘介质接收静电电荷，即它被编程。随着时间的推移，电荷存储元件然后通过其绝缘介质失去电荷。考虑到以基本上已知的放电速率减小编程电荷存储元件的电位，并且通过在给定时间点观察编程电荷存储元件的电位，可以确定经过的时间段。因此，时间单元测量没有连续电源的经过时间段。一种类型的时间单元是模拟时间单元，其可以具有类似于非易失性存储单元，特别是浮动栅场效应晶体管（FGFET）的形式。时间单元可以具有用于存储静电电荷的扩展浮动栅极。在对模拟时间单元进行编程之后的给定时间点，感测操作通过直接或间接观察FGFET的阈值电压间接地观察浮动栅极中的保留电荷。通过了解时间单元的操作特性及其初始编程条件，可以将观测值转换为经过的时间值。时间单元可以被设计和/或编程以选择待测量的时间范围。

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