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1. 发明申请

US20080175945A1 Molding apparatus for wet friction material 有权
标题翻译：湿摩擦材料成型设备
公开(公告)号：US20080175945A1
公开(公告)日：2008-07-24
申请号：US11806035
申请日：2007-05-29
申请人： Masayuki Mizuno , Wataru Tomita
发明人： Masayuki Mizuno , Wataru Tomita
IPC分类号： B28B7/26
CPC分类号： F16D69/04 , F16D2069/0466 , F16D2069/0475 , F16D2069/0491
摘要： A molding apparatus of a wet friction material has a pair of guide posts vertically extending on a molding apparatus main body. The pair of the guide posts passes through fifteen stages (sixteen pieces) of molding dies. A pair of pantograph-type open-close mechanisms is attached to opposite side surfaces of the molding dies. Thus, the molding dies are piled up on each other so as to come near to each other (mold clamping) and move apart from each other (mold opening). With the pantograph-type open-close link mechanism, all the molding dies are opened and closed at the same time. If the molding dies are slid at a speed of 200 mm/sec, it takes only 3.75 seconds (50 mm*15/200 mm=3.75 sec). It takes a double of that time or 7.5 seconds, that is a half of the time of a related art.
摘要翻译：湿摩擦材料的成型装置具有在成形装置主体上垂直延伸的一对导柱。一对导向柱穿过十五个阶段（十六个）成型模具。一对受电弓型开闭机构连接到成型模具的相对侧表面。因此，成型模具彼此堆叠以彼此靠近（合模）并且彼此分开（模具开口）。使用缩放式开闭连杆机构，同时打开和关闭所有成型模具。如果成型模具以200mm / sec的速度滑动，则仅需3.75秒（50mm×15 / 200mm = 3.75秒）。这需要两倍的时间或7.5秒，这是相关艺术的一半时间。

2. 发明授权

US07708044B2 Molding apparatus for wet friction material 有权
标题翻译：湿摩擦材料成型设备
公开(公告)号：US07708044B2
公开(公告)日：2010-05-04
申请号：US11806035
申请日：2007-05-29
申请人： Masayuki Mizuno , Wataru Tomita
发明人： Masayuki Mizuno , Wataru Tomita
IPC分类号： B32B37/00
CPC分类号： F16D69/04 , F16D2069/0466 , F16D2069/0475 , F16D2069/0491
摘要： A molding apparatus of a wet friction material has a pair of guide posts vertically extending on a molding apparatus main body. The pair of the guide posts passes through fifteen stages (sixteen pieces) of molding dies. A pair of pantograph-type open-close mechanisms is attached to opposite side surfaces of the molding dies. Thus, the molding dies are piled up on each other so as to come near to each other (mold clamping) and move apart from each other (mold opening). With the pantograph-type open-close link mechanism, all the molding dies are opened and closed at the same time. If the molding dies are slid at a speed of 200 mm/sec, it takes only 3.75 seconds (50 mm*15/200 mm=3.75 sec). It takes a double of that time or 7.5 seconds, that is a half of the time of a related art.
摘要翻译：湿摩擦材料的成型装置具有在成形装置主体上垂直延伸的一对导柱。一对导向柱穿过十五个阶段（十六个）成型模具。一对受电弓型开闭机构连接到成型模具的相对侧表面。因此，成型模具彼此堆叠以彼此靠近（合模）并且彼此分开（模具开口）。使用缩放式开闭连杆机构，同时打开和关闭所有成型模具。如果成型模具以200mm / sec的速度滑动，则仅需3.75秒（50mm×15 / 200mm = 3.75秒）。这需要两倍的时间或7.5秒，这是相关艺术的一半时间。

3. 发明授权

US08674774B2 Aging diagnostic device, aging diagnostic method 失效
标题翻译：老化诊断仪，老化诊断方法
公开(公告)号：US08674774B2
公开(公告)日：2014-03-18
申请号：US13394542
申请日：2010-09-01
申请人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
发明人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
IPC分类号： H03L7/24 , G01R31/28
CPC分类号： G01R31/2856 , G01R31/2882 , G01R31/2884 , H03K5/133
摘要： There is provided an aging diagnostic device including: a reference ring oscillator (101) that constitutes a ring oscillator using an odd-numbered plurality of logic gates constituted using a CMOS circuit; a test ring oscillator (102) that constitutes a ring oscillator using an odd-numbered plurality of logic gates having the same configuration as that of the logic gate; a load unit (104) that inputs a load signal to the test ring oscillator (102); a control unit (105) that simultaneously inputs a control signal instructing a start of oscillation of the reference ring oscillator (101) and the test ring oscillator (102) to the reference ring oscillator (101) and the test ring oscillator (102); and a comparison unit (103) that compares differences in the amount of movement of pulses within the reference ring oscillator (101) and the test ring oscillator (102), respectively, in the same time.
摘要翻译：提供了一种老化诊断装置，包括：构成使用CMOS电路构成的奇数多个逻辑门的环形振荡器的参考环形振荡器（101）使用具有与逻辑门相同配置的奇数多个逻辑门构成环形振荡器的测试环振荡器（102）; 负载单元（104），其向所述测试环形振荡器（102）输入负载信号; 控制单元（105），其同时将参考环形振荡器（101）和测试环形振荡器（102）的振荡开始的控制信号输入到参考环形振荡器（101）和测试环形振荡器（102）; 以及比较单元（103），其分别同时比较参考环形振荡器（101）和测试环形振荡器（102）中的脉冲的移动量的差异。

4. 发明授权

US08429663B2 Allocating task groups to processor cores based on number of task allocated per core, tolerable execution time, distance between cores, core coordinates, performance and disposition pattern 有权
标题翻译：根据每个核心分配的任务数量，允许的执行时间，核心距离，核心坐标，性能和配置模式，将任务组分配到处理器核心
公开(公告)号：US08429663B2
公开(公告)日：2013-04-23
申请号：US12529367
申请日：2008-02-05
申请人： Masamichi Takagi , Masayuki Mizuno , Hiroaki Inoue
发明人： Masamichi Takagi , Masayuki Mizuno , Hiroaki Inoue
IPC分类号： G06F9/50
CPC分类号： G06F9/5027 , G06F11/1428 , G06F11/3419 , G06F11/3433 , G06F2209/483 , G06F2209/501
摘要： Even if a multiprocessor includes an uneven performance core, an inoperative core or a core that does not satisfy such a performance as designed but if the contrivance of task allocation can satisfy the requirement of an application to be executed, the multiple processors are shipped. In a task group allocation method for allocating, to a processor having a plurality of cores, task groups included in an application for the processor to execute, a calculation section measures performances and disposition patterns of the cores, generates a restricting condition associating the measured performances and disposition patterns of the cores with information indicating whether the application can be executed, and, with reference to the restricting condition, reallocates to the cores, the task groups that have previously been allocated to the cores.
摘要翻译：即使多处理器包括不均衡的性能核心，不能满足设计性能的不工作核心或核心，但是如果任务分配的设计能够满足执行应用程序的要求，则会发送多个处理器。在用于将具有多个核心的处理器分配给应用程序中的处理器执行的任务组的任务组分配方法中，计算部分测量核心的性能和配置模式，产生将测量性能以及具有指示是否可以执行应用的信息的核心的配置模式，并且参考限制条件将已经分配给核心的任务组重新分配给核心。

5. 发明授权

US08399960B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08399960B2
公开(公告)日：2013-03-19
申请号：US12920381
申请日：2009-02-20
申请人： Yoshihiro Nakagawa , Koichiro Noguchi , Yoshio Kameda , Masayuki Mizuno
发明人： Yoshihiro Nakagawa , Koichiro Noguchi , Yoshio Kameda , Masayuki Mizuno
IPC分类号： H01L27/08
CPC分类号： H01L27/0688 , H01L23/48 , H01L23/5227 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L25/0657 , H01L2224/05553 , H01L2224/48091 , H01L2224/49113 , H01L2225/06527 , H01L2924/00014 , H01L2924/14 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A plurality of semiconductor chips are juxtaposed, each having an electromagnetic induction coil disposed thereon. A signal is transmitted by way of electromagnetic induction between the electromagnetic induction coils disposed on a pair of adjacent semiconductor chips.
摘要翻译：多个半导体芯片并置，每个具有布置在其上的电磁感应线圈。在布置在一对相邻半导体芯片上的电磁感应线圈之间通过电磁感应传输信号。

6. 发明授权

US08301936B2 Apparatus and method for performing a screening test of semiconductor integrated circuits 失效
标题翻译：用于进行半导体集成电路的屏蔽测试的装置和方法
公开(公告)号：US08301936B2
公开(公告)日：2012-10-30
申请号：US12447524
申请日：2007-10-17
申请人： Hiroaki Inoue , Masamichi Takagi , Masayuki Mizuno
发明人： Hiroaki Inoue , Masamichi Takagi , Masayuki Mizuno
IPC分类号： G06F11/00
CPC分类号： G06F11/277
摘要： An apparatus for performing a screening test of a semiconductor integrated circuit is disclosed, the semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, and the processors being programmatically operable. The apparatus for performing a screening test of a semiconductor integrated circuit comprises: an instruction/data signal synchronization circuit for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and a trace comparison circuit for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information.
摘要翻译：公开了一种用于执行半导体集成电路的屏蔽测试的装置，所述半导体集成电路包括多个处理器，每个处理器具有用于指令执行信息的输出信号，并且所述处理器可编程地可操作。用于执行半导体集成电路的屏蔽测试的装置包括：指令/数据信号同步电路，用于将指令的提供同步到所述各个处理器并用于同步向所述各个处理器提供数据; 以及跟踪比较电路，用于比较从各个处理器输出的指令执行信息，以确定所述处理器中的任何一个是否输出了不同的指令执行信息。

7. 发明授权

US08243467B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08243467B2
公开(公告)日：2012-08-14
申请号：US12526992
申请日：2008-02-05
申请人： Yoshihiro Nakagawa , Masayuki Mizuno
发明人： Yoshihiro Nakagawa , Masayuki Mizuno
IPC分类号： H05K7/00
CPC分类号： H01L25/18 , H01L24/73 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2924/00014 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A main chip has a signal processing circuit for executing signal processing; a plurality of signal transmitting circuits for transmitting signals between the signal processing circuit and a signal transmitting circuit; and a control circuit for controlling operation/non-operation of the signal transmitting circuits in accordance with signal processing content of the signal processing circuit. Functional chips each have a signal processing circuit for executing auxiliary signal processing different from that of the signal processing circuit; and one or a plurality of signal transmitting circuits for transmitting signals between the signal processing circuit and the signal transmitting circuits. The main chip and the functional chips are stacked. The signal transmitting circuits and the signal transmitting circuit are non-contact-type signal transmitting circuits utilizing inductive coupling and are arranged so as to overlap when viewed from the stacking direction.
摘要翻译：主芯片具有用于执行信号处理的信号处理电路; 多个信号发送电路，用于在信号处理电路和信号发送电路之间传输信号; 以及控制电路，用于根据信号处理电路的信号处理内容来控制信号发送电路的操作/不操作。功能芯片各自具有用于执行与信号处理电路不同的辅助信号处理的信号处理电路; 以及用于在信号处理电路和信号发送电路之间传送信号的一个或多个信号发送电路。主芯片和功能芯片堆叠。信号发送电路和信号发送电路是利用电感耦合的非接触型信号发送电路，并且从层叠方向观察时重叠。

8. 发明申请

US20120161885A1 AGING DIAGNOSTIC DEVICE, AGING DIAGNOSTIC METHOD 失效
标题翻译：老化诊断装置，老化诊断方法
公开(公告)号：US20120161885A1
公开(公告)日：2012-06-28
申请号：US13394542
申请日：2010-09-01
申请人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
发明人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
IPC分类号： H03L7/24
CPC分类号： G01R31/2856 , G01R31/2882 , G01R31/2884 , H03K5/133
摘要： There is provided an aging diagnostic device including: a reference ring oscillator (101) that constitutes a ring oscillator using an odd-numbered plurality of logic gates constituted using a CMOS circuit; a test ring oscillator (102) that constitutes a ring oscillator using an odd-numbered plurality of logic gates having the same configuration as that of the logic gate; a load unit (104) that inputs a load signal to the test ring oscillator (102); a control unit (105) that simultaneously inputs a control signal instructing a start of oscillation of the reference ring oscillator (101) and the test ring oscillator (102) to the reference ring oscillator (101) and the test ring oscillator (102); and a comparison unit (103) that compares differences in the amount of movement of pulses within the reference ring oscillator (101) and the test ring oscillator (102), respectively, in the same time.
摘要翻译：提供了一种老化诊断装置，包括：构成使用CMOS电路构成的奇数多个逻辑门的环形振荡器的参考环形振荡器（101）使用具有与逻辑门相同配置的奇数多个逻辑门构成环形振荡器的测试环振荡器（102）; 负载单元（104），其向所述测试环形振荡器（102）输入负载信号; 控制单元（105），其同时将参考环形振荡器（101）和测试环形振荡器（102）的振荡开始的控制信号输入到参考环形振荡器（101）和测试环形振荡器（102）; 以及比较单元（103），其分别同时比较参考环形振荡器（101）和测试环形振荡器（102）中的脉冲的移动量的差异。

9. 发明申请

US20110006443A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20110006443A1
公开(公告)日：2011-01-13
申请号：US12920452
申请日：2009-02-19
申请人： Koichiro Noguchi , Yoshio Kameda , Yoshihiro Nakagawa , Masayuki Mizuno
发明人： Koichiro Noguchi , Yoshio Kameda , Yoshihiro Nakagawa , Masayuki Mizuno
IPC分类号： H01L23/48
CPC分类号： H01L23/645 , H01L23/5227 , H01L23/585 , H01L25/0655 , H01L25/0657 , H01L27/08 , H01L2224/16145 , H01L2225/06527 , H01L2225/06596
摘要： Disclosed is a semiconductor device composed of a plurality of semiconductor integrated circuits and a plurality of coils. During the production process of the semiconductor device, the plurality of coils are so arranged that the coil surfaces are generally perpendicular to the front surface of a chip of the semiconductor integrated circuits wherein metal films are laminated. A signal is transmitted between a pair of adjacent coils among the plurality of coils.
摘要翻译：公开了由多个半导体集成电路和多个线圈组成的半导体器件。在半导体器件的生产过程中，多个线圈被布置成使得线圈表面大致垂直于半导体集成电路的芯片的前表面，其中金属膜被层压。信号在多个线圈中的一对相邻线圈之间传输。

10. 发明申请

US20100134140A1 PROGRAM CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, VOLTAGE APPLICATION METHOD, CURRENT APPLICATION METHOD, AND COMPARISON METHOD 有权
标题翻译：程序电路，半导体集成电路，电压应用方法，电流应用方法和比较方法
公开(公告)号：US20100134140A1
公开(公告)日：2010-06-03
申请号：US12095267
申请日：2006-10-24
申请人： Shunichi Kaeriyama , Masayuki Mizuno
发明人： Shunichi Kaeriyama , Masayuki Mizuno
IPC分类号： H03K19/173 , G11C5/14 , H03K5/00 , H03K19/0175
CPC分类号： G11C13/0011 , G11C13/0064 , G11C13/0069 , G11C2013/0066 , G11C2013/009 , G11C2213/34 , H01L27/115 , H03K5/24
摘要： In a program circuit that can reduce exhaustion of a switching element that uses oxidation-reduction reactions of an electrolyte material, a voltage source (106) applies voltage to a switching element (100), a measurement circuit (107) measures a parameter that changes in accordance with the resistance value of the switching element (100), and a control circuit (104) causes the voltage source (106) to apply voltage to the switching element (100) while progressively increasing the voltage. The control circuit (104) further causes the voltage source (106) to halt the application of voltage when the parameter measured by the measurement circuit (107) reaches a prescribed value.
摘要翻译：在能够减少使用电解质材料的氧化还原反应的开关元件耗尽的程序电路中，电压源（106）向开关元件（100）施加电压，测量电路（107）测量变化的参数根据开关元件（100）的电阻值，并且控制电路（104）使得电压源（106）在逐渐增加电压的同时向开关元件（100）施加电压。当由测量电路（107）测量的参数达到规定值时，控制电路（104）进一步使电压源（106）停止施加电压。

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