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1. 发明申请

US20100251046A1 FAILURE PREDICTION CIRCUIT AND METHOD, AND SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：故障预测电路和方法以及半导体集成电路
公开(公告)号：US20100251046A1
公开(公告)日：2010-09-30
申请号：US12438576
申请日：2007-08-09
申请人： Masayuki Mizuno , Toru Nakura , Koichi Nose
发明人： Masayuki Mizuno , Toru Nakura , Koichi Nose
IPC分类号： G01R31/3177 , G06F11/25
CPC分类号： G01R31/31725 , G01R31/31726 , G01R31/31937
摘要： Disclosed is a semiconductor integrated circuit including a first storage circuit and a second storage circuit that respectively store logic levels of an input to the delay circuit and an output of the delay circuit when a logic level of a clock line is changed, and a determination circuit that determines whether or not the results of the first storage circuit and the second storage circuit coincide or not. Even if a transistor or a wiring that constitutes the semiconductor integrated circuit has been degraded due to secular change or the like, a possibility of an anomaly or a failure in one of the operation circuits caused by the degradation can be predicted before the anomaly or the failure occurs.
摘要翻译：公开了一种半导体集成电路，包括：第一存储电路和第二存储电路，其在时钟线的逻辑电平改变时分别存储对延迟电路的输入的逻辑电平和延迟电路的输出;以及确定电路确定第一存储电路和第二存储电路的结果是否一致。即使构成半导体集成电路的晶体管或布线由于长期变化等而劣化，也可以在异常或异常之前预测由劣化引起的运算电路之一的异常或故障的可能性发生故障

2. 发明授权

US07908538B2 Failure prediction circuit and method, and semiconductor integrated circuit 有权
标题翻译：故障预测电路及方法，半导体集成电路
公开(公告)号：US07908538B2
公开(公告)日：2011-03-15
申请号：US12438576
申请日：2007-08-09
申请人： Masayuki Mizuno , Toru Nakura , Koichi Nose
发明人： Masayuki Mizuno , Toru Nakura , Koichi Nose
IPC分类号： G01R31/28
CPC分类号： G01R31/31725 , G01R31/31726 , G01R31/31937
摘要： Disclosed is a semiconductor integrated circuit including a first storage circuit and a second storage circuit that respectively store logic levels of an input to the delay circuit and an output of the delay circuit when a logic level of a clock line is changed, and a determination circuit that determines whether or not the results of the first storage circuit and the second storage circuit coincide or not. Even if a transistor or a wiring that constitutes the semiconductor integrated circuit has been degraded due to secular change or the like, a possibility of an anomaly or a failure in one of the operation circuits caused by the degradation can be predicted before the anomaly or the failure occurs.
摘要翻译：公开了一种半导体集成电路，包括：第一存储电路和第二存储电路，其在时钟线的逻辑电平改变时分别存储对延迟电路的输入的逻辑电平和延迟电路的输出;以及确定电路确定第一存储电路和第二存储电路的结果是否一致。即使构成半导体集成电路的晶体管或布线由于长期变化等而劣化，也可以在异常或异常之前预测由劣化引起的运算电路之一的异常或故障的可能性发生故障

3. 发明授权

US08674774B2 Aging diagnostic device, aging diagnostic method 失效
标题翻译：老化诊断仪，老化诊断方法
公开(公告)号：US08674774B2
公开(公告)日：2014-03-18
申请号：US13394542
申请日：2010-09-01
申请人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
发明人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
IPC分类号： H03L7/24 , G01R31/28
CPC分类号： G01R31/2856 , G01R31/2882 , G01R31/2884 , H03K5/133
摘要： There is provided an aging diagnostic device including: a reference ring oscillator (101) that constitutes a ring oscillator using an odd-numbered plurality of logic gates constituted using a CMOS circuit; a test ring oscillator (102) that constitutes a ring oscillator using an odd-numbered plurality of logic gates having the same configuration as that of the logic gate; a load unit (104) that inputs a load signal to the test ring oscillator (102); a control unit (105) that simultaneously inputs a control signal instructing a start of oscillation of the reference ring oscillator (101) and the test ring oscillator (102) to the reference ring oscillator (101) and the test ring oscillator (102); and a comparison unit (103) that compares differences in the amount of movement of pulses within the reference ring oscillator (101) and the test ring oscillator (102), respectively, in the same time.
摘要翻译：提供了一种老化诊断装置，包括：构成使用CMOS电路构成的奇数多个逻辑门的环形振荡器的参考环形振荡器（101）使用具有与逻辑门相同配置的奇数多个逻辑门构成环形振荡器的测试环振荡器（102）; 负载单元（104），其向所述测试环形振荡器（102）输入负载信号; 控制单元（105），其同时将参考环形振荡器（101）和测试环形振荡器（102）的振荡开始的控制信号输入到参考环形振荡器（101）和测试环形振荡器（102）; 以及比较单元（103），其分别同时比较参考环形振荡器（101）和测试环形振荡器（102）中的脉冲的移动量的差异。

4. 发明申请

US20120161885A1 AGING DIAGNOSTIC DEVICE, AGING DIAGNOSTIC METHOD 失效
标题翻译：老化诊断装置，老化诊断方法
公开(公告)号：US20120161885A1
公开(公告)日：2012-06-28
申请号：US13394542
申请日：2010-09-01
申请人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
发明人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
IPC分类号： H03L7/24
CPC分类号： G01R31/2856 , G01R31/2882 , G01R31/2884 , H03K5/133
摘要： There is provided an aging diagnostic device including: a reference ring oscillator (101) that constitutes a ring oscillator using an odd-numbered plurality of logic gates constituted using a CMOS circuit; a test ring oscillator (102) that constitutes a ring oscillator using an odd-numbered plurality of logic gates having the same configuration as that of the logic gate; a load unit (104) that inputs a load signal to the test ring oscillator (102); a control unit (105) that simultaneously inputs a control signal instructing a start of oscillation of the reference ring oscillator (101) and the test ring oscillator (102) to the reference ring oscillator (101) and the test ring oscillator (102); and a comparison unit (103) that compares differences in the amount of movement of pulses within the reference ring oscillator (101) and the test ring oscillator (102), respectively, in the same time.
摘要翻译：提供了一种老化诊断装置，包括：构成使用CMOS电路构成的奇数多个逻辑门的环形振荡器的参考环形振荡器（101）使用具有与逻辑门相同配置的奇数多个逻辑门构成环形振荡器的测试环振荡器（102）; 负载单元（104），其向所述测试环形振荡器（102）输入负载信号; 控制单元（105），其同时将参考环形振荡器（101）和测试环形振荡器（102）的振荡开始的控制信号输入到参考环形振荡器（101）和测试环形振荡器（102）; 以及比较单元（103），其分别同时比较参考环形振荡器（101）和测试环形振荡器（102）中的脉冲的移动量的差异。

5. 发明申请

US20100052792A1 AMPLIFYING APPARATUS, METHOD OF OUTPUT CONTROL AND CONTROL PROGRAM 失效
标题翻译：放大装置，输出控制方法和控制程序
公开(公告)号：US20100052792A1
公开(公告)日：2010-03-04
申请号：US12440977
申请日：2007-09-13
申请人： Koichi Nose , Haruya Ishizaki , Masayuki Mizuno
发明人： Koichi Nose , Haruya Ishizaki , Masayuki Mizuno
IPC分类号： H03F3/68
CPC分类号： H03K4/026 , H03F1/0294 , H03F1/32 , H03F3/2171 , H03F3/2178 , H03F3/245 , H03F3/72 , H03F2200/384 , H03K4/92
摘要： [PROBLEMS] To provide, for example, a pulse input type power amplifying apparatus that can be operated at low voltage and low power, effectively suppressing generation of harmonic component.[MEANS FOR SOLVING THE PROBLEMS] The amplifying apparatus includes at least two amplification circuits, one and other amplification circuits, composed of multiple amplifiers whose output sides are connected to each other, driven at the same frequency. The multiple amplifiers forming the one amplification circuit are configured with a first inverting amplifier M12 inputting and amplifying a reference pulse, and a second inverting amplifier M11 to which an inverted pulse formed by shifting and inverting the phase of the reference pulse is inputted. The other amplification circuit is configured with the first inverting amplifier M14 and the second inverting amplifier M13 to each of which other wide pulse with a width greater than that of the reference pulse is commonly inputted.
摘要翻译： [问题]为了提供例如能够以低电压和低功率工作的脉冲输入型功率放大装置，能有效地抑制谐波分量的产生。解决问题的手段放大装置包括至少两个放大电路，一个和另外的放大电路，由输出侧相互连接并以相同频率驱动的多个放大器组成。形成一个放大电路的多个放大器配置有输入和放大参考脉冲的第一反相放大器M12和输入通过移位和反相参考脉冲的相位形成的反相脉冲的第二反相放大器M11。另一个放大电路配置有第一反相放大器M14和第二反相放大器M13，其中通常输入宽度大于参考脉冲宽度的其它宽脉冲。

6. 发明申请

US20090189596A1 SIGNAL MEASURING DEVICE 失效
标题翻译：信号测量装置
公开(公告)号：US20090189596A1
公开(公告)日：2009-07-30
申请号：US12088411
申请日：2006-09-28
申请人： Koichi Nose , Masayuki Mizuno
发明人： Koichi Nose , Masayuki Mizuno
IPC分类号： G01R25/00
CPC分类号： G01R19/2509
摘要： An interpolated signal generating circuit (101) generates interpolated signals (SIG1-SIGN) of two consecutive discrete signals (SIG). N measuring circuits (501) measure interpolated signals. Since the interpolated signals are measurement targets, N-times oversampling measurement can also be performed for the discrete signals. With the oversampling measurement, the frequency spectra of the signal components of the discrete signals are maintained, and only the frequency spectrum of a noise component due to a quantization error increases to a high-frequency band, thereby reducing a noise component per unit frequency. Therefore, removing a high-frequency component from a measurement result from each measuring circuit using a low-pass filter (502) makes it possible to improve the signal-to-noise ratio of the measurement result as compared with a case in which no oversampling is performed.
摘要翻译：内插信号生成电路（101）产生两个连续离散信号（SIG）的内插信号（SIG1-SIGN）。 N个测量电路（501）测量内插信号。由于内插信号是测量目标，所以也可以对离散信号执行N次过采样测量。通过过采样测量，维持离散信号的信号分量的频谱，并且只有由于量化误差引起的噪声分量的频谱增加到高频带，从而降低每单位频率的噪声分量。因此，使用低通滤波器（502）从每个测量电路的测量结果中去除高频分量使得与没有过采样的情况相比，可以提高测量结果的信噪比被执行。

7. 发明授权

US08446162B2 Semiconductor integrated circuit device with test circuit and test method therefor 失效
标题翻译：具有测试电路的半导体集成电路器件及其测试方法
公开(公告)号：US08446162B2
公开(公告)日：2013-05-21
申请号：US12744188
申请日：2008-11-21
申请人： Koichi Nose , Masayuki Mizuno
发明人： Koichi Nose , Masayuki Mizuno
IPC分类号： G01R31/26
CPC分类号： G01R31/319 , G01R31/31725
摘要： A semiconductor integrated circuit device includes: a normal output signal counter that counts number of times a normal output signal is output by the circuit under test in response to a preset one of the input signals of the input signal set, in case where a circuit under test repeats processing on each of one or more input signals of an input signal set sequentially, a plural number of times.
摘要翻译：半导体集成电路装置包括：正常输出信号计数器，其响应于输入信号组的输入信号中的预设输入信号，对被测电路输出的正常输出信号的次数进行计数，多次重复对输入信号的一个或多个输入信号中的每一个进行重复处理。

8. 发明授权

US08355884B2 Signal quality measurement device, spectrum measurement circuit, and program 失效
标题翻译：信号质量测量装置，频谱测量电路和程序
公开(公告)号：US08355884B2
公开(公告)日：2013-01-15
申请号：US12522243
申请日：2007-12-18
申请人： Koichi Nose , Masayuki Mizuno
发明人： Koichi Nose , Masayuki Mizuno
IPC分类号： G01R23/16
CPC分类号： H04B17/318 , G01R23/16 , H04B17/15
摘要： Spectrum measurement circuit (101) includes: N-(where N is integer equal or greater than 2) phase clock generation circuit (304) for supplying phase-modulated signals in which the phase of a clock signal is shifted by a phase modulation amount each time the settings of the phase modulation amount are switched; mixer circuit (303) for taking the product of a measured signal supplied from a transmitter and the phase-modulated signals supplied from N-phase clock generation circuit (304); average value output circuit (305) for supplying an average voltage value of the output signal of mixer circuit (303); memory (307) for storing the average voltage value supplied from average value output circuit (305) for each phase modulation amount of N-phase clock generation circuit (304); and arithmetic unit (308) for using the average voltage value for each phase modulation amount of N-phase clock generation circuit (304) to calculate the signal strength of the measured signal.
摘要翻译：频谱测量电路（101）包括：N个（其中N是等于或大于2的整数）相位时钟产生电路（304），用于提供相位调制信号，其中时钟信号的相位每相位调制量偏移时间相位调制量的设置被切换; 用于获取从发射机提供的测量信号的乘积和从N相时钟产生电路（304）提供的相位调制信号的混频器电路（303）; 平均值输出电路（305），用于提供混频电路（303）的输出信号的平均电压值; 存储器（307），用于存储从N相时钟发生电路（304）的每个相位调制量的平均值输出电路（305）提供的平均电压值; 和运算单元（308），用于使用N相时钟产生电路（304）的每个相位调制量的平均电压值来计算测量信号的信号强度。

9. 发明授权

US08019560B2 Signal measuring device 失效
标题翻译：信号测量装置
公开(公告)号：US08019560B2
公开(公告)日：2011-09-13
申请号：US12088352
申请日：2006-09-28
申请人： Koichi Nose , Masayuki Mizuno
发明人： Koichi Nose , Masayuki Mizuno
IPC分类号： G01R15/00
CPC分类号： G01R31/31708
摘要： Small-scale measuring circuits (111-1qum) are arranged in m columns×q rows. The small-scale measuring circuits of each row (111-11m, 121-12m, 1q1-1qm) are connected in series. The respective rows are connected in parallel. Supplying reference signals B having different parameter values to the small-scale measuring circuits (111-11m, . . . ) connected in series makes it possible to improve the measurement range or measurement resolution. Supplying reference signals B having the same parameter to the respective rows can reduce a noise component depending on the transistor size. According to this invention, using a plurality of small-scale measuring circuits in accordance with required measurement performance concerning a measurement range, resolution, noise reduction, or the like can implement the desired performance while minimizing the area of each measuring circuit.
摘要翻译：小尺度测量电路（111-1qum）以m列×q行排列。每行的小尺度测量电路（111-11m，121-12m，1q1-1qm）串联连接。相应的行并联连接。将具有不同参数值的参考信号B提供给串联连接的小尺度测量电路（111-11m ...）可以提高测量范围或测量分辨率。向相应行提供具有相同参数的参考信号B可以根据晶体管尺寸减小噪声分量。根据本发明，根据关于测量范围，分辨率，降噪等的所需测量性能来使用多个小规模测量电路可以在最小化每个测量电路的面积的同时实现期望的性能。

10. 发明授权

US08018295B2 Modulation device and pulse wave generation device 有权
标题翻译：调制装置和脉波发生装置
公开(公告)号：US08018295B2
公开(公告)日：2011-09-13
申请号：US12602869
申请日：2008-06-06
申请人： Koichi Nose , Haruya Ishizaki , Masayuki Mizuno
发明人： Koichi Nose , Haruya Ishizaki , Masayuki Mizuno
IPC分类号： H03C3/00 , H04L27/12 , H04L27/20
CPC分类号： H04L27/20 , H03K5/13 , H03K5/156 , H03K2005/00052 , H04L27/12
摘要： Provided is a modulation device including a signal selection circuit selecting two carrier signals from a plurality of carrier signals having the same frequency and the same phase difference according to a defined control signal and outputting the selected carrier signals, and a phase interpolator adjusting the phase in smaller units than the phase difference between the plurality of carrier signals according to the control signal and modulating the frequency or the phase of the carrier signal into a baseband signal based on the carrier signals selected by the signal selection circuit to generate a carrier wave signal.
摘要翻译：提供了一种调制装置，其包括信号选择电路，根据定义的控制信号从具有相同频率和相同相位差的多个载波信号中选择两个载波信号并输出所选择的载波信号;以及相位内插器，根据控制信号比多个载波信号之间的相位差小的单位，并且基于由信号选择电路选择的载波信号将载波信号的频率或相位调制成基带信号，以产生载波信号。

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