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1. 发明授权

US07612604B2 Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US07612604B2
公开(公告)日：2009-11-03
申请号：US10429771
申请日：2003-05-06
申请人： Masayuki Miyazaki , Yusuke Kanno , Goichi Ono , Toshinobu Shinbo , Yoshihiko Yasu , Kazumasa Yanagisawa , Takashi Kuraishi
发明人： Masayuki Miyazaki , Yusuke Kanno , Goichi Ono , Toshinobu Shinbo , Yoshihiko Yasu , Kazumasa Yanagisawa , Takashi Kuraishi
IPC分类号： H03K3/01
CPC分类号： H03K19/01707 , H01L27/0928 , H03K19/0016 , H03K2217/0018
摘要： A body bias control system allows for independent design of a functional module, thereby reducing the burden of designing the module. The body bias control system provides a switch circuit having an area in which the body bias is controlled independently of its outside portion, for controlling the supply of body bias in the vicinity of the area. Preferably three types of switches are provided for switching the body bias to suitable levels for a standby mode, a mode of normal operation and a mode of high-speed operation.
摘要翻译：身体偏置控制系统允许功能模块的独立设计，从而减少设计模块的负担。身体偏置控制系统提供了一种开关电路，该开关电路具有独立于其外部部分来控制身体偏压的区域，用于控制该区域附近的身体偏压的供应。优选地，提供三种类型的开关用于将主体偏压切换到用于待机模式，正常操作模式和高速操作模式的适当水平。

2. 发明授权

US06653890B2 Well bias control circuit 失效
标题翻译：良好的偏置控制电路
公开(公告)号：US06653890B2
公开(公告)日：2003-11-25
申请号：US10284207
申请日：2002-10-31
申请人： Goichi Ono , Masayuki Miyazaki , Koichiro Ishibashi
发明人： Goichi Ono , Masayuki Miyazaki , Koichiro Ishibashi
IPC分类号： G05F146
CPC分类号： H03K19/00384 , H03K2217/0018
摘要： Disclosed is a semiconductor integrated circuit device having a control mechanism 11 for compensating not only circuit operational speed but also variations in leakage current, which includes: a main circuit 10 constructed by a CMOS; a delay monitor 21 for simulating a critical path of the main circuit 10 constructed by a CMOS and monitoring a delay of the path; a PN Vt balance compensation circuit 23 for detecting a threshold voltage difference between a PMOS transistor and an NMOS transistor; and a well bias generating circuit 25 for receiving outputs of the delay monitor 21 and the PN Vt balance compensation circuit 23 and applying a well bias to the delay monitor 21 and the main circuit 10 so as to compensate the operation speed of the delay monitor 21 to a desired speed and reduce a threshold voltage difference between the PMOS and NMOS transistors.
摘要翻译：公开了一种半导体集成电路器件，具有控制机构11，用于不仅补偿电路工作速度，而且补偿漏电流的变化，其中包括：由CMOS构成的主电路10; 延迟监视器21，用于模拟由CMOS构成的主电路10的关键路径并监视路径的延迟; 用于检测PMOS晶体管和NMOS晶体管之间的阈值电压差的PN Vt平衡补偿电路23; 以及用于接收延迟监视器21和PN Vt平衡补偿电路23的输出并向延迟监视器21和主电路10施加阱偏压的阱偏置产生电路25，以补偿延迟监视器21的操作速度达到期望的速度并且降低PMOS和NMOS晶体管之间的阈值电压差。

3. 发明授权

US07664163B2 Receiver 有权
标题翻译：接收器
公开(公告)号：US07664163B2
公开(公告)日：2010-02-16
申请号：US11288349
申请日：2005-11-29
申请人： Tatsuo Nakagawa , Ryosuke Fujiwara , Masayuki Miyazaki , Goichi Ono
发明人： Tatsuo Nakagawa , Ryosuke Fujiwara , Masayuki Miyazaki , Goichi Ono
IPC分类号： H04B1/69
CPC分类号： H04B1/71637
摘要： With the objective of enhancing receiving performance of a receiver with respect to pulse signals spread by spread codes, the receiver comprises an RF front-end section which performs amplification, an AD converter section which AD-converts signals outputted from the RF front-end section, a baseband section which inversely spreads the output of the AD converter section and performs signal detection and demodulation thereon, a reception environment measuring section which measures reception environment using the input signals of the baseband section, and a parameter setting section which sets parameters for respective parts on the basis of signals outputted from the reception environment measuring section. The parameter setting section sets the parameters for the respective parts to the optimum according to the environmental condition measured by the reception environment measuring section.
摘要翻译：为了提高接收机相对于由扩展码扩展的脉冲信号的接收性能，接收机包括执行放大的RF前端部分，对从RF前端部分输出的信号进行AD转换的AD转换器部分基带部分，其对AD转换器部分的输出进行反扩频并对其进行信号检测和解调;接收环境测量部分，其使用基带部分的输入信号测量接收环境;以及参数设置部分，其设置各自的参数基于从接收环境测量部输出的信号。参数设定部根据由接收环境测定部测定的环境条件，将各部分的参数设定为最佳。

4. 发明申请

US20060120441A1 Receiver 有权
标题翻译：接收器
公开(公告)号：US20060120441A1
公开(公告)日：2006-06-08
申请号：US11288349
申请日：2005-11-29
申请人： Tatsuo Nakagawa , Ryosuke Fujiwara , Masayuki Miyazaki , Goichi Ono
发明人： Tatsuo Nakagawa , Ryosuke Fujiwara , Masayuki Miyazaki , Goichi Ono
IPC分类号： H04B1/707 , H04L27/22
CPC分类号： H04B1/71637
摘要： With the objective of enhancing receiving performance of a receiver with respect to pulse signals spread by spread codes, the receiver comprises an RF front-end section which performs amplification, an AD converter section which AD-converts signals outputted from the RF front-end section, a baseband section which inversely spreads the output of the AD converter section and performs signal detection and demodulation thereon, a reception environment measuring section which measures reception environment using the input signals of the baseband section, and a parameter setting section which sets parameters for respective parts on the basis of signals outputted from the reception environment measuring section. The parameter setting section sets the parameters for the respective parts to the optimum according to the environmental condition measured by the reception environment measuring section.
摘要翻译：为了提高接收机相对于由扩展码扩展的脉冲信号的接收性能，接收机包括执行放大的RF前端部分，对从RF前端部分输出的信号进行AD转换的AD转换器部分基带部分，其对AD转换器部分的输出进行反扩频并对其进行信号检测和解调;接收环境测量部分，其使用基带部分的输入信号测量接收环境;以及参数设置部分，其设置各自的参数基于从接收环境测量部输出的信号。参数设定部根据由接收环境测定部测定的环境条件，将各部分的参数设定为最佳。

5. 发明授权

US06778002B2 Semiconductor integrated circuit device including a substrate bias controller and a current limiting circuit 有权
标题翻译：包括衬底偏置控制器和限流电路的半导体集成电路器件
公开(公告)号：US06778002B2
公开(公告)日：2004-08-17
申请号：US10207903
申请日：2002-07-31
申请人： Masayuki Miyazaki , Koichiro Ishibashi , Goichi Ono
发明人： Masayuki Miyazaki , Koichiro Ishibashi , Goichi Ono
IPC分类号： H03K301
CPC分类号： G05F3/205
摘要： In a semiconductor integrated circuit device, for realizing high speed, as well as superior product yield rate and usability, while reducing circuit scale and improving on product yield rate and reliability thereof, a main circuit, constructed with CMOS elements, is coupled to a speed monitor circuit for forming a speed signal corresponding to an operating speed thereof and to a substrate bias controller for supplying corresponding substrate bias voltages to the main circuit in response to the speed monitor circuit. A current limiting circuit is also provided in conjunction with the substrate bias controller to prevent an overflow of current due to bias voltage.
摘要翻译：在半导体集成电路装置中，为了实现高速化以及优异的产品成品率和可用性，在减小电路规模并提高产品产率和可靠性的同时，将由CMOS元件构成的主电路耦合到速度用于形成对应于其工作速度的速度信号的监视器电路和用于响应速度监视电路向主电路提供相应衬底偏置电压的衬底偏置控制器。还结合衬底偏置控制器提供限流电路，以防止由于偏置电压引起的电流溢出。

6. 发明申请

US20100103986A1 Receiver 失效
公开(公告)号：US20100103986A1
公开(公告)日：2010-04-29
申请号：US12654659
申请日：2009-12-29
申请人： Tatsuo Nakagawa , Ryosuke Fujiwara , Masayuki Miyazaki , Goichi Ono
发明人： Tatsuo Nakagawa , Ryosuke Fujiwara , Masayuki Miyazaki , Goichi Ono
IPC分类号： H04B1/707
CPC分类号： H04B1/71637
摘要： With the objective of enhancing receiving performance of a receiver with respect to pulse signals spread by spread codes, the receiver comprises an RF front-end section which performs amplification, an AD converter section which AD-converts signals outputted from the RF front-end section, a baseband section which inversely spreads the output of the AD converter section and performs signal detection and demodulation thereon, a reception environment measuring section which measures reception environment using the input signals of the baseband section, and a parameter setting section which sets parameters for respective parts on the basis of signals outputted from the reception environment measuring section. The parameter setting section sets the parameters for the respective parts to the optimum according to the environmental condition measured by the reception environment measuring section.

7. 发明申请

US20050088059A1 Power generation device and power generation method 审中-公开
标题翻译：发电装置及发电方式
公开(公告)号：US20050088059A1
公开(公告)日：2005-04-28
申请号：US10878549
申请日：2004-06-29
申请人： Norio Ohkubo , Masayuki Miyazaki , Hidetoshi Tanaka , Goichi Ono
发明人： Norio Ohkubo , Masayuki Miyazaki , Hidetoshi Tanaka , Goichi Ono
IPC分类号： F03G7/08 , H01L41/04 , H01L41/113 , H02N2/00 , H02P9/00 , H01L41/107
CPC分类号： H02N2/181 , H01L41/042 , H01L41/1136 , H02N2/186
摘要： There is provided a generator generating power from vibration, capable of increasing a power generation voltage even if the vibration is small in amplitude to thereby enhance efficiency of power generation. A vibration power generator, provided with a mechanism for converting vibrational energy into electrical energy, comprises a switch for switching over whether or not power is outputted, and control of the switch is executed by periodic control thereof such that switchover occurs between respective time periods for outputting the power and respective time periods for not outputting the power at cycles not less than twice and not more than 100 times cycles of vibration. With the invention, efficiency of the generator can be enhanced, and it is possible to provide electronic equipment without power supply from outside, and capable of saving trouble of battery replacement.
摘要翻译：提供了从振动发电的发电机，即使振幅小的振幅也能够提高发电电压，从而提高发电效率。具有用于将振动能转换为电能的机构的振动发电机包括用于切换电力是否被输出的开关，并且通过其周期性控制来执行开关的控制，从而在各个时间段之间发生切换，以不少于振动周期的2倍以上100倍以下的周期输出功率和各个时间段。通过本发明，可以提高发电机的效率，并且可以提供没有从外部供电的电子设备，并且能够节省电池更换的麻烦。

8. 发明授权

US06847252B1 Semiconductor integrated circuit device 失效
标题翻译：良好的偏压控制电路及方法
公开(公告)号：US06847252B1
公开(公告)日：2005-01-25
申请号：US10671477
申请日：2003-09-29
申请人： Goichi Ono , Masayuki Miyazaki , Koichiro Ishibashi
发明人： Goichi Ono , Masayuki Miyazaki , Koichiro Ishibashi
IPC分类号： H01L21/822 , G11C11/40 , H01L21/8238 , H01L27/04 , H01L27/092 , H03K17/30 , H03K19/003 , G05F1/46
CPC分类号： H03K19/00384 , H03K2217/0018
摘要： A semiconductor integrated circuit device having a mechanism of compensating not only circuit operational speed but also variations in leakage current, which includes: a main circuit constructed with CMOS device, a delay monitor for simulating a critical path of the main circuit constructed by a CMOS and monitoring a delay of the path, a PN Vt balance compensation circuit for detecting a threshold voltage difference between a PMOS transistor and an NMOS transistor, and a well bias generating circuit for receiving outputs of the delay monitor and the PN Vt balance compensation circuit and applying a well bias to the delay monitor and the main circuit so as to compensate the operation speed of the delay monitor to a desired speed and reduce a threshold voltage difference between the PMOS and NMOS transistors.
摘要翻译：一种半导体集成电路器件，其具有不仅补偿电路工作速度而且补偿漏电流的变化的机构，其包括：由CMOS器件构成的主电路，用于模拟由CMOS构成的主电路的关键路径的延迟监视器，以及监视路径的延迟，用于检测PMOS晶体管和NMOS晶体管之间的阈值电压差的PN Vt平衡补偿电路，以及用于接收延迟监视器和PN Vt平衡补偿电路的输出的阱偏压产生电路，以及应用延迟监视器和主电路的良好偏置，以便将延迟监视器的操作速度补偿到期望的速度并且减小PMOS和NMOS晶体管之间的阈值电压差。

9. 发明授权

US06867637B2 Semiconductor integrated circuit device including a substrate bias controller and a current limiting circuit 有权
标题翻译：包括衬底偏置控制器和限流电路的半导体集成电路器件
公开(公告)号：US06867637B2
公开(公告)日：2005-03-15
申请号：US10889141
申请日：2004-07-13
申请人： Masayuki Miyazaki , Koichiro Ishibashi , Goichi Ono
发明人： Masayuki Miyazaki , Koichiro Ishibashi , Goichi Ono
IPC分类号： H01L27/04 , G05F3/20 , G11C11/34 , G11C11/408 , H01L21/822 , H01L21/8238 , H01L27/092 , H03K5/135 , H03K19/094 , H03M1/66 , H03K3/01
CPC分类号： G05F3/205
摘要： In a semiconductor integrated circuit device, for realizing high speed, as well as superior product yield rate and usability, while reducing circuit scale and improving on product yield rate and reliability thereof, a main circuit, constructed with CMOS elements, is coupled to a speed monitor circuit for forming a speed signal corresponding to an operating speed thereof and to a substrate bias controller for supplying corresponding substrate bias voltages to the main circuit in response to the speed monitor circuit. A current limiting circuit is also provided in conjunction with the substrate bias controller to prevent an overflow of current due to bias voltage.
摘要翻译：在半导体集成电路装置中，为了实现高速化以及优异的产品成品率和可用性，在减小电路规模并提高产品产率和可靠性的同时，将由CMOS元件构成的主电路耦合到速度用于形成对应于其工作速度的速度信号的监视器电路和用于响应速度监视电路向主电路提供相应衬底偏置电压的衬底偏置控制器。还结合衬底偏置控制器提供限流电路，以防止由于偏置电压引起的电流溢出。

10. 发明授权

US06518825B2 Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US06518825B2
公开(公告)日：2003-02-11
申请号：US09863349
申请日：2001-05-24
申请人： Masayuki Miyazaki , Goichi Ono , Koichiro Ishibashi
发明人： Masayuki Miyazaki , Goichi Ono , Koichiro Ishibashi
IPC分类号： H03K301
CPC分类号： G11C5/143 , G11C5/146
摘要： In a semiconductor integrated circuit device comprising a CMOS circuit, the CMOS circuit operating at a high speed, consuming a small amount of power, is achieved. In particular, acceleration of the operating speed under low voltage is achieved. The semiconductor integrated circuit device of the invention comprises a main circuit including a CMOS circuit, a changeover circuit, a substrate bias control circuit and a switching circuit and, in accordance with a changing signal from the changeover circuit, switches states of a substrate of a MOS transistor of the main circuit between a state in which normal supply voltage as well as ground voltage are applied and a state in which forward bias is applied. The changeover circuit detects a drop in supply voltage, etc. and outputs changing signals.
摘要翻译：在包括CMOS电路的半导体集成电路器件中，实现高速运行的CMOS电路，消耗少量的功率。特别地，实现了低电压下的运行速度的加速。本发明的半导体集成电路器件包括：主电路，包括CMOS电路，转换电路，衬底偏置控制电路和开关电路，并且根据来自转换电路的变化信号，切换基片的状态在施加正常供电电压和接地电压的状态之间的主电路的MOS晶体管和施加正向偏压的状态。切换电路检测电源电压等的下降，并输出变化的信号。

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