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1. 发明申请

US20160173940A1 IMAGE INFORMATION PROVISION DEVICE, IMAGE INFORMATION PROVISION SYSTEM, AND IMAGE INFORMATION PROVISION METHOD 审中-公开
标题翻译：图像信息提供设备，图像信息提供系统和图像信息提供方法
公开(公告)号：US20160173940A1
公开(公告)日：2016-06-16
申请号：US14411819
申请日：2012-06-29
申请人： Masayuki KAWAMOTO , Masato ENDO , Kenji MORI , Ryota OSUMI , Ryuta TERASHIMA
发明人： Masayuki KAWAMOTO , Masato ENDO , Kenji MORI , Ryota OSUMI , Ryuta TERASHIMA
IPC分类号： H04N21/442 , H04N21/858 , H04N21/462 , H04N21/81 , H04N21/4725
CPC分类号： H04N21/44222 , H04N21/41422 , H04N21/42224 , H04N21/4622 , H04N21/4725 , H04N21/812 , H04N21/858
摘要： An image information provision device as an information terminal, for providing information relating to an image, the image information provision device including: a control section for specifying, when a predetermined object is selected on a screen in a state, in which an image of the predetermined object having an outer surface, onto which a plurality of display information pieces are added, is displayed on a display section, a display information piece that presents in a region that matches a selected position in the selection among the plurality of display information pieces added to the selected predetermined object, and outputting at least one of the specified display information piece or link information for link to the specified display information piece.
摘要翻译：一种作为信息终端的图像信息提供装置，用于提供与图像有关的信息，所述图像信息提供装置包括：控制部分，用于当在状态下的屏幕上选择预定对象时，在显示部分上显示具有添加有多个显示信息的外表面的预定对象，显示在与所选择的多个显示信息中添加的选择中的选定位置相匹配的区域中的显示信息并且输出指定的显示信息片段或链接信息中的至少一个以链接到指定的显示信息片段。

2. 发明申请

US20100159655A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICES 审中-公开
标题翻译：半导体存储器件及制造半导体存储器件的方法
公开(公告)号：US20100159655A1
公开(公告)日：2010-06-24
申请号：US12714843
申请日：2010-03-01
申请人： Masato ENDO
发明人： Masato ENDO
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A semiconductor memory device has a floating gate formed on a semiconductor substrate at certain intervals along a plane with a first insulator interposed therebetween, and a control gate formed on the layer of floating gates with a second insulator interposed therebetween. The device includes a semiconductor layer formed by selectively epitaxially growing the semiconductor substrate between the floating gates on the semiconductor substrate with a third insulator interposed therebetween.
摘要翻译：半导体存储器件具有沿着具有第一绝缘体的平面以一定间隔形成在半导体衬底上的浮置栅极，以及形成在浮置栅极层上的控制栅极，其间插入第二绝缘体。该器件包括通过在半导体衬底上的浮置栅极之间选择性地外延生长半导体衬底而形成的半导体层，其间插入第三绝缘体。

3. 发明申请

US20080239816A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080239816A1
公开(公告)日：2008-10-02
申请号：US11862586
申请日：2007-09-27
申请人： Masato ENDO
发明人： Masato ENDO
IPC分类号： G11C16/04 , H01L21/336
CPC分类号： H01L27/115 , G11C16/0483 , H01L27/105 , H01L27/11519 , H01L27/11526 , H01L27/11529 , Y10S257/90
摘要： A semiconductor memory device comprises a memory cell unit including at least one memory cell having a structure with a floating gate and a control gate stacked via an insulator on a semiconductor substrate. A common source line is connected to one end of the memory cell unit. A bit line is connected to the other end of the memory cell unit. The control gate has at least an upper portion with a width along the gate length formed wider than the width of the floating gate.
摘要翻译：半导体存储器件包括存储单元单元，其包括至少一个存储单元，其具有通过半导体衬底上的绝缘体堆叠的具有浮置栅极和控制栅极的结构。公共源极线连接到存储单元单元的一端。位线连接到存储单元单元的另一端。控制栅极具有至少一个沿着栅极长度形成的宽度比浮动栅极的宽度更宽的上部。

4. 发明申请

US20120241872A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20120241872A1
公开(公告)日：2012-09-27
申请号：US13236690
申请日：2011-09-20
申请人： Masato ENDO
发明人： Masato ENDO
IPC分类号： H01L29/78
CPC分类号： H01L27/11524 , H01L27/11531
摘要： A nonvolatile semiconductor memory device in one embodiment includes a select gate switch transistor having a gate insulating film formed on a semiconductor substrate, a gate electrode formed on the gate insulating film, and first and second source/drain regions provided in the semiconductor substrate so as to face each other across the gate electrode. The first source/drain region includes a first n-type impurity layer and a second n-type impurity layer which has a higher impurity concentration and has a shallower depth than the first n-type impurity layer. The second source/drain region has a third n-type impurity layer which has a lower impurity concentration and has a shallower depth than the first n-type impurity layer and a fourth n-type impurity layer which has a higher impurity concentration and has a deeper depth than the third n-type impurity layer.
摘要翻译：一个实施例中的非易失性半导体存储器件包括选择栅极开关晶体管，其具有形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的栅极电极以及设置在半导体衬底中的第一和第二源极/漏极区域，以跨越栅极电极彼此面对。第一源极/漏极区包括第一n型杂质层和具有比第一n型杂质层更浅的杂质浓度的第二n型杂质层。第二源极/漏极区具有第三n型杂质层，其具有较低的杂质浓度并且具有比第一n型杂质层更浅的深度和具有较高杂质浓度的第四n型杂质层，并且具有比第三n型杂质层更深的深度。

5. 发明申请

US20080157557A1 Straddle-Type Vehicle 有权
标题翻译：跨骑车
公开(公告)号：US20080157557A1
公开(公告)日：2008-07-03
申请号：US11961078
申请日：2007-12-20
申请人： Masato ENDO
发明人： Masato ENDO
IPC分类号： B60N2/02
CPC分类号： B62J1/12
摘要： A straddle-type vehicle having a seat that pops up. A seat assembly has a front end section that is latched by a seat connection member. The seat assembly is elastically deformable in an upward-downward direction of the vehicle. The seat assembly is latched by a seat lock such that it is bent in the upward-downward direction when in a latched state.
摘要翻译：具有弹出的座椅的跨骑式车辆。座椅组件具有由座椅连接构件锁定的前端部分。座椅组件可在车辆的向上 - 向下的方向上弹性变形。座椅组件通过座椅锁定闩锁，使得当处于锁定状态时，座椅组件被向上 - 向下弯曲。

6. 发明申请

US20130062682A1 SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体存储器及其制造方法
公开(公告)号：US20130062682A1
公开(公告)日：2013-03-14
申请号：US13428430
申请日：2012-03-23
申请人： Masato ENDO , Yoshiko Kato
发明人： Masato ENDO , Yoshiko Kato
IPC分类号： H01L29/792 , H01L21/76
CPC分类号： H01L27/11524 , H01L27/11546
摘要： According to one embodiment, a semiconductor memory includes a memory cell provided in a first active area surrounded with a first isolation insulating film, a first transistor provided in a second active area surrounded with a second isolation insulating film, a shield gate electrode on the second isolation insulating film. The bottom surface of the shield gate electrode is positioned more closely to a semiconductor substrate side as compared with the highest upper surface of the second isolation insulating film.
摘要翻译：根据一个实施例，半导体存储器包括设置在由第一隔离绝缘膜包围的第一有源区域中的存储单元，设置在被第二隔离绝缘膜包围的第二有源区域中的第一晶体管，第二隔离绝缘膜上的屏蔽栅电极隔离绝缘膜。与第二隔离绝缘膜的最高上表面相比，屏蔽栅电极的底表面更靠近半导体衬底侧。

7. 发明申请

US20110188309A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110188309A1
公开(公告)日：2011-08-04
申请号：US13014212
申请日：2011-01-26
申请人： Masato ENDO
发明人： Masato ENDO
IPC分类号： G11C5/06 , H01L27/112
CPC分类号： G11C5/06 , H01L27/112
摘要： According to one embodiment, a semiconductor device includes a first circuit unit having first and second interconnects, a second circuit unit having third and fourth interconnects, and an intermediate unit provided therebetween and having first and second transistors juxtaposed to each other along a direction perpendicular to a direction from the first circuit unit toward the second circuit unit. A high impurity concentration region in a first connection region of one diffusion layer of the first transistor is connected to the first interconnect, and other diffusion layer is connected to the third interconnect. A distance from the first connection region to a gate is longer than a distance from the second connection region to a gate. An midpoint region with a narrower width than the first connection region is provided between the gate and the first connection region of the one diffusion layer of the first transistor.
摘要翻译：根据一个实施例，半导体器件包括具有第一和第二互连的第一电路单元，具有第三和第四互连的第二电路单元，以及设置在它们之间的中间单元，并且具有沿着垂直于第一和第二互连的方向彼此并置的第一和第二晶体管从第一电路单元朝向第二电路单元的方向。第一晶体管的一个扩散层的第一连接区域中的高杂质浓度区域连接到第一互连，其它扩散层连接到第三互连。从第一连接区域到栅极的距离比从第二连接区域到栅极的距离长。在第一晶体管的一个扩散层的栅极和第一连接区域之间设置有宽度比第一连接区域窄的中点区域。

8. 发明申请

US20110309422A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20110309422A1
公开(公告)日：2011-12-22
申请号：US13051516
申请日：2011-03-18
申请人： Masato ENDO , Mitsuhiro Noguchi
发明人： Masato ENDO , Mitsuhiro Noguchi
IPC分类号： H01L29/78
CPC分类号： H01L27/105 , H01L27/0629 , H01L27/11531 , H01L28/20
摘要： According to one embodiment, a semiconductor device includes a first resistance element including a first conductive material, an inter-gate insulation film formed on both ends of the first conductive material in a first direction, and a second conductive material formed above the first conductive material and configured to connect with the first conductive material via a first connection region from which the inter-gate insulation film is removed, and a second resistance element including a third conductive material, the inter-gate insulation film formed on both ends of the third conductive material in the first direction, and a fourth conductive material formed above the third conductive material and configured to connect with the third conductive material via a second connection region from which the inter-gate insulation film is removed, wherein a length of the second connection region is greater than a length of the first connection region in the first direction.
摘要翻译：根据一个实施例，半导体器件包括第一电阻元件，第一电阻元件包括第一导电材料，在第一方向上形成在第一导电材料的两端上的栅极间绝缘膜和形成在第一导电材料上方的第二导电材料并且被配置为经由去除所述栅极间绝缘膜的第一连接区域与所述第一导电材料连接，以及包括第三导电材料的第二电阻元件，所述栅极间绝缘膜形成在所述第三导电材料在第一方向上形成，第四导电材料形成在第三导电材料之上，并被配置为经由去除栅间绝缘膜的第二连接区域与第三导电材料连接，其中第二连接区域大于第一方向上的第一连接区域的长度。

9. 发明申请

US20110275213A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110275213A1
公开(公告)日：2011-11-10
申请号：US13186712
申请日：2011-07-20
申请人： Masato ENDO , Tatsuya Kato
发明人： Masato ENDO , Tatsuya Kato
IPC分类号： H01L21/768
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L27/11519 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a plurality of first interconnection layers which are provided in an insulating layer and formed in a pattern having a width and space smaller than a resolution limit of an exposure technique, and a second interconnection layer which is provided between the first interconnection layers in the insulating layer and has a width larger than that of a first interconnection layer. A space between the second interconnection layer and each of first interconnection layers adjacent to both sides of the second interconnection layer equals the space between the first interconnection layers.
摘要翻译：一种半导体器件包括：多个第一互连层，其设置在绝缘层中，并且形成为具有比曝光技术的分辨率极限小的宽度和间隔的图案;以及第二互连层，设置在第一互连层在绝缘层中并且具有比第一互连层的宽度更大的宽度。第二互连层与与第二互连层的两侧相邻的每个第一互连层之间的间隔等于第一互连层之间的空间。

10. 发明申请

US20100052061A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：US20100052061A1
公开(公告)日：2010-03-04
申请号：US12484526
申请日：2009-06-15
申请人： Masato ENDO , Kanae UCHIDA
发明人： Masato ENDO , Kanae UCHIDA
IPC分类号： H01L27/088 , H01L21/762
CPC分类号： H01L21/823462 , H01L21/76229 , H01L21/823481 , H01L27/088 , H01L27/105 , H01L27/11546
摘要： A semiconductor device includes a plurality of first MOS transistors has a first gate electrode formed on a first gate insulating film provided on a semiconductor substrate, a plurality of second MOS transistors has a second gate electrode formed on a second gate insulating film which is provided on the substrate and which is smaller in thickness than the first gate insulating film. A first element isolation region has a first region and a second region, a bottom surface of the second region is deeper than that of the first region by the difference of thickness between the first gate insulating film and the second gate insulating film, and a bottom surface of the first region is equal in a bottom surface of a second element isolation region.
摘要翻译：一种半导体器件，包括多个第一MOS晶体管，具有形成在设置在半导体衬底上的第一栅极绝缘膜上的第一栅极，多个第二MOS晶体管具有形成在第二栅极绝缘膜上的第二栅极，并且其厚度小于第一栅极绝缘膜的厚度。第一元件隔离区域具有第一区域和第二区域，第二区域的底表面比第一区域的第一栅极绝缘膜和第二栅极绝缘膜之间的厚度差更深，第一区域的表面在第二元件隔离区域的底表面中相等。

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