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    • 4. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    • 非易失性半导体存储器件
    • US20120319077A1
    • 2012-12-20
    • US13560557
    • 2012-07-27
    • Naoki YASUDADaisuke MATSUSHITAKoichi MURAOKA
    • Naoki YASUDADaisuke MATSUSHITAKoichi MURAOKA
    • H01L47/00
    • H01L27/101H01L27/1021H01L27/2418H01L27/2481
    • According to one embodiment, a nonvolatile semiconductor memory device includes a plurality of first interconnections arranged parallel, a plurality of second interconnections arranged parallel to intersect the first interconnections, and memory cell portions respectively arranged at intersecting portions between the first and second interconnections and each configured by laminating a variable-resistance element and a diode element. The diode element has a laminated structure having a first insulating film, a conductive fine grain layer and a second insulating film. The physical film thickness of the second insulating film is greater than the first insulating film and the dielectric constant of the second insulating film is greater than the first insulating film.
    • 根据一个实施例,非易失性半导体存储器件包括平行布置的多个第一互连,并行布置成与第一互连相交的多个第二互连,以及分别布置在第一和第二互连之间的相交部分处的每个配置的存储单元部分 通过层叠可变电阻元件和二极管元件。 二极管元件具有具有第一绝缘膜,导电细晶粒层和第二绝缘膜的层叠结构。 第二绝缘膜的物理膜厚度大于第一绝缘膜,并且第二绝缘膜的介电常数大于第一绝缘膜。
    • 6. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    • 非易失性半导体存储器件
    • US20110210303A1
    • 2011-09-01
    • US13038771
    • 2011-03-02
    • Koichi MURAOKAHiroyuki Nagashima
    • Koichi MURAOKAHiroyuki Nagashima
    • H01L47/00
    • G11C13/003G11C13/0004G11C13/0007G11C13/0014G11C2213/31G11C2213/32G11C2213/56G11C2213/71G11C2213/76H01L27/101H01L27/2418H01L27/2463
    • According to one embodiment, there is provided a nonvolatile semiconductor memory device including a first interconnection layer, memory cell modules each of which is formed by laminating a non-ohmic element layer with an MIM structure having an insulating film sandwiched between metal films and a variable resistance element layer, and a second interconnection layer formed on the memory cell modules, the insulating film of the non-ohmic element layer includes plural layers whose electron barriers and dielectric constants are different, or contains impurity atoms that form defect levels in the insulating film or contains semiconductor or metal dots. The nonvolatile semiconductor memory device using non-ohmic elements and variable resistance elements in which memory cells can be miniaturized and formed at low temperatures is realized by utilizing the above structures.
    • 根据一个实施例,提供了一种非易失性半导体存储器件,其包括第一互连层,存储单元模块,每个存储单元模块通过层叠具有MIM结构的非欧姆元件层而形成,所述MIM结构具有夹在金属膜之间的绝缘膜和可变 电阻元件层和形成在存储单元模块上的第二互连层,非欧姆元件层的绝缘膜包括其电子势垒和介电常数不同的多个层,或包含在绝缘膜中形成缺陷水平的杂质原子 或包含半导体或金属点。 通过利用上述结构,实现了使用非欧姆元件和可变电阻元件的非易失性半导体存储器件,其中存储单元可以在低温下小型化并形成。
    • 7. 发明申请
    • NONVOLATILE SEMICONDUCTOR MEMORY
    • 非易失性半导体存储器
    • US20090166710A1
    • 2009-07-02
    • US12189400
    • 2008-08-11
    • Tatsuo SHIMIZUKoichi MURAOKA
    • Tatsuo SHIMIZUKoichi MURAOKA
    • H01L29/00
    • H01L29/792H01L21/28273H01L21/28282H01L29/513H01L29/517
    • A nonvolatile semiconductor memory device includes: a semiconductor substrate; and a memory cell. The memory cell includes: a source region and a drain region formed at a distance from each other on the semiconductor substrate; a tunnel insulating film formed on a channel region of the semiconductor substrate, the channel region being located between the source region and the drain region; a charge storage film formed on the tunnel insulating film; a charge block film formed on the charge storage film; and a control electrode that is formed on the charge block film. The control electrode includes a Hf oxide film or a Zr oxide film having at least one element selected from the first group consisting of V, Cr, Mn, and Tc added thereto, and having at least one element selected from the second group consisting of F, H, and Ta added thereto.
    • 非易失性半导体存储器件包括:半导体衬底; 和存储单元。 存储单元包括:在半导体衬底上形成为彼此间隔一定距离的源极区域和漏极区域; 隧道绝缘膜,形成在所述半导体衬底的沟道区上,所述沟道区位于所述源极区和所述漏极区之间; 形成在隧道绝缘膜上的电荷存储膜; 形成在电荷存储膜上的电荷阻挡膜; 以及形成在电荷阻挡膜上的控制电极。 控制电极包括Hf氧化物膜或Zr氧化物膜,其具有从添加有V,Cr,Mn和Tc的第一组中选择的至少一种元素,并且具有至少一种选自F ,H和Ta。