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    • 1. 发明授权
    • Cathode ray tube display
    • 阴极射线管显示
    • US5589883A
    • 1996-12-31
    • US257441
    • 1994-06-08
    • Masanori OginoTakeo YamadaMiyuki IkedaTsuneo FujikuraTakahiko FujiwaraEtsuhiro Nakagiri
    • Masanori OginoTakeo YamadaMiyuki IkedaTsuneo FujikuraTakahiko FujiwaraEtsuhiro Nakagiri
    • G09G1/04G09G1/00G09G1/16H04N3/16H04N3/22H04N9/64H04N9/73H04N5/68
    • H04N9/645
    • A cathode ray tube display in which a signal for detection of a cathode current is inserted into a part of the vertical blanking period of the video signal to be displayed, a cathode current corresponding to the signal for detection is detected, and a cathode voltage or a grid voltage is negative feedback controlled so that the detected cathode current becomes constant, thereby stabilizing the cathode current. The display has a local overscan circuit for executing a vertical scan on the screen with a width larger than a predetermined scan width only at a timing of the cathode current detecting signal inserted for a vertical blanking period, and even in the case where an underscan system to scan by a width smaller than a predetermined display screen width is used as a scan system of the screen display. The invention prevents a harmful visible display image by the cathode current detecting signal appears on the screen.
    • 一种阴极射线管显示器,其中用于检测阴极电流的信号被插入待显示的视频信号的垂直消隐周期的一部分中,检测与用于检测的信号相对应的阴极电流,以及阴极电压或 栅极电压被负反馈控制,使得检测到的阴极电流变得恒定,从而稳定阴极电流。 显示器具有本地过扫描电路,仅在垂直消隐期间插入的阴极电流检测信号的定时,在屏幕上执行宽度大于预定扫描宽度的垂直扫描,并且即使在下扫系统 使用小于预定显示屏宽度的宽度扫描作为屏幕显示的扫描系统。 本发明防止阴极电流检测信号出现在屏幕上的有害可见显示图像。
    • 3. 发明授权
    • Convergence correction circuit
    • 收敛校正电路
    • US4980614A
    • 1990-12-25
    • US194305
    • 1988-05-16
    • Takeo YamadaMiyuki IkedaToshiyuki KimotoMasanori OginoTsuneo FujikuraYoshihiro Arakawa
    • Takeo YamadaMiyuki IkedaToshiyuki KimotoMasanori OginoTsuneo FujikuraYoshihiro Arakawa
    • H04N3/23H04N3/27H04N9/28
    • H04N9/28
    • A convergence correction circuit according to the present invention has a phased locked loop including a programmable counter. The programmable counter has programmable count start and end points. The output of the programmable counter is supplied to a memory storing convergence distortion correcting data therein. As the horizontal screen size is increased, a value closer to the lower limit 0 of the start point as compared with that taken when the horizontal size is small is set as the count start point of the programmable counter, and a value closer to the upper limit (2.sup.7 -1) of the end point as compared with that taken when the horizontal size is small is set as the count end point. In accordance with the horizontal screen size, the count start and end points of the programmable counter are changed. Correct convergence correction is performed even if the horizontal screen size is changed.
    • 根据本发明的会聚校正电路具有包括可编程计数器的定相锁相环。 可编程计数器具有可编程计数开始和结束点。 可编程计数器的输出被提供给存储其中的会聚失真校正数据的存储器。 随着水平画面尺寸的增加,与水平尺寸较小时相比,开始点的下限值越小,可设定为可编程计数器的计数开始点,越接近上限值 与水平尺寸较小时相比,终点的极限(27-1)被设定为计数终点。 根据水平屏幕尺寸,可编程计数器的计数开始和结束点被更改。 即使水平画面尺寸发生变化,也可进行正确的会聚校正。
    • 6. 发明授权
    • High precision PLL with circuit for preventing erroneous capture
    • 高精度PLL,具有防止错误捕获的电路
    • US5053724A
    • 1991-10-01
    • US530183
    • 1990-05-29
    • Masanori OginoTakeo YamadaMiyuki Ikeda
    • Masanori OginoTakeo YamadaMiyuki Ikeda
    • H04N5/12G09G5/00G09G5/02G09G5/12G09G5/18H03L7/093H04N3/27
    • H03L7/093H03L2207/14
    • In a high prrecision PLL circuit arrangement, a phase detecting circuit produces a detecting signal which is directly proportional to a phase difference between a horizontal synchronizing signal and a voltage-controlled oscillating signal. A loop filter circuit produces a delay signal for delaying a frequency control at a predetermined time constant in response to the detecting signal derived from the phase detecting circuit. A voltage-controlled oscillating circuit produces an oscillating signal having a frequency directly proportional to a voltage of the delay signal from the loop filter circuit. A non-linear circuit includes a non-linear element for changing at least one of an AC gain and a DC gain of the loop filter circuit, and prevents an erroneous capture phenomenon of the PLL circuit arrangement in response to the detecting signal from the phase detecting circuit.
    • 在高精度PLL电路装置中,相位检测电路产生与水平同步信号和压控振荡信号之间的相位差成正比的检测信号。 环路滤波器电路响应于从相位检测电路导出的检测信号,产生用于延迟预定时间常数的频率控制的延迟信号。 压控振荡电路产生具有与来自环路滤波器电路的延迟信号的电压成正比的频率的振荡信号。 非线性电路包括用于改变环路滤波器电路的AC增益和DC增益中的至少一个的非线性元件,并且响应于来自相位的检测信号防止PLL电路装置的错误捕获现象 检测电路。
    • 7. 发明授权
    • Cathode ray tube display device
    • 阴极射线管显示装置
    • US4918359A
    • 1990-04-17
    • US335434
    • 1989-04-10
    • Masanori OginoTakeo YamadaMiyuki Ikeda
    • Masanori OginoTakeo YamadaMiyuki Ikeda
    • H04N3/16H04N3/18
    • H04N3/18
    • A vertical deflection circuit used in a cathode ray tube display device for shortening a vertical blanking period is disclosed which includes back-flow blocking diode means for preventing an oscillating current from flowing backward to a vertical push-pull output amplifier circuit in the vertical blanking period, resonating capacitor means, and electrostatic energy supplying means for energizing a fly-back pulse. The resonating capacitor means is provided to generate resonance due to the capacitance of the capacitor means and the inductance of a vertical deflection coil, on the basis of the electro-magnetic energy of the vertical deflection coil at a time immediately before a retrace line starts from the bottom of display screen, thereby producing a fly-back pulse. The back-flow blocking diode means prevents the fly-back pulse from flowing backward to the vertical output circuit, that is, prevents the fly-back pulse from de-energizing the output of the vertical output circuit. According to the above vertical deflection circuit, the power consumption in a vertical retrace operation is reduced, and a ratio of the vertical blanking period to a vertical scanning period can be made small. Accordingly, an effective scanning time is increased, and it becomes possible to display information precisely.
    • 公开了用于缩短垂直消隐期的阴极射线管显示装置中使用的垂直偏转电路,其包括用于防止振荡电流在垂直消隐期间向后流向垂直推挽输出放大器电路的反向流阻塞二极管装置 谐振电容器装置和用于激励回扫脉冲的静电能量供给装置。 谐振电容器装置被设置为基于电容器装置的电容和垂直偏转线圈的电感,基于垂直偏转线圈的电磁能在回扫线开始之前的时间产生谐振 显示屏的底部,从而产生回扫脉冲。 逆流阻塞二极管装置防止反向脉冲向后流向垂直输出电路,即防止回扫脉冲使垂直输出电路的输出断电。 根据上述垂直偏转电路,垂直回扫操作中的功耗降低,并且可以使垂直消隐周期与垂直扫描周期的比例变小。 因此,有效的扫描时间增加,可以精确地显示信息。
    • 8. 发明授权
    • Vertical deflection circuit for CRT display device
    • CRT显示装置的垂直偏转电路
    • US5010280A
    • 1991-04-23
    • US514592
    • 1990-04-26
    • Masanori OginoTakeo YamadaMiyuki Ikeda
    • Masanori OginoTakeo YamadaMiyuki Ikeda
    • H04N3/22G09G1/04G09G1/16H04N3/223
    • H04N3/223
    • A vertical deflection circuit for a CRT display device comprises a first negative feedback circuit for detecting a vertical deflection current flowing through a vertical deflection coil feeding it back to a ramp wave generator to thereby stabilize a vertical size of the display image on the CRT screen, second negative feedback circuit connected between the deflection coil to an input of the output circuit for detecting a mean vertical deflection current which is fedback to an output circuit to thereby stabilize a vertical position of the display image on the CRT screen and a controlling circuit for controlling feedback amount of the first and second negative feedback circuits to thereby regulate a vertical size and a vertical position of the display image on the CRT screen variably.
    • 用于CRT显示装置的垂直偏转电路包括:第一负反馈电路,用于检测流过垂直偏转线圈的垂直偏转电流,将其反馈回斜波发生器,从而稳定CRT屏幕上显示图像的垂直尺寸; 第二负反馈电路连接在偏转线圈与输出电路的输入端之间,用于检测反馈到输出电路的平均垂直偏转电流,从而稳定显示图像在CRT屏幕上的垂直位置,以及控制电路,用于控制 从而可以可变地调节CRT显示屏上的显示图像的垂直尺寸和垂直位置。