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    • 2. 发明授权
    • Semiconductor device and manufacturing method thereof
    • 半导体装置及其制造方法
    • US06306709B1
    • 2001-10-23
    • US09270648
    • 1999-03-16
    • Masanori MiyagiHaruo KonishiKazuaki KuboYoshikazu KojimaToru ShimizuYutaka SaitohToru MachidaTetsuya Kaneko
    • Masanori MiyagiHaruo KonishiKazuaki KuboYoshikazu KojimaToru ShimizuYutaka SaitohToru MachidaTetsuya Kaneko
    • H01L21336
    • H01L29/78696H01L21/3226H01L21/823462H01L27/0705H01L29/1041H01L29/1045H01L29/66757
    • In a MISFET, areas where a channel surface of a channel region is inverted by a first gate voltage and areas where the channel surface is inverted by a second gate voltage are provided in the channel region of the MISFET in plane as components thereof. The channel region 104 having a first impurity concentration determined by a surface concentration of a P-type semiconductor substrate and a channel region 105 having a second impurity concentration determined by doping an impurity to the region selected by a pattern 106 of a mask for doping impurity by ion implantation and others are provided in a channel region of an N-type MOSFET on the P-type semiconductor substrate. The channel region 104 having the first impurity concentration and the channel region 105 having the second impurity concentration are divided into a plurality of plane shapes. The channel region of the same MOSFET may be structured by the plurality of plane shapes having the plurality of impurity concentrations as described above and a threshold voltage of the MOSFET may be readily set to a desired value in response to a plane area ratio of the area having the first impurity concentration and the area having the second impurity concentration, allowing to realize a high performance semiconductor integrated circuit device at low cost.
    • 在MISFET中,在MISFET的沟道区域中设置沟道区域的沟道表面被第一栅极电压反转的区域和沟道表面由第二栅极电压反转的区域,作为其组成。 具有由P型半导体衬底的表面浓度确定的第一杂质浓度的通道区域104和通过掺杂杂质确定的第二杂质浓度的沟道区域105,所述沟道区域105由用于掺杂杂质的掩模的图案106选择的区域 通过离子注入等设置在P型半导体衬底上的N型MOSFET的沟道区中。 具有第一杂质浓度的沟道区域104和具有第二杂质浓度的沟道区域105被分成多个平面形状。 相同MOSFET的沟道区域可以由具有如上所述的多个杂质浓度的多个平面形状构成,并且可以根据区域的平面面积比容易地将MOSFET的阈值电压设置为期望值 具有第一杂质浓度和具有第二杂质浓度的面积,从而以低成本实现高性能半导体集成电路器件。
    • 5. 发明授权
    • Method and apparatus for manufacturing image displaying apparatus
    • 用于制造图像显示装置的方法和装置
    • US06905384B2
    • 2005-06-14
    • US09781305
    • 2001-02-13
    • Toshihiko MiyazakiKohei NakataTetsuya Kaneko
    • Toshihiko MiyazakiKohei NakataTetsuya Kaneko
    • H01J9/39H01J9/18H01J9/26H01J9/38H01J9/40H01J9/46H01J9/48H01J9/00
    • H01J9/46H01J9/18H01J9/38H01J9/48H01J2329/00
    • A method and an apparatus for manufacturing an image displaying apparatus having a display panel. A first substrate of the display panel on which a phosphor exciter is disposed and a second substrate of the display panel on which phosphors emitting light by the phosphor exciter is provided, are prepared under a vacuum atmosphere. Then, the first and the second substrates are carried in a getter processing chamber or bake processing chamber, and getter processing or bake processing is applied thereto under the vacuum atmosphere. After the processing, the first and the second substrates are carried in a seal processing chamber, where the substrates are heat sealed under the vacuum atmosphere. Thus, reduction of vacuum exhaust time and a high vacuum degree in manufacturing an image displaying apparatus is attained and efficiency of manufacturing is improved.
    • 一种用于制造具有显示面板的图像显示装置的方法和装置。 在真空气氛下制备其上设置有荧光体激发器的显示面板的第一基板和设置有由荧光体激发器发光的荧光体的显示面板的第二基板。 然后,将第一和第二基板载带在吸气处理室或烘烤处理室中,并在真空环境下对其进行吸气处理或烘烤处理。 在处理之后,第一和第二基板被携带在密封处理室中,其中基板在真空气氛下被热密封。 因此,在制造图像显示装置中实现真空排气时间的减少和真空度的提高,并且提高了制造效率。