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1. 发明授权

US06690220B2 Reset circuit of semiconductor circuit 失效
标题翻译：半导体电路复位电路
公开(公告)号：US06690220B2
公开(公告)日：2004-02-10
申请号：US09894840
申请日：2001-06-29
申请人： Masanobu Kuboshima , Keisuke Tanaka , Toshihiko Maruoka
发明人： Masanobu Kuboshima , Keisuke Tanaka , Toshihiko Maruoka
IPC分类号： H03K302
CPC分类号： H03K17/18 , H03K17/22
摘要： A reset circuit of a semiconductor circuit for reliably resetting plural reset target circuits in the semiconductor circuit, even when a surge noise signal having a short pulse length or the like is input to the reset circuit, the reset circuit including a reset signal control circuit for controlling timing of deactivating a reset instruction signal for resetting plural reset target circuits in the semiconductor circuit. Respective reset target circuits are for outputting reset completion signals to the reset signal control circuit when the respective reset target circuits have been reset. The reset signal control circuit also is for deactivating the reset instruction signal when all of the reset completion signals have been activated.
摘要翻译：即使当具有短脉冲长度等的浪涌噪声信号被输入到复位电路时，半导体电路的复位电路可靠地复位半导体电路中的多个复位目标电路，复位电路包括一个复位信号控制电路控制用于复位半导体电路中的多个复位目标电路的复位指令信号的定时。各复位目标电路用于在复位目标电路复位时将复位完成信号输出到复位信号控制电路。复位信号控制电路也用于当所有复位完成信号都被激活时，使复位指令信号无效。

2. 发明申请

US20050030428A1 On-screen display device 审中-公开
标题翻译：屏幕显示设备
公开(公告)号：US20050030428A1
公开(公告)日：2005-02-10
申请号：US10909365
申请日：2004-08-03
申请人： Satoru Kotani , Toshihiko Maruoka , Keisuke Tanaka
发明人： Satoru Kotani , Toshihiko Maruoka , Keisuke Tanaka
IPC分类号： H04N5/66 , G09G5/00 , G09G5/30 , G09G5/377 , H04N5/50
CPC分类号： G09G5/222 , G09G5/30 , G09G5/40 , H04N5/44504 , H04N21/42692 , H04N21/431
摘要： The present invention provides an on-screen display device that can effectively utilize a part of a video RAM area for characters which perform special character display. This on-screen display device includes a register that retains information for performing special character display of respective lines, such as through display or space display, and compares display information of the respective line between the register and a display line counter, to output information indicating whether the special character display is to be performed or not to the video RAM, thereby effectively utilizing a part for performing the special character display in the video RAM area.
摘要翻译：本发明提供一种可以有效利用视频RAM区域的一部分用于执行特殊字符显示的字符的屏幕显示装置。该屏幕显示装置包括保存用于通过显示或空格显示来执行各行的特殊字符显示的信息的寄存器，并且比较寄存器和显示行计数器之间的各行的显示信息，以输出指示是否要对视频RAM执行特殊字符显示，从而有效地利用在视频RAM区域中执行特殊字符显示的部分。

3. 发明授权

US07009617B2 On-screen display device 失效
标题翻译：屏幕显示设备
公开(公告)号：US07009617B2
公开(公告)日：2006-03-07
申请号：US10814191
申请日：2004-04-01
申请人： Satoru Kotani , Toshihiko Maruoka , Keisuke Tanaka
发明人： Satoru Kotani , Toshihiko Maruoka , Keisuke Tanaka
IPC分类号： G09G5/22
CPC分类号： G09G5/222
摘要： An on-screen display device that can effectively utilize a video RAM area. This on-screen display device includes a video RAM that holds character data of desired characters that are to be displayed; a display character setting unit for locating the number of bits as many as the remainder that is obtained by dividing character data corresponding to one character by the number of bits that can be read at one-time access from the video RAM, collectively by one line in the video RAM; buffers for storing a part of character data of the respective characters; a character generator ROM for outputting font data corresponding to the character codes; and a display control unit for reading character data from the video RAM via the buffers at the display of the characters, and reading the font data that are created by the character generator ROM, thereby outputting an on-screen output signal.
摘要翻译：可以有效利用视频RAM区域的屏幕显示装置。该屏幕显示装置包括保存要显示的期望字符的字符数据的视频RAM; 显示字符设置单元，用于将通过将与一个字符相对应的字符数据除以可从视频RAM一次访问的可读取的位数获得的剩余部分的位数多于一行，在视频RAM中; 用于存储各个字符的字符数据的一部分的缓冲器; 字符发生器ROM，用于输出与字符代码对应的字体数据; 以及显示控制单元，用于经由显示字符的缓冲器从视频RAM读取字符数据，并读取由字符发生器ROM创建的字体数据，从而输出屏上输出信号。

4. 发明申请

US20050134596A1 On-screen display device 失效
标题翻译：屏幕显示设备
公开(公告)号：US20050134596A1
公开(公告)日：2005-06-23
申请号：US10814191
申请日：2004-04-01
申请人： Satoru Kotani , Toshihiko Maruoka , Keisuke Tanaka
发明人： Satoru Kotani , Toshihiko Maruoka , Keisuke Tanaka
IPC分类号： G06F13/00 , G09G5/00 , G09G5/22 , G09G5/24 , G09G5/30 , G09G5/37 , H04N5/445
CPC分类号： G09G5/222
摘要： An on-screen display device that can effectively utilize a video RAM area. This on-screen display device includes a video RAM that holds character data of desired characters that are to be displayed; a display character setting unit for locating the number of bits as many as the remainder that is obtained by dividing character data corresponding to one character by the number of bits that can be read at one-time access from the video RAM, collectively by one line in the video RAM; buffers for storing a part of character data of the respective characters; a character generator ROM for outputting font data corresponding to the character codes; and a display control unit for reading character data from the video RAM via the buffers at the display of the characters, and reading the font data that are created by the character generator ROM, thereby outputting an on-screen output signal.
摘要翻译：可以有效利用视频RAM区域的屏幕显示装置。该屏幕显示装置包括保存要显示的期望字符的字符数据的视频RAM; 显示字符设置单元，用于将通过将与一个字符相对应的字符数据除以可从视频RAM一次访问的可读取的位数获得的剩余部分的位数多于一行，在视频RAM中; 用于存储各个字符的字符数据的一部分的缓冲器; 字符发生器ROM，用于输出与字符代码对应的字体数据; 以及显示控制单元，用于经由显示字符的缓冲器从视频RAM读取字符数据，并读取由字符发生器ROM创建的字体数据，从而输出屏上输出信号。

5. 发明授权

US07170564B2 On-screen display device 有权
标题翻译：屏幕显示设备
公开(公告)号：US07170564B2
公开(公告)日：2007-01-30
申请号：US10752509
申请日：2004-01-08
申请人： Toshihiko Maruoka , Keisuke Tanaka
发明人： Toshihiko Maruoka , Keisuke Tanaka
IPC分类号： H04N5/445 , G09G5/22 , G09G5/36 , G06T11/00 , H04N9/76 , H04N9/74
CPC分类号： G09G5/225 , G09G5/222 , H04N5/44504
摘要： This invention provides an on-screen display device that can display an increased number of types of characters without enlarging the video RAM area. This on-screen display device includes a character generator ROM that has n (n is an integer that is equal to or larger than 3) areas, a flag holding unit that outputs an area designation flag for designating a desired number of desired areas among the n areas in the character generator ROM, a display character setting unit that writes a desired character code at a predetermined position in a video RAM, and a display control unit that reads the character code from the video RAM, reads font data corresponding to the read character code from an area in the character generator ROM, which is indicated by the area designation flag outputted from the flag holding unit, and outputs an on-screen output signal using the font data.
摘要翻译：本发明提供一种屏幕显示装置，其可以在不放大视频RAM区域的情况下显示增加数量的字符类型。该屏幕显示装置包括具有n（n为3以上的整数）区域的字符发生器ROM，标志保持单元，输出用于指定所需区域的期望数量的区域指定标志字符发生器ROM中的n个区域，在视频RAM中的预定位置写入期望的字符代码的显示字符设置单元和从视频RAM读取字符代码的显示控制单元读取与读取的字体数据相对应的字体数据字符代码从字符发生器ROM中的区域指示，由标志保持单元输出的区域指定标志指示，并使用字体数据输出屏幕上的输出信号。

6. 发明授权

US08479079B2 Integrated data and header protection for tape drives 有权
标题翻译：磁带驱动器的集成数据和接头保护
公开(公告)号：US08479079B2
公开(公告)日：2013-07-02
申请号：US12757882
申请日：2010-04-09
申请人： Roy Daron Cideciyan , Hisato Matsuo , Thomas Mittelholzer , Kenji Ohtani , Paul J Seger , Keisuke Tanaka
发明人： Roy Daron Cideciyan , Hisato Matsuo , Thomas Mittelholzer , Kenji Ohtani , Paul J Seger , Keisuke Tanaka
IPC分类号： G06F11/00
CPC分类号： G11B20/18 , G11B2020/184 , G11B2020/1853 , G11B2220/90
摘要： A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.
摘要翻译：在磁带驱动器中集成数据和头部保护的方法包括接收一组数据组织成行和列。该数组被扩展以包括数组中每行数据的一个或多个头。该方法为阵列中的数据提供了二维纠错码（ECC）保护，并为阵列中的标头提供了ECC保护的一个维度。本文还公开了相应的装置。

7. 发明授权

US08412891B2 Arbitrated access to memory shared by a processor and a data flow 有权
标题翻译：仲裁访问由处理器和数据流共享的内存
公开(公告)号：US08412891B2
公开(公告)日：2013-04-02
申请号：US12916668
申请日：2010-11-01
申请人： Masayuki Demura , Hisato Matsuo , Keisuke Tanaka
发明人： Masayuki Demura , Hisato Matsuo , Keisuke Tanaka
IPC分类号： G06F12/12 , G06F13/18 , G06F13/34
CPC分类号： G06F13/161 , G06F13/1673 , Y02D10/14
摘要： Memory access arbitration allowing a shared memory to be used both as a memory for a processor and as a buffer for data flows, including an arbiter unit that makes assignment for access requests to the memory sequentially and transfers blocks of data in one round-robin cycle according to bandwidths required for the data transfers, sets priorities for the transfer blocks so that the bandwidths required for the data transfers are met by alternate transfer of the transfer blocks, and executes an access from the processor with an upper limit set for the number of access times from the processor to the memory in one round-robin cycle so that the access from the processor with the highest priority and with a predetermined transfer length exerts less effect on bandwidths for data flow transfers in predetermined intervals between the transfer blocks.
摘要翻译：存储器访问仲裁允许共享存储器既用作处理器的存储器又用作数据流的缓冲器，包括仲裁器单元，其顺序地对存储器的访问请求进行分配，并在一个循环周期中传送数据块根据数据传输所需的带宽，设置传输块的优先级，使得通过传输块的交替传送来满足数据传输所需的带宽，并且执行对处理器的访问，其具有为在一个循环周期中从处理器到存储器的访问时间，使得来自具有最高优先级并且具有预定传送长度的处理器的访问对传输块之间的预定间隔中的数据流传输的带宽的影响较小。

8. 发明授权

US08276045B2 ECC interleaving for multi-track recording on magnetic tape 有权
标题翻译：用于磁带上多轨记录的ECC交错
公开(公告)号：US08276045B2
公开(公告)日：2012-09-25
申请号：US12351738
申请日：2009-01-09
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11C29/00
CPC分类号： H03M13/2909 , G11B20/1202 , G11B20/1833 , G11B20/1866 , G11B2020/1836 , G11B2020/1853 , G11B2220/93 , H03M13/15 , H03M13/1515
摘要： Conventional C2 coding and interleaving for multi-track data tape in LTO-3/4 do not support recording data onto a number of concurrent tracks which is not a power of two. Higher-rate longer C2 codes, which do not degrade error rate performance, are provided. An adjustable format and interleaving scheme accommodates future tape drives in which the number of concurrent tracks is not necessarily a power of two. A data set is segmented into a plurality of unencoded subdata sets and parity bytes are generated for each row and column. The parameters of the C2 code include N2 as the least common multiple of the number of possible tracks to which codeword objects are to be written. COs are formed from N2 C1 codewords, mapped onto a logical data track according to information within headers of the CO and modulation encoded into synchronized COs which are written to the tape.
摘要翻译： LTO-3/4中的多轨数据磁带的常规C2编码和交织不支持将数据记录到不是2的幂的多个并发磁道上。提供了更高速率的更长的C2代码，这不会降低错误率性能。可调格式和交错方案适应将来的磁带驱动器，其中并发轨道的数量不一定是二的幂。将数据集分割为多个未编码的子数据集，并为每行和列生成奇偶校验字节。 C2码的参数包括N2作为要写入码字对象的可能轨道数的最小公倍数。 CO由N 2 C1码字形成，根据被写入到磁带的编码到同步的CO中的CO和报头中的信息映射到逻辑数据轨道。

9. 发明申请

US20110252290A1 INTEGRATED DATA AND HEADER PROTECTION FOR TAPE DRIVES 有权
标题翻译：集成数据和磁带保护用于磁带驱动
公开(公告)号：US20110252290A1
公开(公告)日：2011-10-13
申请号：US12757882
申请日：2010-04-09
申请人： Roy D. Cideciyan , Hisato Matsuo , Thomas Mittelholzer , Kenji Ohtani , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Hisato Matsuo , Thomas Mittelholzer , Kenji Ohtani , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11C11/00 , G06F11/16
CPC分类号： G11B20/18 , G11B2020/184 , G11B2020/1853 , G11B2220/90
摘要： A method for integrating data and header protection in tape drives includes receiving an array of data organized into rows and columns. The array is extended to include one or more headers for each row of data in the array. The method provides two dimensions of error correction code (ECC) protection for the data in the array and a single dimension of ECC protection for the headers in the array. A corresponding apparatus is also disclosed herein.
摘要翻译：在磁带驱动器中集成数据和头部保护的方法包括接收一组数据组织成行和列。该数组被扩展以包括数组中每行数据的一个或多个头。该方法为阵列中的数据提供了二维纠错码（ECC）保护，并为阵列中的标头提供了ECC保护的一个维度。本文还公开了相应的装置。

10. 发明授权

US07876516B2 Rewrite-efficient ECC/interleaving for multi-track recording on magnetic tape 有权
标题翻译：在磁带上进行多轨录音的高效ECC /交错
公开(公告)号：US07876516B2
公开(公告)日：2011-01-25
申请号：US12351747
申请日：2009-01-09
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11B5/09 , G11B20/14
CPC分类号： G11B20/1833 , G11B20/1201 , G11B20/1866 , G11B2020/1287 , G11B2020/1289 , G11B2020/1446 , G11B2020/1836 , G11B2220/93 , H03M13/27 , H03M13/271
摘要： For writing data to multi-track tape, a received data set is received and segmented into unencoded subdata sets, each comprising an array having K2 rows and K1 columns. For each unencoded subdata set, N1-K1 C1-parity bytes are generated for each row and N2-K2 C2-parity bytes are generated for each column. The C1 and C2 parity bytes are appended to the ends of the row and column, respectively, to form encoded C1 and C2 codewords, respectively. All of the C1 codewords per data set are endowed with a specific codeword header to form a plurality of partial codeword objects (PCOs). Each PCO is mapped onto a logical data track according to information within the header. On each logical data track, adjacent PCOs are merged to form COs which are modulation encoded and mapped into synchronized COs. Then T synchronized COs are written simultaneously to the data tape where T is the number of concurrent active tracks on the data tape.
摘要翻译：为了将数据写入多轨磁带，接收到的数据集并被分割成未编码的子数据集，每个子集包括具有K2行和K1列的阵列。对于每个未编码的子数据集，为每行生成N1-K1 C1-奇偶校验字节，并为每列生成N2-K2 C2-奇偶校验字节。 C1和C2奇偶校验字节分别附加到行和列的末端，分别形成编码的C1和C2码字。每个数据集的所有C1码字都具有特定的码字头以形成多个部分码字对象（PCO）。每个PCO根据标题内的信息被映射到逻辑数据轨道上。在每个逻辑数据轨道上，相邻的PCO被合并以形成被调制编码并被映射到同步的CO中的CO。然后将T同步的CO同时写入数据磁带，其中T是数据磁带上的并发活动磁道的数量。

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