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1. 发明授权

US4017886A Discrete semiconductor device having polymer resin as insulator and method for making the same 失效
标题翻译：具有聚合物树脂作为绝缘体的分立半导体器件及其制造方法
公开(公告)号：US4017886A
公开(公告)日：1977-04-12
申请号：US578174
申请日：1975-05-16
申请人： Masami Tomono , Akira Abe , Seiki Harada , Kikuji Sato , Takeshi Takagi , Genichi Kamoshita , Yuichiro Oya , Atsushi Saiki
发明人： Masami Tomono , Akira Abe , Seiki Harada , Kikuji Sato , Takeshi Takagi , Genichi Kamoshita , Yuichiro Oya , Atsushi Saiki
IPC分类号： H01L21/00 , H01L21/312 , H01L21/60 , H01L21/607 , H01L23/29 , H01L23/485 , H01L23/532 , H01L23/30
CPC分类号： H01L24/85 , H01L21/00 , H01L21/312 , H01L23/29 , H01L23/485 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/48 , H01L2224/0345 , H01L2224/04042 , H01L2224/05548 , H01L2224/05556 , H01L2224/05558 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/05669 , H01L2224/05671 , H01L2224/0568 , H01L2224/45124 , H01L2224/45144 , H01L2224/4807 , H01L2224/4845 , H01L2224/48463 , H01L2224/48624 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48666 , H01L2224/48669 , H01L2224/48671 , H01L2224/4868 , H01L2224/48724 , H01L2224/48739 , H01L2224/48744 , H01L2224/48747 , H01L2224/48766 , H01L2224/48769 , H01L2224/48771 , H01L2224/4878 , H01L2224/85205 , H01L2224/85424 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01016 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01047 , H01L2924/0106 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/12044 , H01L2924/30105
摘要： Disclosed is a discrete semiconductor device comprising a Si body having an emitter region, a base region and a collector region, an SiO.sub.2 layer disposed on the surface of the body, a polyimide resin having a thickness of 5 .mu. disposed on the SiO.sub.2 layer, electrodes penetrating through the SiO.sub.2 layer and the polyimide resin thereby contacting the emitter region and the base region, respectively and extending on the surface of the polyimide resin, whereby it becomes easy to bond a wire connected to an external electrode with the electrodes.
摘要翻译：公开了一种分立半导体器件，其包括具有发射极区域，基极区域和集电极区域的Si体，设置在主体表面上的SiO 2层，设置在SiO 2层上的厚度为5μm的聚酰亚胺树脂，电极穿透SiO 2层和聚酰亚胺树脂，从而分别与发射极区域和基极区域接触，并且在聚酰亚胺树脂的表面上延伸，从而容易将与外部电极连接的电线与电极接合。

2. 发明授权

US09142289B2 Method for driving variable resistance element, and nonvolatile memory device 有权
标题翻译：用于驱动可变电阻元件的方法和非易失性存储器件
公开(公告)号：US09142289B2
公开(公告)日：2015-09-22
申请号：US13883075
申请日：2012-06-11
申请人： Takeshi Takagi , Koji Katayama
发明人： Takeshi Takagi , Koji Katayama
IPC分类号： G11C11/21 , G11C13/00
CPC分类号： G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/009 , G11C2013/0092 , G11C2213/15 , G11C2213/32
摘要： A driving method for driving a variable resistance element and a nonvolatile memory device, which achieves stable storage operation. In a low resistance write process, a low resistance writing voltage pulse having the negative polarity is applied once to a variable resistance layer included in a variable resistance element while in a high resistance write process, a high resistance writing voltage pulse having the positive polarity is applied more than twice to the same variable resistance layer. Here, when a voltage value of one of the high resistance writing voltage pulses is VH1 and a voltage value of the other high resistance writing voltage pulse applied subsequently is VH2, VH1>VH2 is satisfied.
摘要翻译：用于驱动可变电阻元件和非易失性存储器件的驱动方法，其实现稳定的存储操作。在低电阻写入处理中，具有负极性的低电阻写入电压脉冲在包括在可变电阻元件中的可变电阻层上施加一次，而在高电阻写入处理中，具有正极性的高电阻写入电压脉冲是施加两倍以上的同一可变电阻层。这里，当高电阻写入电压脉冲之一的电压值为VH1，随后施加的另一个高电阻写入电压脉冲的电压值为VH2时，满足VH1> VH2。

3. 发明授权

US08796660B2 Nonvolatile memory element comprising a resistance variable element and a diode 有权
标题翻译：非易失性存储元件包括电阻可变元件和二极管
公开(公告)号：US08796660B2
公开(公告)日：2014-08-05
申请号：US12375881
申请日：2007-09-21
申请人： Takeshi Takagi , Takumi Mikawa
发明人： Takeshi Takagi , Takumi Mikawa
IPC分类号： H01L29/02 , H01L47/00 , H01L29/04 , H01L29/06 , H01L29/08 , H01L31/0352 , H01L45/00 , H01L27/24 , H01L27/10 , H01L21/00 , G11C11/00
CPC分类号： H01L45/04 , H01L27/101 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/1683
摘要： A nonvolatile memory element (20) of the present invention comprises a resistance variable element (14) and a diode (18) which are formed on a substrate (10) such that the resistance variable element (14) has a resistance variable layer (11) sandwiched between a lower electrode (12) and an upper electrode (13), and the diode (18) which is connected in series with the resistance variable element (14) in the laminating direction and has an insulating layer or semiconductor layer (15) sandwiched between a first electrode (16) at the lower side and a second electrode (17) at the upper side. The resistance variable layer (11) is embedded in a first contact hole (21) formed on the lower electrode (12). A first area (22) where insulating layer or semiconductor layer (15) of the diode (18) is in contact with a first electrode (16) of the diode (18) is larger than at least one of a second area (23) where the resistance variable layer (11) is in contact with the upper electrode (13) and a third area (24) where the resistance variable layer (11) is in contact with the lower electrode (12).
摘要翻译：本发明的非易失性存储元件（20）包括形成在基板（10）上的电阻可变元件（14）和二极管（18），使得电阻可变元件（14）具有电阻变化层（11 ）和位于下电极（12）和上电极（13）之间的二极管（18），以及与电阻可变元件（14）在层叠方向上串联连接并具有绝缘层或半导体层（15）的二极管）夹在下侧的第一电极（16）和上侧的第二电极（17）之间。电阻变化层（11）嵌入形成在下电极（12）上的第一接触孔（21）中。二极管（18）的绝缘层或半导体层（15）与二极管（18）的第一电极（16）接触的第一区域（22）大于第二区域（23）中的至少一个，其中电阻变化层（11）与上电极（13）接触，电阻变化层（11）与下电极（12）接触的第三区域（24）。

4. 发明授权

US08712702B2 Measuring apparatus for measuring a physical property of a sample 有权
标题翻译：用于测量样品的物理性质的测量装置
公开(公告)号：US08712702B2
公开(公告)日：2014-04-29
申请号：US13167585
申请日：2011-06-23
申请人： Takeshi Takagi , Koji Okumura , Tatsuo Kamata
发明人： Takeshi Takagi , Koji Okumura , Tatsuo Kamata
IPC分类号： G06F19/00 , G01N1/10
CPC分类号： G01N1/38 , B01L3/502715 , B01L2200/10 , B01L2300/0654 , B01L2300/0816 , B01L2300/087 , B01L2300/0877 , B01L2300/0883 , B01L2300/0887 , B01L2400/0406 , G01N27/3271 , G01N2021/054 , G01N2035/1018
摘要： A measuring apparatus for measuring a predetermined physical property of a liquid measuring sample comprises a preparing unit in which a plurality of materials including at least a liquid material are mixed; a supply route which supplies the liquid material to the preparing unit; a withdrawing unit which withdraws the measuring sample from the preparing unit into the supply route, the measuring sample being prepared to contain the liquid material supplied to the preparing unit via the supply route; and a measuring unit which measures the predetermined physical property of the measuring sample withdrawn into the supply route by the withdrawing unit.
摘要翻译：用于测量液体测量样品的预定物理性能的测量装置包括其中混合至少包含液体材料的多种材料的制备单元; 将液体材料供给到制备单元的供给路径; 所述取出单元将所述测量样品从所述准备单元抽出到所述供给路径中，所述测量样品准备容纳经由所述供给路径供给到所述准备单元的液体材料; 以及测量单元，其测量由所述抽出单元抽出到所述供给路径中的所述测量样本的预定物理属性。

5. 发明授权

US08565004B2 Nonvolatile memory device and method for programming the same 有权
标题翻译：非易失性存储器件及其编程方法
公开(公告)号：US08565004B2
公开(公告)日：2013-10-22
申请号：US13379463
申请日：2011-06-28
申请人： Mitsuteru Iijima , Takeshi Takagi , Koji Katayama
发明人： Mitsuteru Iijima , Takeshi Takagi , Koji Katayama
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C11/5685 , G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2213/72 , G11C2213/74 , G11C2213/76 , H01L27/101 , H01L27/1021 , H01L27/2409 , H01L45/08 , H01L45/1233 , H01L45/146
摘要： A method for programming a nonvolatile memory device according to the present invention includes a step of detecting an excessively low resistance cell from among a plurality of memory cells (11) (S101); a step of changing the resistance value of a load resistor (121) to a second resistance value smaller than a first resistance value (S103); and a step of causing, by applying a voltage pulse to a series circuit including the excessively low resistance cell and the load resistor (121) having the second resistance value, a variable resistance element (105) included in the excessively low resistance cell to shift to a second high resistance state having a resistance value greater than that of the first low resistance state (S104).
摘要翻译：根据本发明的非易失性存储器件的编程方法包括从多个存储单元（11）中检测过低电阻单元的步骤（S101）; 将负载电阻器（121）的电阻值改变为小于第一电阻值的第二电阻值的步骤（S103）; 以及通过对包括过低电阻单元的串联电路和具有第二电阻值的负载电阻器（121）施加电压脉冲，使包含在过低电阻单元中的可变电阻元件（105）移位到具有大于第一低电阻状态的电阻值的第二高电阻状态（S104）。

6. 发明授权

US08553446B2 Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor device incorporating nonvolatile memory element 有权
标题翻译：非易失性存储元件，其制造方法和非易失性存储元件的非易失性半导体器件
公开(公告)号：US08553446B2
公开(公告)日：2013-10-08
申请号：US13567646
申请日：2012-08-06
申请人： Satoru Mitani , Yoshihiko Kanzawa , Koji Katayama , Takeshi Takagi
发明人： Satoru Mitani , Yoshihiko Kanzawa , Koji Katayama , Takeshi Takagi
IPC分类号： G11C11/00 , G11C13/00
CPC分类号： G11C13/0069 , G11C13/0007 , G11C2213/32 , G11C2213/34 , G11C2213/71 , G11C2213/79 , H01L27/101 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A nonvolatile memory element of the present invention comprises a first electrode (103), a second electrode (108); a resistance variable layer (107) which is interposed between the first electrode (103) and the second electrode (107) and is configured to switch a resistance value reversibly in response to an electric signal applied between the electrodes (103) and (108), and the resistance variable layer (107) has at least a multi-layer structure in which a first hafnium-containing layer having a composition expressed as HfOx (0.9≦x≦1.6), and a second hafnium-containing layer having a composition expressed as HfOy (1.8
摘要翻译：本发明的非易失性存储元件包括第一电极（103），第二电极（108）介于第一电极（103）和第二电极（107）之间的电阻变化层（107），其被配置为响应于施加在电极（103）和（108）之间的电信号可逆地切换电阻值，，并且电阻变化层（107）具有至少多层结构，其中具有表示为HfO x（0.9 @ x @ 1.6）的组成的第一含铪层和具有表达的组成的第二含铪层因为HfOy（1.8

7. 发明申请

US20130223131A1 METHOD FOR DRIVING VARIABLE RESISTANCE ELEMENT, AND NONVOLATILE MEMORY DEVICE 有权
标题翻译：驱动可变电阻元件的方法和非易失性存储器件
公开(公告)号：US20130223131A1
公开(公告)日：2013-08-29
申请号：US13883075
申请日：2012-06-11
申请人： Takeshi Takagi , Koji Katayama
发明人： Takeshi Takagi , Koji Katayama
IPC分类号： G11C13/00
CPC分类号： G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/009 , G11C2013/0092 , G11C2213/15 , G11C2213/32
摘要： A driving method for driving a variable resistance element and a nonvolatile memory device, which achieves stable storage operation. In a low resistance write process, a low resistance writing voltage pulse having the negative polarity is applied once to a variable resistance layer included in a variable resistance element while in a high resistance write process, a high resistance writing voltage pulse having the positive polarity is applied more than twice to the same variable resistance layer. Here, when a voltage value of one of the high resistance writing voltage pulses is VH1 and a voltage value of the other high resistance writing voltage pulse applied subsequently is VH2, VH1>VH2 is satisfied.
摘要翻译：用于驱动可变电阻元件和非易失性存储器件的驱动方法，其实现稳定的存储操作。在低电阻写入处理中，具有负极性的低电阻写入电压脉冲在包括在可变电阻元件中的可变电阻层上施加一次，而在高电阻写入处理中，具有正极性的高电阻写入电压脉冲是施加两倍以上的同一可变电阻层。这里，当高电阻写入电压脉冲之一的电压值为VH1，随后施加的另一个高电阻写入电压脉冲的电压值为VH2时，满足VH1> VH2。

8. 发明授权

US08486788B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08486788B2
公开(公告)日：2013-07-16
申请号：US13162310
申请日：2011-06-16
申请人： Junko Iwanaga , Takeshi Takagi , Yoshihiko Kanzawa , Haruyuki Sorada , Tohru Saitoh , Takahiro Kawashima
发明人： Junko Iwanaga , Takeshi Takagi , Yoshihiko Kanzawa , Haruyuki Sorada , Tohru Saitoh , Takahiro Kawashima
IPC分类号： H01L21/336
CPC分类号： H01L29/785 , H01L21/823431 , H01L27/0886 , H01L29/66795
摘要： A semiconductor device includes: a semiconductor substrate in which a trench is formed; a source region and a drain region each of which is buried in the trench and contains an impurity of the same conductive type; a semiconductor FIN buried in the trench and provided between the source and drain regions; a gate insulating film provided on a side surface of the semiconductor FIN as well as the upper surface of the semiconductor FIN; and a gate electrode formed on the gate insulating film.
摘要翻译：一种半导体器件包括：形成沟槽的半导体衬底; 源极区域和漏极区域，每个源极区域和漏极区域被埋在沟槽中并且包含相同导电类型的杂质; 掩埋在沟槽中并设置在源区和漏区之间的半导体FIN; 设置在半导体FIN的侧表面上的栅极绝缘膜以及半导体FIN的上表面; 以及形成在栅极绝缘膜上的栅电极。

9. 发明申请

US20130112936A1 RESISTANCE CHANGE ELEMENT AND MANUFACTURING METHOD THEREFOR 有权
标题翻译：电阻变化元件及其制造方法
公开(公告)号：US20130112936A1
公开(公告)日：2013-05-09
申请号：US13810708
申请日：2012-01-18
申请人： Zhiqiang WEI , Takeshi Takagi , Satoru Mitani , Yoshio Kawashima , Ichirou Takahashi
发明人： Zhiqiang WEI , Takeshi Takagi , Satoru Mitani , Yoshio Kawashima , Ichirou Takahashi
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L45/08 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/16 , H01L45/1625 , H01L45/1675
摘要： A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer, the second electrode has a single needle-shaped part at the interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the needle-shaped part.
摘要翻译：一种可变电阻元件，包括：第一电极; 第二电极; 以及可变电阻层，其具有根据施加的电信号可逆地改变的电阻值，其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层具有低于第一过渡金属氧化物层的氧缺乏程度的氧缺乏的氧化物，第二电极在与第二可变电阻层的界面处具有单个针状部分，并且插入第二可变电阻层在第一可变电阻层和第二电极之间，与第一可变电阻层和第二电极接触并覆盖针状部分。

10. 发明授权

US08432721B2 Method of programming variable resistance element, method of initializing variable resistance element, and nonvolatile storage device 有权
标题翻译：编程可变电阻元件的方法，初始化可变电阻元件的方法和非易失性存储器件
公开(公告)号：US08432721B2
公开(公告)日：2013-04-30
申请号：US13201890
申请日：2011-02-01
申请人： Mitsuteru Iijima , Takeshi Takagi
发明人： Mitsuteru Iijima , Takeshi Takagi
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0007 , G11C13/0097 , G11C2013/0073 , G11C2013/0083 , G11C2213/32 , G11C2213/72 , G11C2213/79 , H01L45/08 , H01L45/146
摘要： Programming a variable resistance element includes: a writing step of applying a writing voltage pulse to transition metal oxide comprising two stacked metal oxide layers to decrease resistance of the metal oxide, each metal oxide layer having different oxygen deficiency; and an erasing step of applying an erasing voltage pulse, of different polarity than the writing pulse, to the metal oxide to increase resistance of the metal oxide. |Vw1|>|Vw2|, Vw1 representing voltage of the writing pulse for first to N-th writing steps, and Vw2 representing voltage of the writing pulse for (N+1)-th and subsequent writing steps, N being at least equal to 1, te1>te2, te1 representing pulse width of the erasing pulse for first to M-th erasing steps, and te2 representing pulse width of the erasing pulse for (M+1)-th and subsequent erasing steps. M>1. The (N+1)-th writing step follows the M-th erasing step.
摘要翻译：编程可变电阻元件包括：写入步骤，对包含两个堆叠的金属氧化物层的过渡金属氧化物施加写入电压脉冲，以降低金属氧化物的电阻，每个金属氧化物层具有不同的氧缺乏; 以及将与写入脉冲不同的擦除电压脉冲施加到金属氧化物以增加金属氧化物的电阻的擦除步骤。 | Vw1 |> | Vw2 |，表示第一至第N写入步骤的写入脉冲的电压的Vw1，以及表示第（N + 1）个和后续写入步骤的写入脉冲的电压的Vw2，N至少相等到1，te1> te2，te1表示第一到第M擦除步骤的擦除脉冲的脉冲宽度，te2表示用于（M + 1）个和随后的擦除步骤的擦除脉冲的脉冲宽度。 M> 1。第（N + 1）个写入步骤在第M擦除步骤之后。

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