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1. 发明授权

US5578530A Manufacturing method of semiconductor device which includes forming a silicon nitride layer using a Si, N, and F containing compound 失效
标题翻译：包括使用含有Si，N和F的化合物形成氮化硅层的半导体器件的制造方法
公开(公告)号：US5578530A
公开(公告)日：1996-11-26
申请号：US501738
申请日：1995-07-12
申请人： Masakazu Muroyama , Hideyuki Kito
发明人： Masakazu Muroyama , Hideyuki Kito
IPC分类号： H01L21/3205 , H01L21/318 , H01L21/316
CPC分类号： H01L21/3185
摘要： In a manufacturing method of semiconductor device having a fluorine-containing SiN layer, an SiN layer excellent in the step coverage can be formed using as raw material an Si compound containing at least both nitrogen and fluorine, by virtue of an intermediate product which, during the formation of the above SiN layer, is formed, liable to polymerization and has fluidity. Moreover, as the above Si compound contains fluorine that is taken into the formation of the fluorine-containing SiN layer whose dielectric constant is lowered thereby, delay in circuit operation due to parasitic capacitances can be reduced.
摘要翻译：在具有含氟SiN层的半导体器件的制造方法中，可以通过中间产物，通过中间产物，以至少包含氮和氟两者的Si化合物为原料，形成阶梯覆盖度优异的SiN层形成上述SiN层，易于聚合并具有流动性。此外，由于上述Si化合物含有氟化物，其中介电常数降低的含氟SiN层的形成，因此可以减少由寄生电容引起的电路工作延迟。

2. 发明授权

US06407011B1 Low dielectric constant insulating films with laminated carbon-containing silicon oxide and organic layers 有权
标题翻译：低介电常数绝缘膜，含有层状碳的氧化硅和有机层
公开(公告)号：US06407011B1
公开(公告)日：2002-06-18
申请号：US09626397
申请日：2000-07-26
申请人： Koichi Ikeda , Masanaga Fukasawa , Hideyuki Kito , Toshiaki Hasegawa
发明人： Koichi Ikeda , Masanaga Fukasawa , Hideyuki Kito , Toshiaki Hasegawa
IPC分类号： H01L2131
CPC分类号： H01L21/76835 , H01L21/02118 , H01L21/0212 , H01L21/02137 , H01L21/022 , H01L21/02274 , H01L21/02282 , H01L21/31144 , H01L21/3122 , H01L21/3124 , H01L21/76801 , H01L21/76808
摘要： A stacked insulating film having an organic insulating film, and a carbon-containing silicon oxide film formed on the organic insulating film is disclosed. The carbon-containing silicon oxide film has a carbon content of 8 atom % to 25 atom %.
摘要翻译：公开了一种具有有机绝缘膜的叠层绝缘膜和在有机绝缘膜上形成的含碳氧化硅膜。含碳氧化硅膜的碳含量为8原子％至25原子％。

3. 发明授权

US06878632B2 Semiconductor device having a conductive layer with a cobalt tungsten phosphorus coating and a manufacturing method thereof 有权
标题翻译：具有具有钴钨磷涂层的导电层的半导体器件及其制造方法
公开(公告)号：US06878632B2
公开(公告)日：2005-04-12
申请号：US10149481
申请日：2001-10-12
申请人： Takeshi Nogami , Naoki Komai , Hideyuki Kito , Mitsuru Taguchi
发明人： Takeshi Nogami , Naoki Komai , Hideyuki Kito , Mitsuru Taguchi
IPC分类号： H01L23/52 , H01L21/288 , H01L21/306 , H01L21/3205 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/311
CPC分类号： H01L21/76843 , H01L21/288 , H01L21/2885 , H01L21/7684 , H01L21/76849 , H01L21/76852 , H01L21/76865 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device capable of suppressing diffusion of copper at an interface between a copper wire and a cap film to enhance an electromigration resistance to ensure reliability of the copper wire, and a manufacturing method thereof are provided. The semiconductor device according to the present invention comprises an insulating film (12) formed on a substrate (11), a concave portion (13) (for example, a groove) formed in the insulating film, a conductive layer (15) embedded in the concave portion through a barrier layer (14), and a cobalt tungsten phosphorus coating (16) to connect with the barrier layer on the side of the conductive layer and to coat the conductive layer on the opening side of the concave portion.
摘要翻译：一种半导体器件及其制造方法，其能够抑制铜线与盖膜之间的界面处铜的扩散，提高电迁移性，确保铜线的可靠性。根据本发明的半导体器件包括形成在基板（11）上的绝缘膜（12），形成在绝缘膜中的凹部（13）（例如，沟槽），嵌入在绝缘膜通过阻挡层（14）的凹部，以及与导电层一侧的阻挡层连接的钴钨磷涂层（16），并且在凹部的开口侧涂布导电层。

4. 发明授权

US06736699B2 Electrolytic polishing apparatus, electrolytic polishing method and wafer subject to polishing 失效
标题翻译：电解抛光装置，电解抛光方法和待研磨的晶片
公开(公告)号：US06736699B2
公开(公告)日：2004-05-18
申请号：US09922135
申请日：2001-08-03
申请人： Takeshi Nogami , Naoki Komai , Hideyuki Kito , Mitsuru Taguchi
发明人： Takeshi Nogami , Naoki Komai , Hideyuki Kito , Mitsuru Taguchi
IPC分类号： B24B4900
CPC分类号： B24B37/013 , B24B49/04 , C25F3/16 , H01L21/67253 , Y10S451/908
摘要： An electrolytic polishing apparatus for electrolytic-polishing a conductive film subject to formed on a substrate including a resistance measuring unit for measuring the resistance of the film. The electrolytic polishing apparatus may also include a termination point detecting portion for detecting a termination point of polishing by reading a variation of the resistance value measured by the resistance measuring unit, or a polishing control portion for terminating electrolytic polishing on the basis of the termination point of polishing detected by the termination point detecting portion.
摘要翻译：一种电解抛光装置，用于对形成在包括用于测量膜的电阻的电阻测量单元的基板上形成的导电膜进行电解抛光。电解抛光装置还可以包括终止点检测部分，用于通过读取由电阻测量单元测量的电阻值的变化来检测终止点，或者基于终止点来终止电解抛光的抛光控制部分由终端点检测部分检测到的抛光。

5. 发明授权

US06602787B2 Method for fabricating semiconductor devices 失效
公开(公告)号：US06602787B2
公开(公告)日：2003-08-05
申请号：US09879782
申请日：2001-06-12
申请人： Naoki Komai , Takeshi Nogami , Hideyuki Kito , Mitsuru Taguchi
发明人： Naoki Komai , Takeshi Nogami , Hideyuki Kito , Mitsuru Taguchi
IPC分类号： H01L2144
CPC分类号： H01L21/76873 , H01L21/2885 , H01L21/32115 , H01L21/32134 , H01L21/7684 , H01L21/76843
摘要： The present invention is to provide a method for fabricating semiconductor devices capable of eliminating a height difference on a base member caused by a residual plating seed layer remained in a portion where an electrode comes into contact and is thus prevented from contacting with an electrolytic polishing fluid, where such height difference has been a problem in introducing the electrolytic polishing process into wafer process. The method comprises the steps of forming a plating seed layer on the base member; forming by the plating process a plated film on the plating seed layer in an area excluding the outer peripheral portion of the base member; polishing the plated film together with the plating seed layer by the electrolytic polishing process; and selectively removing the plating seed layer remaining on the outer peripheral portion of the base member.

6. 发明授权

US07731281B2 Vehicle seat 失效
标题翻译：车座
公开(公告)号：US07731281B2
公开(公告)日：2010-06-08
申请号：US11804894
申请日：2007-05-21
申请人： Makoto Kurita , Koji Uno , Yukio Hiruta , Yoshiaki Morita , Masaru Ueda , Nobukatsu Masuda , Hideyuki Kito
发明人： Makoto Kurita , Koji Uno , Yukio Hiruta , Yoshiaki Morita , Masaru Ueda , Nobukatsu Masuda , Hideyuki Kito
IPC分类号： B60R21/00
CPC分类号： B60N2/015 , B60N2/06 , B60N2/4228 , B60N2/42709 , B60N2/42736
摘要： An impact absorbing plate 31 is disposed between a front part 31z of the impact absorbing plate 31 and a vehicle body 11 so that a rupture generating part 44 ruptured by impact is extended in the front and rear direction of the vehicle, and the impact absorbing plate 31 is fixed to a front part 13a and a rear part 13b of the front seat bracket 13 provided in the vehicle body by rivets 33 and 33. A portion of front part 31z of the impact absorbing plate 31 is cut to form a cutoff part 45, and a front end 17a of a rail 17 provided in a seat section is attached to a convex part 35, which is molded so as to expand upward an inner side of the cutoff part 45, by a rivet 34.
摘要翻译：冲击吸收板31设置在冲击吸收板31的前部31z和车身11之间，使得通过冲击破裂的破裂产生部44在车辆的前后方向上延伸，并且冲击吸收板 31通过铆钉33和33固定在设置在车身中的前排座椅支架13的前部13a和后部13b上。冲击吸收板31的前部31z的一部分被切割以形成切断部45 并且设置在座椅部分中的轨道17的前端17a被安装在凸起部分35上，凸部35通过铆钉34被模制成向上延伸到切割部分45的内侧。

7. 发明申请

US20070273186A1 Vehicle seat 失效
标题翻译：车座
公开(公告)号：US20070273186A1
公开(公告)日：2007-11-29
申请号：US11804894
申请日：2007-05-21
申请人： Makoto Kurita , Koji Uno , Yukio Hiruta , Yoshiaki Morita , Masaru Ueda , Nobukatsu Masuda , Hideyuki Kito
发明人： Makoto Kurita , Koji Uno , Yukio Hiruta , Yoshiaki Morita , Masaru Ueda , Nobukatsu Masuda , Hideyuki Kito
IPC分类号： B60R21/00
CPC分类号： B60N2/015 , B60N2/06 , B60N2/4228 , B60N2/42709 , B60N2/42736
摘要： An impact absorbing plate 31 is disposed between a front part 31z of the impact absorbing plate 31 and a vehicle body 11 so that a rupture generating part 44 ruptured by impact is extended in the front and rear direction of the vehicle, and the impact absorbing plate 31 is fixed to a front part 13a and a rear part 13b of the front seat bracket 13 provided in the vehicle body by rivets 33 and 33. A portion of front part 31z of the impact absorbing plate 31 is cut to form a cutoff part 45, and a front end 17a of a rail 17 provided in a seat section is attached to a convex part 35, which is molded so as to expand upward an inner side of the cutoff part 45, by a rivet 34.
摘要翻译：冲击吸收板31设置在冲击吸收板31的前部31z和车身11之间，使得通过冲击而破裂的破裂产生部44在车辆的前后方向上延伸，并且冲击吸收板31通过铆钉33和33固定在设置在车体中的前座椅支架13的前部13a和后部13b上。冲击吸收板31的前部31z的一部分被切割以形成切割部分45和设置在座部分中的轨道17的前端17a被安装在凸起部分35上，凸部35通过铆钉34模制成向上延伸到切割部分45的内侧。

8. 发明授权

US06709979B2 Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06709979B2
公开(公告)日：2004-03-23
申请号：US09866940
申请日：2001-05-29
申请人： Naoki Komai , Takeshi Nogami , Hideyuki Kito , Mitsuru Taguchi , Katsumi Ando
发明人： Naoki Komai , Takeshi Nogami , Hideyuki Kito , Mitsuru Taguchi , Katsumi Ando
IPC分类号： H01L2144
CPC分类号： H01L21/76873 , C23F1/18 , H01L21/32115 , H01L21/3212 , H01L21/32134 , H01L21/7684 , H01L21/76843 , H05K3/423
摘要： A method of implementing an electrolytic polishing process against a wiring-material film by way of preventing excessive polishing or incomplete polishing caused by presence of differential steps locally generated in the objective wiring-material film. The inventive method comprises a step of forming a wiring-material film for burying recessed portions formed on an insulating film formed on a substrate via a plating process; a step of reducing a local differential step generated on the surface of the wiring-material film by way of preserving the wiring material film on the insulating film; and a final step of removing the wiring-material film deposited on the insulating film by way of preserving such wiring-material film deposited, solely inside of the recessed portions.
摘要翻译：通过防止由于在目标配线材料膜中局部产生的不同步骤的存在而导致的过度抛光或不完全抛光而对布线材料膜实施电解抛光工艺的方法。本发明的方法包括：通过电镀工艺形成用于掩埋形成在基板上的绝缘膜上的凹部的布线材料膜的步骤; 通过在绝缘膜上保持布线材料膜来减少在布线材料膜的表面上产生的局部差分步骤的步骤; 以及通过保存仅在凹部内部沉积的布线材料膜来去除沉积在绝缘膜上的布线材料膜的最后步骤。

9. 发明授权

US06383907B1 Process for fabricating a semiconductor device 有权
标题翻译：制造半导体器件的工艺
公开(公告)号：US06383907B1
公开(公告)日：2002-05-07
申请号：US09655832
申请日：2000-09-06
申请人： Toshiaki Hasegawa , Koichi Ikeda , Hideyuki Kito
发明人： Toshiaki Hasegawa , Koichi Ikeda , Hideyuki Kito
IPC分类号： H01L2144
CPC分类号： H01L21/76835 , H01L21/31144 , H01L21/76811 , H01L21/76813 , H01L21/76825 , H01L21/76826 , H01L21/76829
摘要： A process for producing a semiconductor device comprising an interlayer dielectric containing an organic film, which process comprises the step of forming on the interlayer dielectric a three-layer mask comprising a first mask, a second mask and a third mask in this order from the bottom, in which the first mask, the second mask and the third mask are made of materials different from one another, and the second mask is formed from a film made of a material which protects a film for forming the first mask during formation of the third mask. The process of the present invention is advantageous not only in that the second mask serves as a protecting film for the layers under the first mask during formation of the third mask, so that etching using a resist mask can be conducted during formation of the third mask, and further it becomes possible to perform a regeneration treatment for the resist mask while preventing the layers under the first mask from suffering a damage, but also in that, as a material for the first mask, the same material as that for the resist mask, for example, a carbon-containing material having a low dielectric constant can be used.
摘要翻译：一种制造包含含有有机膜的层间电介质的半导体器件的方法，该方法包括在层间电介质上形成从底部开始依次形成第一掩模，第二掩模和第三掩模的三层掩模的步骤其中第一掩模，第二掩模和第三掩模由彼此不同的材料制成，并且第二掩模由在由形成第三掩模的第三掩模形成期间保护用于形成第一掩模的膜的材料制成的膜形成面具。本发明的方法不仅有利于第二掩模在形成第三掩模期间用作第一掩模下的层的保护膜，使得可以在形成第三掩模期间进行使用抗蚀剂掩模的蚀刻并且进一步地，可以在防止第一掩模下的层遭受损伤的同时进行抗蚀剂掩模的再生处理，而且作为用于第一掩模的材料与用于抗蚀剂掩模的材料相同例如，可以使用具有低介电常数的含碳材料。

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