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    • 2. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07872353B2
    • 2011-01-18
    • US11964336
    • 2007-12-26
    • Sachiyo ItoMasahiko Hasunuma
    • Sachiyo ItoMasahiko Hasunuma
    • H01L23/52
    • H01L23/53295H01L23/5329H01L2924/0002H01L2924/00
    • A semiconductor device including at least two layers of interlayer-insulator-films stacked above a substrate and at least partially formed by a low-relative-dielectric-constant-film having a relative-dielectric-constant of 3.4 or less respectively, a plurality of wirings provided at least one within each of the interlayer-insulator-film and at least partially located within the low-relative-dielectric-constant-films, a plurality of plugs provided at least one within each of the interlayer-insulator-film and connected to a lower part of the wirings, and a plurality of reinforcement members provided at least one within each of the interlayer-insulator-film with being separated from the wirings at a predetermined interval, electrically cut from the wirings and the plugs, and at least partially located within the low-relative-dielectric-constant-films, and wherein, the interlayer-insulator-films, the wirings, the plugs, and the reinforcement members satisfy a predetermined relation for each of the interlayer-insulator-film.
    • 一种半导体器件,包括层叠在衬底上的至少两层层间绝缘膜,并且至少部分由相对介电常数为3.4以下的低相对介电常数膜形成,多个 布线在每个层间绝缘膜内提供至少一个,并且至少部分地位于低相对介电常数膜内;多个插塞,其设置在每个层间绝缘膜内至少一个并连接 连接到布线的下部,以及多个加强构件,其在每个层间绝缘体膜内设置有至少一个预定间隔的布线,从布线和插塞电切割,并且至少 部分位于低相对介电常数膜内,并且其中层间绝缘膜,布线,插塞和加强件满足关于 每个层间绝缘膜。
    • 3. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20080164614A1
    • 2008-07-10
    • US11964336
    • 2007-12-26
    • Sachiyo ItoMasahiko Hasunuma
    • Sachiyo ItoMasahiko Hasunuma
    • H01L23/52
    • H01L23/53295H01L23/5329H01L2924/0002H01L2924/00
    • A semiconductor device including at least two layers of interlayer-insulator-films stacked above a substrate and at least partially formed by a low-relative-dielectric-constant-film having a relative-dielectric-constant of 3.4 or less respectively, a plurality of wirings provided at least one within each of the interlayer-insulator-film and at least partially located within the low-relative-dielectric-constant-films, a plurality of plugs provided at least one within each of the interlayer-insulator-film and connected to a lower part of the wirings, and a plurality of reinforcement members provided at least one within each of the interlayer-insulator-film with being separated from the wirings at a predetermined interval, electrically cut from the wirings and the plugs, and at least partially located within the low-relative-dielectric-constant-films, and wherein, the interlayer-insulator-films, the wirings, the plugs, and the reinforcement members satisfy a predetermined relation for each of the interlayer-insulator-film.
    • 一种半导体器件,包括层叠在衬底上的至少两层层间绝缘膜,并且至少部分由相对介电常数为3.4以下的低相对介电常数膜形成,多个 布线在每个层间绝缘膜内提供至少一个,并且至少部分地位于低相对介电常数膜内;多个插塞,其设置在每个层间绝缘膜内至少一个并连接 连接到布线的下部,以及多个加强构件,其在每个层间绝缘体膜内设置有至少一个在预定间隔内与布线分离的电缆,并从布线和塞子电切割,并且至少 部分位于低相对介电常数膜内,并且其中层间绝缘膜,布线,插塞和加强件满足关于 每个层间绝缘膜。
    • 10. 发明申请
    • Semiconductor device
    • 半导体器件
    • US20050200021A1
    • 2005-09-15
    • US10986071
    • 2004-11-12
    • Sachiyo ItoMasahiko Hasunuma
    • Sachiyo ItoMasahiko Hasunuma
    • H01L21/768H01L21/312H01L21/3205H01L23/52H01L23/522H01L29/10
    • H01L21/76835H01L21/76807H01L23/5226H01L23/53238H01L23/5329H01L23/53295H01L2221/1036H01L2924/0002H01L2924/00
    • A semiconductor device comprising a first insulating layer formed above a semiconductor substrate, and comprising a first insulating material, a second insulating material and a hole, a relative dielectric constant of the first insulating material being 3 or less, a Young's modulus of the first insulating material being 10 GPa or less, a linear expansivity of the first insulating material being greater than 30×10−6° C.−1, and a linear expansivity of the second insulating material being 30×10−6° C.−1 or less, and a second insulating layer formed on the first insulating layer, the second insulating layer having a groove connected to the hole, wherein a linear expansivity α of the first insulating layer within 6 μm from the hole is 30×10−6° C.−1 or less, where α = ∑ i = 1 ⁢ v i ⁢ α i , vi and αi are a volume ratio and a linear expansivity of an i-th insulating material.
    • 一种半导体器件,包括在半导体衬底上形成的第一绝缘层,并且包括第一绝缘材料,第二绝缘材料和孔,第一绝缘材料的相对介电常数为3以下,第一绝缘材料的杨氏模量 材料为10GPa或更小,第一绝缘材料的线性膨胀率大于30×10 -6℃。以及第二绝缘材料的线性膨胀性 以及形成在第一绝缘层上的第二绝缘层,第二绝缘层具有连接到孔的凹槽, 其中所述第一绝缘层在距离所述孔6μm内的线性膨胀系数α为30×10 -6℃以下,其中 alpha = Σ =