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1. 发明授权

US5945704A Trench capacitor with epi buried layer 失效
标题翻译：带Epi埋层的沟槽电容器
公开(公告)号：US5945704A
公开(公告)日：1999-08-31
申请号：US105945
申请日：1998-06-26
申请人： Martin Schrems , Jack Mandelman , Joachim Hoepfner , Herbert Schaefer , Reinhard Stengl
发明人： Martin Schrems , Jack Mandelman , Joachim Hoepfner , Herbert Schaefer , Reinhard Stengl
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L29/94 , H01L31/119 , H01L27/76
CPC分类号： H01L27/10861 , H01L29/945
摘要： A trench capacitor with an epi layer in the lower portion of the trench. The epi layer serves as the buried plate of the trench capacitor. A diffusion region surrounds the lower portion of the trench to enhance the dopant concentration of the epi layer. The diffusion region is formed by, for example, gas phase doping, plasma doping, or plasma immersion ion implantation.
摘要翻译：具有沟槽下部的外延层的沟槽式电容器。外延层用作沟槽电容器的掩埋板。扩散区域围绕沟槽的下部以增强外延层的掺杂剂浓度。扩散区域通过例如气相掺杂，等离子体掺杂或等离子体浸入离子注入形成。

2. 发明授权

US6018174A Bottle-shaped trench capacitor with epi buried layer 失效
标题翻译：瓶形沟槽电容器与epi埋层
公开(公告)号：US6018174A
公开(公告)日：2000-01-25
申请号：US105580
申请日：1998-06-26
申请人： Martin Schrems , Jack Mandelman , Joachim Hoepfner , Herbert Schaefer , Reinhard Stengl
发明人： Martin Schrems , Jack Mandelman , Joachim Hoepfner , Herbert Schaefer , Reinhard Stengl
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L29/94 , H01L29/76
CPC分类号： H01L27/10861 , H01L29/945
摘要： A bottle-shaped trench capacitor having an expanded lower trench portion with an epi layer therein. The epi layer serves as the buried plate of the trench capacitor. A diffusion region surrounds the expanded lower trench portion to enhance the dopant concentration of the epi layer. The diffusion region is formed by, for example, gas phase doping, plasma doping, or plasma immersion ion implantation.
摘要翻译：一种瓶形沟槽电容器，其具有扩展的下沟槽部分，其中具有外延层。外延层用作沟槽电容器的掩埋板。扩散区域围绕扩展的下沟槽部分以增强外延层的掺杂剂浓度。扩散区域通过例如气相掺杂，等离子体掺杂或等离子体浸入离子注入形成。

3. 发明授权

US06465370B1 Low leakage, low capacitance isolation material 失效
标题翻译：低泄漏，低电容隔离材料
公开(公告)号：US06465370B1
公开(公告)日：2002-10-15
申请号：US09105633
申请日：1998-06-26
申请人： Martin Schrems , Rolf-Peter Vollertsen , Joachim Hoepfner
发明人： Martin Schrems , Rolf-Peter Vollertsen , Joachim Hoepfner
IPC分类号： H01L21469
CPC分类号： H01L27/10861 , H01L21/3003 , H01L29/66181 , H01L2924/0002 , Y10S438/918 , H01L2924/00
摘要： A method for reducing a capacitance formed on a silicon substrate includes the step of introducing hydrogen atoms into a portion of said surface to increase the dielectric constant of such portion of the surface increasing the effective thickness of the dielectric material and hence reducing said capacitance. The method includes the step of forming the silicon dioxide layer with a thickness greater than two nanometers. The step of introducing hydrogen includes forming hydrogen atoms in the surface with concentrations of 1017 atoms per cubic centimeter, or greater. In one embodiment the hydrogen atoms are introduced by baking in hydrogen at a temperature of 950° C. to 1100° C. and pressure greater than 100 Torr. A trench capacitor DRAM cell is provided wherein the hydrogen provides a passivation layer to increase the effective capacitance around a collar region and thereby reduce unwanted transistor action.
摘要翻译：减少形成在硅衬底上的电容的方法包括将氢原子引入所述表面的一部分以增加表面部分的介电常数增加介电材料的有效厚度从而减小所述电容的步骤。该方法包括形成厚度大于2纳米的二氧化硅层的步骤。引入氢的步骤包括在表面上形成浓度为1017原子/立方厘米或更大的氢原子。在一个实施方案中，氢原子通过在氢气中在950℃至1100℃的温度和大于100托的压力下进行烘烤而引入。提供了一种沟槽电容器DRAM单元，其中氢提供钝化层以增加环绕区域周围的有效电容，从而减少不需要的晶体管作用。

4. 发明授权

US06329703B1 Contact between a monocrystalline silicon region and a polycrystalline silicon structure and method for producing such a contact 失效
标题翻译：单晶硅区域和多晶硅结构之间的接触以及用于制造这种接触的方法
公开(公告)号：US06329703B1
公开(公告)日：2001-12-11
申请号：US09030227
申请日：1998-02-25
申请人： Martin Schrems , Kai Wurster , Klaus-Dieter Morhard , Joachim Hoepfner
发明人： Martin Schrems , Kai Wurster , Klaus-Dieter Morhard , Joachim Hoepfner
IPC分类号： H01L2980
CPC分类号： H01L27/10867 , H01L21/76895
摘要： A contact between a polycrystalline silicon structure and a monocrystalline silicon region is produced by doping the silicon structure in amorphous or polycrystalline form and/or doping the monocrystalline silicon region with a dopant, in particular with oxygen, in such a concentration that a solubility limit is exceeded. In a subsequent heat treatment, dopant precipitations are formed which either control grain growth in the polycrystalline silicon layer or prevent a propagation of crystal faults into a substrate in the monocrystalline silicon region. Such a contact can be used, in particular, as a buried strap in a DRAM trench cell.
摘要翻译：多晶硅结构和单晶硅区域之间的接触是通过以非晶态或多晶形式掺杂硅结构和/或用掺杂剂（特别是氧）掺杂单晶硅区域来产生的，其浓度使得溶解度极限为超过了在随后的热处理中，形成掺杂剂沉淀，其控制多晶硅层中的晶粒生长或者防止晶体缺陷传播到单晶硅区域中的衬底中。特别地，这种接触可以用作DRAM沟槽单元中的埋入带。

5. 发明授权

US6068928A Method for producing a polycrystalline silicon structure and polycrystalline silicon layer to be produced by the method 失效
标题翻译：通过该方法制造多晶硅结构体和多晶硅层的方法
公开(公告)号：US6068928A
公开(公告)日：2000-05-30
申请号：US30406
申请日：1998-02-25
申请人： Martin Schrems , Kai Wurster , Klaus-Dieter Morhard , Joachim Hoepfner
发明人： Martin Schrems , Kai Wurster , Klaus-Dieter Morhard , Joachim Hoepfner
IPC分类号： H01L21/768 , H01L21/20 , H01L21/265 , H01L21/28 , H01L21/285 , B32B9/04 , H01L21/36 , H01L21/425
CPC分类号： H01L21/28525 , Y10T428/12528
摘要： A method for producing a polycrystalline silicon structure and a polycrystalline silicon layer to be produced by the method of first forming a primary silicon structure in an amorphous or polycrystalline form, and doping the structure with a dopant, in particular with oxygen, in a concentration exceeding the solubility limit. In a subsequent heat treatment, dopant precipitations are formed which control grain growth in a secondary structure being produced. Such a contact polycrystalline silicon structure can be used, in particular, as a connection of a monocrystalline silicon region.
摘要翻译：一种多晶硅结构体和多晶硅层的制造方法，其特征在于，通过首先以非晶态或多晶形式形成所述一次硅结构的方法制造多晶硅结构体，以及特别是用氧掺杂所述结构，其浓度超过溶解度极限。在随后的热处理中，形成控制正在生产的二级结构中的晶粒生长的掺杂剂沉淀。特别地，这种接触多晶硅结构可以用作单晶硅区域的连接。

6. 发明授权

US08338898B2 Micro electro mechanical system (MEMS) microphone having a thin-film construction 有权
标题翻译：具有薄膜结构的微机电系统（MEMS）麦克风
公开(公告)号：US08338898B2
公开(公告)日：2012-12-25
申请号：US11792515
申请日：2005-10-12
申请人： Franz Schrank , Martin Schrems
发明人： Franz Schrank , Martin Schrems
IPC分类号： H01L29/82
CPC分类号： H04R19/04 , H04R7/10 , H04R19/005 , H04R2307/207
摘要： An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.
摘要翻译： MEMS麦克风被结合到包含至少一个集成电路的IC组件的表面上，所述集成电路适于调节和处理由MEMS麦克风提供的电信号。整个组件生产简单，结构紧凑，节省空间。生产以简单可靠的方式完成。

7. 发明授权

US06989311B2 Method for fabricating a trench contact to a deep trench capacitor having a polysilicon filling 失效
公开(公告)号：US06989311B2
公开(公告)日：2006-01-24
申请号：US10147544
申请日：2002-05-16
申请人： Martin Schrems , Dietmar Temmler , Andreas Wich-Glasen
发明人： Martin Schrems , Dietmar Temmler , Andreas Wich-Glasen
IPC分类号： H01L21/20
CPC分类号： H01L27/10867 , H01L21/76897
摘要： The instant invention is a method for fabricating a trench contact to a deep trench capacitor with a polysilicon filling in a trench hole formed in a silicon substrate. An epitaxy process is performed to selectively grow silicon above the polysilicon filling in the trench hole. An opening leading to the polysilicon filling is anisotropically etched into the epitaxially grown silicon. The opening has lateral dimensions that are smaller than those of the polysilicon filling, and the opening is filled with polysilicon.

8. 发明授权

US06828191B1 Trench capacitor with an insulation collar and method for producing a trench capacitor 失效
标题翻译：具有绝缘环的沟槽电容器和用于制造沟槽电容器的方法
公开(公告)号：US06828191B1
公开(公告)日：2004-12-07
申请号：US09363277
申请日：1999-07-28
申请人： Kai Wurster , Martin Schrems , Jürgen Faul , Klaus-Dieter Morhard , Alexandra Lamprecht , Odile Dequiedt
发明人： Kai Wurster , Martin Schrems , Jürgen Faul , Klaus-Dieter Morhard , Alexandra Lamprecht , Odile Dequiedt
IPC分类号： H01L218242
CPC分类号： H01L27/10861 , H01L27/10829
摘要： A trench capacitor, in particular for use in a semiconductor memory cell, has a trench formed in a substrate; an insulation collar formed in an upper region of the trench; an optional buried plate in the substrate region serving as a first capacitor plate; a dielectric layer lining the lower region of the trench and the insulation collar as a capacitor dielectric; a conductive second filling material filled into the trench as a second capacitor plate; and a buried contact underneath the surface of the substrate. The substrate has, underneath its surface in the region of the buried contact, a doped region introduced by implantation, plasma doping and/or vapor phase deposition. A tunnel layer, in particular an oxide, nitride or oxinitride layer, is preferably formed at the interface of the buried contact. A method for producing a trench capacitor is also provided.
摘要翻译：特别是在半导体存储单元中使用的沟槽电容器具有形成在衬底中的沟槽; 形成在所述沟槽的上部区域中的绝缘套环; 在作为第一电容器板的基板区域中的可选掩埋板; 衬在沟槽的下部区域的绝缘层和作为电容器电介质的绝缘套管; 作为第二电容器板填充到所述沟槽中的导电的第二填充材料; 以及在衬底的表面下方的埋入接触。衬底在其掩埋接触区域的表面下方具有通过注入，等离子体掺杂和/或气相沉积引入的掺杂区域。隧道层，特别是氧化物，氮化物或氮氧化物层优选形成在埋入触点的界面处。还提供了一种制造沟槽电容器的方法。

9. 发明授权

US06664167B2 Memory with trench capacitor and selection transistor and method for fabricating it 失效
公开(公告)号：US06664167B2
公开(公告)日：2003-12-16
申请号：US10085940
申请日：2002-02-28
申请人： Dietmar Temmler , Herbert Benzinger , Wolfram Karcher , Catharina Pusch , Martin Schrems , Jürgen Faul
发明人： Dietmar Temmler , Herbert Benzinger , Wolfram Karcher , Catharina Pusch , Martin Schrems , Jürgen Faul
IPC分类号： H01L2120
CPC分类号： H01L27/10861 , H01L27/10832
摘要： A memory having a memory cell formed in a substrate and including a trench capacitor and a transistor and a method for producing the memory includes connecting the trench capacitor to the transistor with a self-aligned connection. The transistor at least partly covers the trench capacitor. The trench capacitor is filled with a conductive trench filling and an insulating covering layer is situated on the conductive trench filling. An epitaxial layer is situated above the insulating covering layer. The transistor is formed in the epitaxial layer. The self-aligned connection is formed in a contact trench and includes an insulation collar in which a conductive material is introduced. A conductive cap is formed on the conductive material.

10. 发明授权

US06265741B1 Trench capacitor with epi buried layer 失效
标题翻译：带Epi埋层的沟槽电容器
公开(公告)号：US06265741B1
公开(公告)日：2001-07-24
申请号：US09056119
申请日：1998-04-06
申请人： Martin Schrems
发明人： Martin Schrems
IPC分类号： H01L27108
CPC分类号： H01L27/10861 , H01L29/945
摘要： A trench capacitor with an epitaxial layer in the lower portion of the trench. The epitaxial layer may be doped to serve as a buried plate.
摘要翻译：沟槽电容器，其在沟槽的下部具有外延层。外延层可以被掺杂以用作掩埋板。

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