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1. 发明授权

US5907684A Independent channel coupled to be shared by multiple physical processing nodes with each node characterized as having its own memory, CPU and operating system image 失效
标题翻译：独立通道被耦合以由多个物理处理节点共享，每个节点被表征为具有其自己的存储器，CPU和操作系统映像
公开(公告)号：US5907684A
公开(公告)日：1999-05-25
申请号：US652177
申请日：1996-05-23
申请人： Marten Jan Halma , Martin William Sachs
发明人： Marten Jan Halma , Martin William Sachs
IPC分类号： G06F13/40 , G06F13/00
CPC分类号： G06F13/4022 , G06F13/405
摘要： A computer system and processing method are provided for coupling multiple physical processing nodes together, wherein each physical processing node is characterized as having its own memory, by either at least one channel which is independent of and coupled to the multiple physical processing nodes or by at least one input/output (I/O) processor, again which is independent of and coupled to the multiple physical processing nodes. The at least one channel and/or the at least one I/O processor couple the multiple physical processing nodes to at least one shared input/output device. Sharing of the at least one channel and/or at least one I/O processor is practical by providing "indirect logical addressing" using logical address tables within the channel subsystem. The logical address tables associate an image identifier (Image.sub.-- ID) and processing node identifier (PN.sub.-- ID) concatenation with an indexed logical address for use in communicating I/O operation parameters across the at least one channel.
摘要翻译：提供了一种用于将多个物理处理节点耦合在一起的计算机系统和处理方法，其中每个物理处理节点的特征在于具有其自己的存储器，该至少一个信道与多个物理处理节点无关并且耦合到多个物理处理节点至少一个输入/输出（I / O）处理器，其又独立于并耦合到多个物理处理节点。至少一个通道和/或至少一个I / O处理器将多个物理处理节点耦合到至少一个共享输入/输出设备。通过使用信道子系统内的逻辑地址表提供“间接逻辑寻址”来实现至少一个信道和/或至少一个I / O处理器的共享。逻辑地址表将图像标识符（Image-ID）和处理节点标识符（PN-ID）级联与索引的逻辑地址相关联，用于跨所述至少一个信道传达I / O操作参数。

2. 发明授权

US5652914A Method and system for superimposing, creating and altering I/O applications and controls within an I/O subsystem by using an I/O subchannel intercept field 失效
标题翻译：通过使用I / O子通道拦截字段来叠加，创建和更改I / O子系统中I / O应用程序和控件的方法和系统
公开(公告)号：US5652914A
公开(公告)日：1997-07-29
申请号：US489396
申请日：1995-06-12
申请人： Wolfgang Eckert , Marten Jan Halma , Juergen Erwin Maergner , John Scott Trotter
发明人： Wolfgang Eckert , Marten Jan Halma , Juergen Erwin Maergner , John Scott Trotter
IPC分类号： G06F13/12 , G06F13/00
CPC分类号： G06F13/126
摘要： An Internal I/O Facility (iIOF) having a general interface for executing I/O related applications in an Input/Ouput SubSystem (IOSS) of a computer system. IIOF applications are executed in the IOSS outside the scope of CPU applications executed under the operating system (OS) of the computer system. IIOF applications are allowed to use all facilities in the IOSS. An iIOF subchannel extension is provided for those subchannels which can execute an iIOF application. IIOF subchannel extensions contain interception control fields which determine if conventional processing for the subchannel by the IOSS is to be intercepted to execute an iIOF application. A front-end interception bit in a subchannel extension is used to initiate iIOF application execution when the subchannel is taken from the IOSS work request queue. A back-end interception bit in a subchannel extension is used to initiate iIOF application execution when the subchannel is to have status put on the IOSS interruption queue. The iIOF application is defined in a field in the iIOF subchannel extension. The IOSS may front-end intercept I/O requests made by the OS, and the IOSS may back-end intercept status received by the IOSS for I/O interruptions to be generated by the IOSS.
摘要翻译：具有用于在计算机系统的输入/输出子系统（IOSS）中执行I / O相关应用的通用接口的内部I / O设施（iIOF）。 IIOF应用程序在除计算机系统的操作系统（OS）下执行的CPU应用程序范围之外的IOSS中执行。允许IIOF应用程序使用IOSS中的所有设施。为可以执行iIOF应用程序的子通道提供iIOF子通道扩展。 IIOF子信道扩展包含截取控制字段，其确定是否要拦截IOSS对子信道的常规处理以执行iIOF应用。当子通道从IOSS工作请求队列中取出时，子通道扩展中的前端拦截位用于启动iIOF应用程序执行。当子信道要在IOSS中断队列上放置状态时，子信道扩展中的后端截取位用于启动iIOF应用程序执行。 iIOF应用程序在iIOF子通道扩展的字段中定义。 IOSS可能会由操作系统进行前端截取的I / O请求，IOSS可能会由IOSS接收到的IOSS接收到的I / O中断的后端截取状态，由IOSS生成。

3. 发明授权

US06192482B1 Self-timed parallel data bus interface to direct storage devices 失效
标题翻译：自定时并行数据总线接口直接存储设备
公开(公告)号：US06192482B1
公开(公告)日：2001-02-20
申请号：US08261523
申请日：1994-06-17
申请人： Daniel Francis Casper , James Thomas Brady , Robert Stanley Capowski , Frederick John Cox , Frank David Ferraiolo , Marten Jan Halma , Benjamin Hong Wu
发明人： Daniel Francis Casper , James Thomas Brady , Robert Stanley Capowski , Frederick John Cox , Frank David Ferraiolo , Marten Jan Halma , Benjamin Hong Wu
IPC分类号： G06F104
CPC分类号： G06F13/426
摘要： An attached storage media link has a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal, providing a high speed, cost effective interface to a direct access storage device.
摘要翻译：连接的存储介质链路具有自定义接口（STI），其中时钟信号将位串行数据时钟并入并行导电总线，并且时钟信号在总线的单独线路上传输。总线上每条线上的接收数据与时钟信号单独相位对齐，为直接存取存储设备提供高速，经济有效的接口。

4. 发明授权

US5671441A Method and apparatus for automatic generation of I/O configuration descriptions 失效
标题翻译：自动生成I / O配置说明的方法和设备
公开(公告)号：US5671441A
公开(公告)日：1997-09-23
申请号：US346642
申请日：1994-11-29
申请人： Steven Gardner Glassen , Marten Jan Halma , Eugene Paul Hefferon , Francis Edward Johnson
发明人： Steven Gardner Glassen , Marten Jan Halma , Eugene Paul Hefferon , Francis Edward Johnson
IPC分类号： G06F9/445 , H01J3/00
CPC分类号： G06F9/4411
摘要： Automatic machine methods and apparatus for determining which components of an I/O configuration are shared by other components of the configuration. The information can be obtained through the use of existing self-description facilities and unique identifiers. By noting which channel paths are used to obtain configuration-data records and examining the unique identifiers provided for each I/O items it can be determined which I/O devices are accessible through the same control unit, and which control units provide access to the same I/O device. Furthermore, by examining the unique identifiers provided, it can be determined which I/O subsystems and which control units or channel subsystems are accessible through the same dynamic switch and which dynamic switches provide access to the same I/O subsystem of channel subsystem. A programmable subchannel is provided to enable communication between a CEC and an electrically-connected I/O item not represented in the current I/O configuration description being used by the CEC. Without the programmed subchannel, the CEC cannot access any I/O item not represented in the CEC's current I/O configuration description.
摘要翻译：用于确定I / O配置的哪些组件由配置的其他组件共享的自动机器方法和装置。可以通过使用现有的自我描述设施和唯一标识符获得信息。通过注意哪些信道路径用于获取配置数据记录并检查为每个I / O项目提供的唯一标识符，可以确定哪些I / O设备可通过相同的控制单元访问，哪些控制单元提供对相同的I / O设备。此外，通过检查提供的唯一标识符，可以确定哪些I / O子系统以及哪些控制单元或信道子系统可通过相同的动态交换机访问，哪些动态交换机提供对信道子系统的相同I / O子系统的访问。提供可编程子信道以实现CEC与由CEC使用的当前I / O配置描述中未表示的电连接的I / O项目之间的通信。没有编程的子通道，CEC不能访问CEC当前I / O配置描述中未表示的任何I / O项。

5. 发明授权

US5694612A Self-timed interface for a network of computer processors interconnected in parallel 失效
标题翻译：并行连接的计算机处理器网络的自定时接口
公开(公告)号：US5694612A
公开(公告)日：1997-12-02
申请号：US669669
申请日：1996-06-24
申请人： Derrick Leroy Garmire , Robert Stanley Capowski , Daniel Francis Casper , Christine Marie Desnoyers , Frank David Ferraiolo , Marten Jan Halma , Robert Frederick Stucke
发明人： Derrick Leroy Garmire , Robert Stanley Capowski , Daniel Francis Casper , Christine Marie Desnoyers , Frank David Ferraiolo , Marten Jan Halma , Robert Frederick Stucke
IPC分类号： G06F13/00 , G06F13/42 , G06F15/17 , G06F15/173
CPC分类号： G06F15/17375 , G06F13/4256 , G06F15/17
摘要： A massively parallel system has a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal. Digital data is transmitted at high speeds via the parallel bus to provide a scalable communications network for parallel processing systems while eliminating precise bus length and system clock rates as a critical or limiting factor.
摘要翻译：大规模并行系统具有自定时接口（STI），其中时钟信号将位串行数据时钟并入并行导电总线，时钟信号在总线的单独线路上传输。总线上每条线上的接收数据与时钟信号单独相位对准。数字数据通过并行总线以高速传输，为并行处理系统提供可扩展的通信网络，同时消除了精确的总线长度和系统时钟速率作为关键或限制因素。

6. 发明授权

US06185693B2 Synchronous interface for transmitting data in a system of massively parallel processors 失效
标题翻译：用于在大规模并行处理器系统中传输数据的同步接口
公开(公告)号：US06185693B2
公开(公告)日：2001-02-06
申请号：US08669667
申请日：1996-06-24
申请人： Derrick Leroy Garmire , Robert Stanley Capowski , Daniel Francis Casper , Christine Marie Desnoyers , Frank David Ferraiolo , Marten Jan Halma , Robert Frederick Stucke
发明人： Derrick Leroy Garmire , Robert Stanley Capowski , Daniel Francis Casper , Christine Marie Desnoyers , Frank David Ferraiolo , Marten Jan Halma , Robert Frederick Stucke
IPC分类号： G06F104
CPC分类号： G06F15/17375 , G06F13/4256 , G06F15/17
摘要： A massively parallel system has a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal. Digital data is transmitted at high speeds via the parallel bus to provide a scalable communications network for parallel processing systems while eliminating precise bus length and system clock rates as a critical or limiting factor.
摘要翻译：大规模并行系统具有自定时接口（STI），其中时钟信号将位串行数据时钟并入并行导电总线，时钟信号在总线的单独线路上传输。总线上每条线上的接收数据与时钟信号单独相位对准。数字数据通过并行总线以高速传输，为并行处理系统提供可扩展的通信网络，同时消除了精确的总线长度和系统时钟速率作为关键或限制因素。

7. 发明授权

US5664219A Method and system for controlling servicability of adapters connected by an I/O channel interface to a computer system 失效
标题翻译：用于控制通过I / O通道接口连接到计算机系统的适配器的可维护性的方法和系统
公开(公告)号：US5664219A
公开(公告)日：1997-09-02
申请号：US489421
申请日：1995-06-12
申请人： Steven Gardner Glassen , Marten Jan Halma , John Scott Trotter
发明人： Steven Gardner Glassen , Marten Jan Halma , John Scott Trotter
IPC分类号： G06F9/24 , G06F11/273 , G06F11/30 , G06F3/00
CPC分类号： G06F11/2294 , G06F11/0745 , G06F11/0748 , G06F11/3041 , G06F11/3093 , G06F9/24
摘要： A method and system to eliminate service hardware previously provided with an adapter by providing a novel way to transfer its hardware service functions to a remote service hardware found elsewhere in a computer system, such as a mainframe. The transferred service controls include enabling the remote service hardware to control the updating of the adapter microcode; remotely control a recovery process for the adapter by remotely initializing its microcode, and remotely logging out and recovering from error conditions detected in the adapter; and remotely forcing a logout and recovery when the host OS detects a failure in the adapter. A standard I/O channel interface (optical or electronic) is provided between the adapter and an IOSS (Input Output Subsystem) of a computer system which has its own service processor element (SPE) used for servicing the computer system per se. The invention provides virtual service hardware for the adapter, but uses the SPE for its service hardware. The SPE is remote from the adapter in the sense that the SPE and the adapter can only communicate with each other over the standard I/O channel interface. The servicing functions required by the adapter are transferred to, and handled by, the SPE by internal I/O facilities (iIOF) provided in the IOSS, which change the internal subchannel architecture of the IOSS.
摘要翻译：一种通过提供将其硬件服务功能传送到诸如大型机等计算机系统中的别处找到的远程服务硬件的新颖方式来消除先前提供有适配器的服务硬件的方法和系统。转移的服务控制包括使远程服务硬件能够控制适配器微代码的更新; 通过远程初始化其微代码远程控制适配器的恢复过程，并远程注销并从适配器中检测到的错误状况恢复; 并在主机操作系统检测到适配器出现故障时远程强制执行注销和恢复。适配器和计算机系统的IOSS（输入输出子系统）之间提供标准I / O通道接口（光学或电子），其具有用于维护计算机系统本身的其自己的服务处理器元件（SPE）。本发明为适配器提供虚拟服务硬件，但是使用SPE作为其服务硬件。在SPE和适配器只能通过标准I / O通道接口相互通信的情况下，SPE远离适配器。适配器所需的维修功能由IOSS中提供的内部I / O设备（iIOF）传输到SPE并由SPE处理，从而改变了IOSS的内部子通道架构。

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