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    • 8. 发明申请
    • Memory mapped I/O bus selection
    • 内存映射I / O总线选择
    • US20060195640A1
    • 2006-08-31
    • US11405632
    • 2006-04-18
    • Rocco Brescia
    • Rocco Brescia
    • G06F13/36
    • G06F13/404G06F13/4031
    • A mechanism and method for redefining an application specific integrated circuit's I/O bus structure in real-time. The mechanism includes an address map block, a state machine block, and a bus arbitration block. At initialization, the address map is configured to divide the address space into regions and type of bus structure. When an I/O access is requested by a client (e.g., CPU, DMA controller, etc.), the request is mapped into a region and type of bus structure by the address map block. The region and type of bus structure is used by the state machine. The state machine determines the syntax and protocol for the region and type of bus. The state machine signals the bus arbitration block to grant I/O bus ownership when it is available. Once ownership is granted, I/O bus pins are defined and access is granted.
    • 一种实时重新定义专用集成电路I / O总线结构的机制与方法。 该机制包括地址映射块,状态机块和总线仲裁块。 在初始化时,地址映射被配置为将地址空间划分为总线结构的区域和类型。 当客户端(例如,CPU,DMA控制器等)请求I / O访问时,地址映射块将该请求映射到总线结构的区域和类型中。 总线结构的区域和类型由状态机使用。 状态机确定区域的语法和协议以及总线类型。 状态机向总线仲裁块发出信号,以便在可用时授予I / O总线所有权。 一旦获得所有权,就定义了I / O总线引脚,并授予访问权限。