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1. 发明授权

US4972246A Effective narrow band gap base transistor 失效
标题翻译：有效的窄带隙基极晶体管
公开(公告)号：US4972246A
公开(公告)日：1990-11-20
申请号：US171603
申请日：1988-03-22
申请人： Marc H. Brodsky , Frank F. Fang , Bernard S. Meyerson
发明人： Marc H. Brodsky , Frank F. Fang , Bernard S. Meyerson
IPC分类号： H01L29/73 , H01L21/331 , H01L29/10 , H01L29/15 , H01L29/161 , H01L29/201 , H01L29/737
CPC分类号： H01L29/157 , H01L29/1004
摘要： A homojunction bipolar transistor having a superlattice base region comprising alternate layers of extrinsic and intrinsic layers, with extrinsic layers being of the opposite conductivity of the emitter and collector layers of the transistor. The alternate extrinsic and intrinsic layers have substantially different doping levels providing abrupt transitions in the valence and conduction bands between layers. The abrupt transitions result in the energy band gap in the base region being effectively reduced with respect to the band gap in the emitter region. In one embodiment, the effective narrow band gap base transistor is implemented by converting a portion of the upper layers of the superlattice to a homogeneous region by heavily doping the portion to form the emitter of the transistor.

2. 发明授权

US4757361A Amorphous thin film transistor device 失效
标题翻译：非晶薄膜晶体管器件
公开(公告)号：US4757361A
公开(公告)日：1988-07-12
申请号：US889137
申请日：1986-07-23
申请人： Marc H. Brodsky , Frank F. Fang
发明人： Marc H. Brodsky , Frank F. Fang
IPC分类号： H01L27/12 , H01L23/482 , H01L29/78 , H01L29/786 , H01L29/04
CPC分类号： H01L29/78642 , H01L23/4825 , H01L2924/0002
摘要： A thin film transistor technology where a gate member on a substrate surface is in electric field influenceable proximity to active semiconductor devices in the direction normal to the substrate surface and the ohmic electrodes of the active device are parallel with the substrate surface. The gate is formed on the substrate and conformal coatings of insulator and semiconductor are provided over it. A metal is deposited from the direction normal to the surface that is thicker in the horizontal dimension than the vertical so as to be susceptible to an erosion operation such as a dip etch which separates the metal into self-aligned contact areas on each side of a semiconductor device channel without additional masking. Self-alignment of the source, drain and gate can be achieved by insulator additions above and under the gate fabricated without additional masking.
摘要翻译：一种薄膜晶体管技术，其中衬底表面上的栅极部件在垂直于衬底表面的方向上有源半导体器件的有源电极中的电场和有源器件的欧姆电极的电场平行于衬底表面。栅极形成在基板上，并在其上提供绝缘体和半导体的保形涂层。金属从垂直于表面的方向沉积在水平尺寸上比垂直方向更厚，以便易于受到诸如浸渍蚀刻的侵蚀操作的影响，该浸渍蚀刻将金属分成金属的每一侧上的自对准接触区域半导体器件通道无需额外掩蔽。源极，漏极和栅极的自对准可以通过在没有附加掩模的情况下制造的栅极上方和下方的绝缘体添加来实现。

3. 发明授权

US4363828A Method for depositing silicon films and related materials by a glow discharge in a disiland or higher order silane gas 失效
标题翻译：通过辉光放电在不均匀或高级硅烷气体中沉积硅膜和相关材料的方法
公开(公告)号：US4363828A
公开(公告)日：1982-12-14
申请号：US102814
申请日：1979-12-12
申请人： Marc H. Brodsky , Bruce A. Scott
发明人： Marc H. Brodsky , Bruce A. Scott
IPC分类号： H01L31/04 , C23C16/06 , C23C16/24 , C23C16/32 , C23C16/34 , C23C16/40 , H01L21/205 , H01L21/314 , H01L21/316 , H01L21/318 , C23C11/00
CPC分类号： H01L21/02164 , C23C16/06 , C23C16/24 , C23C16/32 , C23C16/34 , C23C16/402 , H01L21/02112 , H01L21/02167 , H01L21/02211 , H01L21/02274 , H01L21/0242 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/314 , H01L21/31612 , H01L21/3185
摘要： Disilane (Si.sub.2 H.sub.6), trisilane (Si.sub.3 H.sub.8) or a higher order silane is applied in a glow discharge process to rapidly and efficiently form a film of hydrogenated amorphous silicon on a substrate. An inductively coupled RF glow discharge apparatus, a capacitively coupled glow discharge apparatus or a DC glow discharge apparatus may be employed to deposit the amorphous silicon on a conducting or non-conducting substrate. The disilane or higher order silanes may also be combined in a glow discharge process with gases which contain elements such as nitrogen or oxygen to rapidly deposit corresponding compound films.
摘要翻译：在辉光放电过程中施加二硅烷（Si 2 H 6），丙硅烷（Si 3 H 8）或高级硅烷，以快速且有效地在衬底上形成氢化非晶硅的膜。可以使用电感耦合RF辉光放电装置，电容耦合的辉光放电装置或DC辉光放电装置，以将非晶硅沉积在导电或非导电衬底上。乙硅烷或高级硅烷也可以在辉光放电过程中与含有诸如氮或氧的元素的气体组合以快速沉积相应的化合物膜。

4. 发明授权

US4566913A Rapid thermal annealing of silicon dioxide for reduced electron trapping 失效
标题翻译：快速热退火二氧化硅减少电子捕获
公开(公告)号：US4566913A
公开(公告)日：1986-01-28
申请号：US636042
申请日：1984-07-30
申请人： Marc H. Brodsky , Zeev A. Weinberg
发明人： Marc H. Brodsky , Zeev A. Weinberg
IPC分类号： H01L21/324 , H01L21/3105 , H01L21/316 , H01L21/263
CPC分类号： H01L21/3105 , Y10S148/004 , Y10S148/118 , Y10S438/91
摘要： Silicon dioxide insulating films for integrated circuits are provided with enhanced electronic properties, including decreased water content and reduced trapping of electrons, by exposing a metal oxide semiconductor wafer including an exposed silicon dioxide layer, in an ambient of flowing inert gas, to heating radiation from a halogen lamp for a duration on the order of ten seconds to achieve annealing temperature in the range 600C.-800C.
摘要翻译：用于集成电路的二氧化硅绝缘膜具有增强的电子特性，包括降低含水量和减少电子俘获，通过在惰性气体环境中暴露包含暴露的二氧化硅层的金属氧化物半导体晶片，将其暴露于来自卤素灯持续10秒的时间以实现在600℃-800℃范围内的退火温度。

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