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1. 发明申请

US20060048113A1 Data flow graph processing method and processing apparatus provided with reconfigurable circuit 有权
标题翻译：数据流图处理方法和处理装置配有可重构电路
公开(公告)号：US20060048113A1
公开(公告)日：2006-03-02
申请号：US11212598
申请日：2005-08-29
申请人： Makoto Ozone , Hiroshi Nakajima , Tatsuo Hiramatsu , Katsunori Hirase , Makoto Okada
发明人： Makoto Ozone , Hiroshi Nakajima , Tatsuo Hiramatsu , Katsunori Hirase , Makoto Okada
IPC分类号： G06F9/45
CPC分类号： G06F8/433
摘要： A data flow graph processing method divides a program describing target operations into two or more subprograms and converts each of the two or more subprograms into a data flow graph (DFG) representing dependency in execution between operations carried out in sequence. Also generated is flow data indicating the order of execution of DFGs corresponding to respective subprograms. DFGs are converted into configuration data and the flow data is converted into control data.
摘要翻译：数据流图处理方法将描述目标操作的程序划分为两个或更多个子程序，并将两个或多个子程序中的每一个子程序转换为表示在顺序执行的操作之间的执行中依赖性的数据流图（DFG）。还产生指示对应于各个子程序的DFG的执行顺序的流量数据。 DFG被转换成配置数据，流数据被转换成控制数据。

2. 发明授权

US07941794B2 Data flow graph processing method and processing apparatus provided with reconfigurable circuit 有权
标题翻译：数据流图处理方法和处理装置配有可重构电路
公开(公告)号：US07941794B2
公开(公告)日：2011-05-10
申请号：US11212598
申请日：2005-08-29
申请人： Makoto Ozone , Hiroshi Nakajima , Tatsuo Hiramatsu , Katsunori Hirase , Makoto Okada
发明人： Makoto Ozone , Hiroshi Nakajima , Tatsuo Hiramatsu , Katsunori Hirase , Makoto Okada
IPC分类号： G06F9/45 , G06F15/00
CPC分类号： G06F8/433
摘要： A data flow graph processing method divides a program describing target operations into two or more subprograms and converts each of the two or more subprograms into a data flow graph (DFG) representing dependency in execution between operations carried out in sequence. Also generated is flow data indicating the order of execution of DFGs corresponding to respective subprograms. DFGs are converted into configuration data and the flow data is converted into control data.
摘要翻译：数据流图处理方法将描述目标操作的程序划分为两个或更多个子程序，并将两个或多个子程序中的每一个子程序转换为表示在顺序执行的操作之间的执行中依赖性的数据流图（DFG）。还产生指示对应于各个子程序的DFG的执行顺序的流量数据。 DFG被转换成配置数据，流数据被转换成控制数据。

3. 发明授权

US07953956B2 Reconfigurable circuit with a limitation on connection and method of determining functions of logic circuits in the reconfigurable circuit 失效
标题翻译：具有限制连接的可重构电路和确定可重构电路中逻辑电路功能的方法
公开(公告)号：US07953956B2
公开(公告)日：2011-05-31
申请号：US11016904
申请日：2004-12-21
申请人： Makoto Okada , Tatsuo Hiramatsu , Hiroshi Nakajima , Makoto Ozone
发明人： Makoto Okada , Tatsuo Hiramatsu , Hiroshi Nakajima , Makoto Ozone
IPC分类号： G06F15/76
CPC分类号： G06F15/7867 , H03K19/17728 , H03K19/17736 , H03K19/17748 , H03K19/1778 , Y02D10/12 , Y02D10/13
摘要： A reconfigurable circuit of reduced circuit scale. The reconfigurable circuit of the present invention comprises a plurality of ALUs capable of changing functions. The plurality of ALUs are arranged in a matrix. At least one connection unit capable of establishing connection between the ALUs selectively is provided between the stages of the ALUs. This connection unit is not intended to allow connection between all the logic circuits in adjoining stages, but is configured so that the logic circuits are each connectable with only some of the logic circuits pertaining to the other stages. The connection limitation allows a reduction in circuit scale.
摘要翻译：降低电路规模的可重构电路。本发明的可重构电路包括能够改变功能的多个ALU。多个ALU被布置成矩阵。在ALU的各级之间提供能够选择性地建立ALU之间的连接的至少一个连接单元。该连接单元不旨在允许在相邻级中的所有逻辑电路之间的连接，而是被配置为使得逻辑电路可以仅与属于其它级的一些逻辑电路连接。连接限制允许减小电路规模。

4. 发明申请

US20050134308A1 Reconfigurable circuit, processor having reconfigurable circuit, method of determining functions of logic circuits in reconfigurable circuit, method of generating circuit, and circuit 失效
标题翻译：可重构电路，具有可重构电路的处理器，可重构电路中逻辑电路的功能确定方法，发电电路方法及电路
公开(公告)号：US20050134308A1
公开(公告)日：2005-06-23
申请号：US11016904
申请日：2004-12-21
申请人： Makoto Okada , Tatsuo Hiramatsu , Hiroshi Nakajima , Makoto Ozone
发明人： Makoto Okada , Tatsuo Hiramatsu , Hiroshi Nakajima , Makoto Ozone
IPC分类号： G06F7/00 , G06F15/78 , G06F17/50 , H01L21/82 , H03K19/173 , H03K19/177
CPC分类号： G06F15/7867 , H03K19/17728 , H03K19/17736 , H03K19/17748 , H03K19/1778 , Y02D10/12 , Y02D10/13
摘要： A reconfigurable circuit of reduced circuit scale. The reconfigurable circuit of the present invention comprises a plurality of ALUs capable of changing functions. The plurality of ALUs are arranged in a matrix. At least one connection unit capable of establishing connection between the ALUs selectively is provided between the stages of the ALUs. This connection unit is not intended to allow connection between all the logic circuits in adjoining stages, but is configured so that the logic circuits are each connectable with only some of the logic circuits pertaining to the other stages. The connection limitation allows a reduction in circuit scale.
摘要翻译：降低电路规模的可重构电路。本发明的可重构电路包括能够改变功能的多个ALU。多个ALU被布置成矩阵。在ALU的各级之间提供能够选择性地建立ALU之间的连接的至少一个连接单元。该连接单元不旨在允许在相邻级中的所有逻辑电路之间的连接，而是被配置为使得逻辑电路可以仅与属于其它级的一些逻辑电路连接。连接限制允许减小电路规模。

5. 发明申请

US20070038971A1 Processing device with reconfigurable circuit, integrated circuit device and processing method using these devices 审中-公开
标题翻译：具有可重构电路的处理器件，集成电路器件和使用这些器件的处理方法
公开(公告)号：US20070038971A1
公开(公告)日：2007-02-15
申请号：US10573970
申请日：2004-07-09
申请人： Tatsuo Hiramatsu , Hiroshi Nakajima , Makoto Okada , Makoto Ozone
发明人： Tatsuo Hiramatsu , Hiroshi Nakajima , Makoto Okada , Makoto Ozone
IPC分类号： G06F17/50
CPC分类号： G06F15/7867
摘要： In the processing device in accordance with the present invention, a plurality of divided circuits obtained by dividing one circuit are successively configured on a reconfigurable circuit, an operation is executed by the divided circuits by feeding back an output of one divided circuit to a next divided circuit, and an output is taken out from the last configured divided circuit. As a feedback path, a path portion is formed, which connects the output of the reconfigurable circuit to its input. By successively configuring the divided circuits, one circuit as a whole can be implemented.
摘要翻译：在根据本发明的处理装置中，通过划分一个电路获得的多个分割电路被连续地配置在可重新配置电路上，通过将一个划分电路的输出反馈到下一个被划分的电路电路，并从最后配置的分频电路中取出输出。作为反馈路径，形成路径部分，其将可重构电路的输出连接到其输入。通过连续配置划分的电路，可以实现一个电路作为整体。

6. 发明授权

US08299080B2 Substituted imidazo[1,5-A] quinoxalines as a PDE9 inhibitor 有权
标题翻译：取代的咪唑并[1,5-A]喹喔啉，为PDE9抑制剂
公开(公告)号：US08299080B2
公开(公告)日：2012-10-30
申请号：US12448212
申请日：2007-12-12
申请人： Makoto Okada , Shuichiro Sato , Kenji Kawade , Kotaro Gotanda , Atsushi Shinbo , Youichi Nakano , Hideo Kobayashi
发明人： Makoto Okada , Shuichiro Sato , Kenji Kawade , Kotaro Gotanda , Atsushi Shinbo , Youichi Nakano , Hideo Kobayashi
IPC分类号： A61K31/495
CPC分类号： C07D487/04 , C07D487/14
摘要： The invention discloses quinoxaline derivatives or salts thereof having PDE9-inhibiting activity and being useful as treating agent of dysuria and the like, which are represented by the formula (I) in the formula, R1 and R2 each independently stands for hydrogen, halogen, alkyl, alkoxy, acyl, amino and the like, R3 stands for alkyl, aryl, saturated carbocyclic group, saturated heterocyclic group, acyl and the like, R4 stands for hydrogen, hydroxy, alkyl or amino, R5 and R8 each independently stands for hydrogen, halogen, alkyl, alkenyl, alkoxy, cyano or nitro, R6 and R7 each independently stands for hydrogen, halogen, alkyl, alkenyl, alkynyl, alkoxy, cyano, amino, carbocyclic group, heterocyclic group, COR9 or SO2R9, R9 stands for hydrogen, hydroxy, alkyl, amino, pyrrolidin-1-yl, piperidin-1-yl, pyperazin-1-yl or the like, X stands for S or O, and A1, A2 and A3 each independently stands for N or C.
摘要翻译：本发明公开了具有PDE9抑制活性的喹喔啉衍生物或其盐，可用作式（I）所示的排尿困难等的治疗剂，R 1和R 2各自独立地表示氢，卤素，烷基烷氧基，酰基，氨基等，R3代表烷基，芳基，饱和碳环基，饱和杂环基，酰基等，R4代表氢，羟基，烷基或氨基，R5和R8各自独立代表氢，卤素，烷基，烯基，烷氧基，氰基或硝基，R6和R7各自独立地代表氢，卤素，烷基，烯基，炔基，烷氧基，氰基，氨基，碳环基，杂环基，COR9或SO2R9，R9代表氢，羟基，烷基，氨基，吡咯烷-1-基，哌啶-1-基，哒嗪-1-基等，X表示S或O，并且，A1，A2和A3各自独立地表示N或C.

7. 发明申请

US20110028152A1 HANDOVER METHOD AND CONTROL APPARATUS USING THE HANDOVER METHOD 审中-公开
标题翻译：使用切换方法切换方法和控制装置
公开(公告)号：US20110028152A1
公开(公告)日：2011-02-03
申请号：US12744317
申请日：2008-10-31
申请人： Makoto Okada
发明人： Makoto Okada
IPC分类号： H04W36/32
CPC分类号： H04W36/0083 , H04W36/14 , H04W60/00
摘要： A receiving unit receives a first list showing base station apparatuses picked up by a terminal apparatus. The first list is attendant to a request for position registration sent from the terminal apparatus to a first base station apparatus. A selector compares the received first list with a second list showing base station apparatuses subscribed to by the terminal apparatus, and selects an already-subscribed second base station apparatus picked up by the terminal apparatus. An instruction unit has the first base station apparatus instruct the terminal apparatus to perform a handover to the second base station apparatus selected by the selector.
摘要翻译：接收单元接收示出由终端装置拾取的基站装置的第一列表。第一列表涉及从终端装置向第一基站装置发送的用于位置登记的请求。选择器将接收到的第一列表与示出由终端装置预约的基站装置的第二列表进行比较，并选择由终端装置拾取的已经订阅的第二基站装置。指令单元具有第一基站装置，指示终端装置对由选择器选择的第二基站装置进行切换。

8. 发明授权

US07813637B2 Digital camera 有权
标题翻译：数码相机
公开(公告)号：US07813637B2
公开(公告)日：2010-10-12
申请号：US11704328
申请日：2007-02-09
申请人： Takehiro Koguchi , Toru Ueda , Makoto Okada , Mitsuru Kamijo , Yuuki Okabe
发明人： Takehiro Koguchi , Toru Ueda , Makoto Okada , Mitsuru Kamijo , Yuuki Okabe
IPC分类号： G03B15/03
CPC分类号： G03B15/03
摘要： A digital camera is provided with a special successive shooting mode wherein an imaging device makes a series of successive shots upon each shutter release operation, including at least a non-flash shot and at least a flash shot. When a shutter button is pressed halfway in the successive shooting mode, an exposure condition deciding device decides an exposure condition common to the non-flash and flash shots, or individual exposure conditions for the non-flash shot and the flash shot. When the shutter button is fully pressed, the imaging device starts the successive shots of one series. Images captured by the non-flash shot and the flash shot are displayed on an LCD panel. Before the imaging device starts the successive shots, necessary warning marks are displayed together with the exposure conditions decided by the exposure condition deciding device.
摘要翻译：数码相机具有特殊的连续拍摄模式，其中成像装置在每个快门释放操作时进行一系列连续拍摄，包括至少非闪光拍摄和至少闪光拍摄。当在连续拍摄模式中半按快门按钮时，曝光条件决定装置决定非闪光灯和闪光灯共同的曝光条件，或非闪光拍摄和闪光拍摄的个别曝光条件。当快门按钮完全按下时，成像装置开始连续拍摄一个系列。由非闪光灯拍摄的图像和闪光灯拍摄的图像显示在LCD面板上。在成像装置开始连续拍摄之前，显示必要的警告标志以及由曝光条件决定装置决定的曝光条件。

9. 发明申请

US20100213227A1 Cup holder 审中-公开
标题翻译：杯架
公开(公告)号：US20100213227A1
公开(公告)日：2010-08-26
申请号：US12656325
申请日：2010-01-26
申请人： Yasuhiro Kodama , Hiroshi Zushi , Makoto Okada , Tomohiro Ishida
发明人： Yasuhiro Kodama , Hiroshi Zushi , Makoto Okada , Tomohiro Ishida
IPC分类号： B60R7/00
CPC分类号： B60N3/108
摘要： A cup holder includes a holder body, a supporter, an urger, and an inhibitor. The holder body has an accommodation space into which a container is inserted. The supporter is disposed rotatably to the holder body. The urger urges the supporter to rotate upward. The inhibitor is made of an elastic body, and inhibits the supporter from rotating upward and then retains the supporter at a standard position. The inhibitor has a retaining portion. The retaining portion of the inhibitor not only retains the supporter at the standard position by inhibiting the supporter from rotating upward by means of coming into contact with the supporter, but also enables the supporter to rotate more upward beyond the standard position when the supporter exerts a pressing force to the inhibitor to make the inhibitor undergo elastic deformation.
摘要翻译：杯架包括保持器本体，支撑件，尿布和抑制剂。保持器主体具有容纳插入其中的容纳空间。支撑件可旋转地设置在保持器主体上。乌尔格敦促支持者向上旋转。抑制剂由弹性体制成，并且阻止支撑物向上旋转，然后将支撑物保持在标准位置。抑制剂具有保持部分。抑制剂的保持部不仅通过与支撑体接触而通过抑制支撑体向上旋转而将支撑体保持在标准位置，而且还可使支撑体在支撑体发挥作用时向上旋转超过标准位置抑制剂的压力使抑制剂发生弹性变形。

10. 发明申请

US20100175781A1 Apparatus for Charging Dry Air or Nitrogen Gas into a Container for Storing Semiconductor Wafers and an Apparatus for Thereby Removing Static Electricity from the Wafers 审中-公开
标题翻译：用于将干燥空气或氮气充入用于存储半导体晶片的容器中的装置和用于从晶片中去除静电的装置
公开(公告)号：US20100175781A1
公开(公告)日：2010-07-15
申请号：US12667806
申请日：2007-07-09
申请人： Toshirou Kisakibaru , Makoto Okada , Naoji Iida , Yasushi Honda
发明人： Toshirou Kisakibaru , Makoto Okada , Naoji Iida , Yasushi Honda
IPC分类号： B65B31/04
CPC分类号： H01L21/67393 , H01L21/67017 , H01L21/67396 , H01L21/68
摘要： An apparatus for charging dry air or nitrogen gas into a container for storing semiconductor wafers can remove chemical gas and moisture from the container, and then prevent acid from being generated at the surfaces of the wafers.The apparatus A for charging dry air or nitrogen gas into a container 1 for storing semiconductor wafers 9 is connected to an opening 8a, acting as an intake, and to an opening 8b, acting as an exhaust, wherein the container 1 comprises a plurality of openings 8 disposed at the bottom plate of the container 1, the apparatus comprising:PTFE filters 7 disposed at the plurality of openings 8a, 8b, a portion 11 for providing the dry air or nitrogen gas to the container 1, anda portion 12 for exhausting the used dry air or nitrogen gas from the container 1 after removing chemical gas and moisture from the container, and then preventing acid from being generated at the surfaces of the wafers 9.
摘要翻译：用于将干燥空气或氮气充入用于存储半导体晶片的容器中的装置可以从容器中除去化学气体和水分，然后防止在晶片表面产生酸。用于将干燥空气或氮气充入到用于存储半导体晶片9的容器1中的装置A连接到用作吸入口的开口8a和用作排气口的开口8b，其中容器1包括多个设置在容器1的底板上的开口8，该装置包括：设置在多个开口8a，8b上的PTFE过滤器7，用于向容器1提供干燥空气或氮气的部分11，以及用于在从容器中除去化学气体和水分后，从容器1排出所使用的干燥空气或氮气，然后防止在晶片9的表面产生酸。

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