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1. 发明授权

US08727793B2 Optical module design in an SFP form factor to support increased rates of data transmission 有权
标题翻译：光模块设计采用SFP格式来支持数据传输速率的提高
公开(公告)号：US08727793B2
公开(公告)日：2014-05-20
申请号：US13045972
申请日：2011-03-11
申请人： Luca Cafiero , Zhiping Yang , Victor Odisho , Francisco Matus
发明人： Luca Cafiero , Zhiping Yang , Victor Odisho , Francisco Matus
IPC分类号： H01R12/00
CPC分类号： G02B6/4201 , H05K1/117 , H05K2201/09409 , H05K2201/10121
摘要： A small form-factor pluggable (SFP) module includes a board with an end portion to be inserted into a connector device. A first set of signal pads is arranged along an edge of a first surface of the SFP board at the end portion and a second set of signal pads along an edge of a second surface of the SFP board at the end portion. A third set of signal pads is disposed on the second surface at the end portion, offset from the edge of the second surface. A transceiver, coupled to the signal pads of the first, second, and third sets of signal pads, is configured to transmit and receive signals via the third set of signal pads and to transmit and receive signals via at least one of the first and second sets of signal pads.
摘要翻译：小尺寸可插拔（SFP）模块包括具有插入连接器装置的端部的板。第一组信号焊盘沿端部的SFP板的第一表面的边缘和沿端部的SFP板的第二表面的边缘的第二组信号焊盘排列。第三组信号垫设置在端部处的第二表面上，偏离第二表面的边缘。耦合到第一，第二和第三组信号焊盘的信号焊盘的收发器被配置成经由第三组信号焊盘发送和接收信号，并且经由第一和第二信号焊盘中的至少一个来发送和接收信号套信号垫。

2. 发明申请

US20120230700A1 Optical Module Design in an SFP Form Factor to Support Increased Rates of Data Transmission 有权
标题翻译： SFP格式的光模块设计，以支持数据传输速率的提高
公开(公告)号：US20120230700A1
公开(公告)日：2012-09-13
申请号：US13045972
申请日：2011-03-11
申请人： Luca Cafiero , Zhiping Yang , Victor Odisho , Francisco Matus
发明人： Luca Cafiero , Zhiping Yang , Victor Odisho , Francisco Matus
IPC分类号： H04B10/00
CPC分类号： G02B6/4201 , H05K1/117 , H05K2201/09409 , H05K2201/10121
摘要： A small form-factor pluggable (SFP) module includes a board with an end portion to be inserted into a connector device. A first set of signal pads is arranged along an edge of a first surface of the SFP board at the end portion and a second set of signal pads along an edge of a second surface of the SFP board at the end portion. A third set of signal pads is disposed on the second surface at the end portion, offset from the edge of the second surface. A transceiver, coupled to the signal pads of the first, second, and third sets of signal pads, is configured to transmit and receive signals via the third set of signal pads and to transmit and receive signals via at least one of the first and second sets of signal pads.
摘要翻译：小尺寸可插拔（SFP）模块包括具有插入连接器装置的端部的板。第一组信号焊盘沿端部的SFP板的第一表面的边缘和沿端部的SFP板的第二表面的边缘的第二组信号焊盘排列。第三组信号垫设置在端部处的第二表面上，偏离第二表面的边缘。耦合到第一，第二和第三组信号焊盘的信号焊盘的收发器被配置成经由第三组信号焊盘发送和接收信号，并且经由第一和第二信号焊盘中的至少一个来发送和接收信号套信号垫。

3. 发明申请

US20070097658A1 Techniques for alleviating the need for DC blocking capacitors in high-speed differential signal pairs 有权
公开(公告)号：US20070097658A1
公开(公告)日：2007-05-03
申请号：US11261014
申请日：2005-10-28
申请人： Zhiping Yang , Vinayagam Arumugham
发明人： Zhiping Yang , Vinayagam Arumugham
IPC分类号： H05K7/06
CPC分类号： H05K1/0245 , H01L2223/6638 , H01L2224/16227 , H01L2924/15192 , H01L2924/19041 , H01L2924/19105 , H05K1/0231 , H05K1/0298 , H05K1/162 , H05K2201/09236 , H05K2201/09309 , H05K2201/10689
摘要： A circuit board has a first component interface configured to connect to a first circuit board component, a second component interface configured to connect to a second circuit board component, a differential signal pair electrically connecting the first component interface to the second component interface, and a signal return path configured to operate as a signal return pathway for the differential signal pair. The signal return path includes first conductive material which is in electrical communication with the first component interface, second conductive material which is in electrical communication with the second component interface, and a dielectric which provides direct current separation between the first and second conductive material. Such a circuit board may alleviate the need for DC blocking capacitors along the differential pair, and along other differential pairs when the circuit board has multiple differential pairs connecting the first and second component interfaces.

4. 发明申请

US20130015557A1 SEMICONDUCTOR PACKAGE INCLUDING AN EXTERNAL CIRCUIT ELEMENT 审中-公开
标题翻译：包含外部电路元件的半导体封装
公开(公告)号：US20130015557A1
公开(公告)日：2013-01-17
申请号：US13181899
申请日：2011-07-13
申请人： Zhiping Yang , Jie Xue , Jovica Savic , Li Li
发明人： Zhiping Yang , Jie Xue , Jovica Savic , Li Li
IPC分类号： H01L29/02 , H01L21/02
CPC分类号： H01L23/49822 , H01L23/50 , H01L24/05 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/05009 , H01L2224/0557 , H01L2224/05624 , H01L2224/05647 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2924/00014 , H01L2924/10253 , H01L2924/10272 , H01L2924/10329 , H01L2924/12042 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/1304 , H01L2924/14 , H01L2924/1433 , H01L2924/1434 , H01L2924/15311 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H05K1/0243 , H01L2924/014 , H01L2224/05552 , H01L2924/00
摘要： Circuit elements such as DC blocking capacitors used in communication such as a serial communication link between two or more electrical components are disposed in pre-existing openings in a support structure that supports at least one of the two electrical components. The openings may be plated and used for signal transmission from the one electrical component to a printed circuit board (PCB) supporting the substrate. The DC blocking capacitors may be oriented substantially vertically, and a non-conducting material may be disposed in each opening in the substrate such that the non-conducting material at least partially surrounds and fixes the orientation of the DC blocking capacitor disposed in the opening.
摘要翻译：在诸如两个或更多个电气部件之间的串行通信链路的通信中使用的诸如隔直流电容器之类的电路元件被布置在支撑结构中的预先存在的开口中，该支撑结构支撑两个电气部件中的至少一个。开口可以被电镀并用于从一个电气部件到支撑衬底的印刷电路板（PCB）的信号传输。隔直电容器可以基本垂直地定向，并且非导电材料可以设置在基板中的每个开口中，使得非导电材料至少部分地围绕并固定设置在开口中的隔直流电容器的取向。

5. 发明授权

US07924911B2 Techniques for simulating a decision feedback equalizer circuit 有权
标题翻译：用于模拟判决反馈均衡器电路的技术
公开(公告)号：US07924911B2
公开(公告)日：2011-04-12
申请号：US11255477
申请日：2005-10-21
申请人： Zhiping Yang
发明人： Zhiping Yang
IPC分类号： H03H7/30 , H03K5/159
CPC分类号： H04L25/03057 , G06F17/5036
摘要： A computerized system simulates a non-linear Decision Feedback Equalizer. The computerized system includes a user interface, an output port, and a controller coupled to the user interface and to the output port. The controller is configured to (i) receive electronic design automation commands from a user through the user interface, (ii) generate, as an electronic model of the non-linear Decision Feedback Equalizer, an electronic representation of a linear filter in response to the electronic design automation commands, and (iii) integrate the electronic representation of the linear filter into an electronic circuit design having other electronic representations of other electronic circuits. The electronic circuit design is externally accessible through the output port.
摘要翻译：计算机化系统模拟非线性判决反馈均衡器。计算机化系统包括用户接口，输出端口和耦合到用户接口和输出端口的控制器。控制器被配置为（i）通过用户接口从用户接收电子设计自动化命令，（ii）响应于该线性滤波器生成线性滤波器的电子表示，作为非线性判决反馈均衡器的电子模型电子设计自动化命令，以及（iii）将线性滤波器的电子表示集成到具有其他电子电路的其他电子表示的电子电路设计中。电子电路设计可通过输出端口进行外部访问。

6. 发明申请

US20130122658A1 MANUFACTURING A SEMICONDUCTOR PACKAGE INCLUDING AN EMBEDDED CIRCUIT COMPONENT WITHIN A SUPPORT STRUCTURE OF THE PACKAGE 有权
标题翻译：在包装的支持结构中制造包括嵌入式电路组件的半导体封装
公开(公告)号：US20130122658A1
公开(公告)日：2013-05-16
申请号：US13296707
申请日：2011-11-15
申请人： Jovica Savic , Zhiping Yang , Jie Xue , Li Li
发明人： Jovica Savic , Zhiping Yang , Jie Xue , Li Li
IPC分类号： H01L21/56
CPC分类号： H05K1/183 , H01L23/24 , H01L23/3107 , H01L23/49838 , H01L2224/16225 , H01L2924/0002 , H05K1/115 , H05K1/181 , H05K2201/095 , H05K2201/10492 , H05K2201/10507 , H01L2924/00
摘要： A method and apparatus are provided in which a cavity is formed in a support structure, the support structure being operable to support a semiconductor device, disposing at least a portion of a circuit element in the cavity in the support structure, filling the cavity in the support structure with an electrically non-conductive filling material so as to at least partially surround the circuit element with the non-conductive filling material, and electrically connecting the semiconductor device to the circuit element. In an example embodiment, the circuit element is operable to substantially block direct current that is output by the semiconductor device or another semiconductor device.
摘要翻译：提供了一种方法和装置，其中空腔形成在支撑结构中，支撑结构可操作以支撑半导体器件，将电路元件的至少一部分设置在支撑结构中的空腔中，将空腔填充在支撑结构，其具有不导电的填充材料，以至少部分地围绕电路元件与非导电填充材料，并将半导体器件电连接到电路元件。在示例性实施例中，电路元件可操作以基本上阻挡由半导体器件或另一半导体器件输出的直流电流。

7. 发明授权

US07262974B2 Techniques for alleviating the need for DC blocking capacitors in high-speed differential signal pairs 有权
标题翻译：用于缓解高速差分信号对中对直流阻塞电容器的需求的技术
公开(公告)号：US07262974B2
公开(公告)日：2007-08-28
申请号：US11261014
申请日：2005-10-28
申请人： Zhiping Yang , Vinayagam Arumugham
发明人： Zhiping Yang , Vinayagam Arumugham
IPC分类号： H05K7/00
CPC分类号： H05K1/0245 , H01L2223/6638 , H01L2224/16227 , H01L2924/15192 , H01L2924/19041 , H01L2924/19105 , H05K1/0231 , H05K1/0298 , H05K1/162 , H05K2201/09236 , H05K2201/09309 , H05K2201/10689
摘要： A circuit board has a first component interface configured to connect to a first circuit board component, a second component interface configured to connect to a second circuit board component, a differential signal pair electrically connecting the first component interface to the second component interface, and a signal return path configured to operate as a signal return pathway for the differential signal pair. The signal return path includes first conductive material which is in electrical communication with the first component interface, second conductive material which is in electrical communication with the second component interface, and a dielectric which provides direct current separation between the first and second conductive material. Such a circuit board may alleviate the need for DC blocking capacitors along the differential pair, and along other differential pairs when the circuit board has multiple differential pairs connecting the first and second component interfaces.
摘要翻译：电路板具有被配置为连接到第一电路板部件的第一部件接口，被配置为连接到第二电路板部件的第二部件接口，将第一部件接口电连接到第二部件接口的差分信号对，以及信号返回路径被配置为用作差分信号对的信号返回路径。信号返回路径包括与第一部件接口电连通的第一导电材料，与第二部件接口电连通的第二导电材料以及在第一和第二导电材料之间提供直流电隔离的电介质。当电路板具有连接第一和第二组件接口的多个差分对时，这样的电路板可以减轻沿着差分对的隔离电容器的需要，以及沿着其它差分对的需要。

8. 发明授权

US06992374B1 Techniques for manufacturing a circuit board with an improved layout for decoupling capacitors 有权
公开(公告)号：US06992374B1
公开(公告)日：2006-01-31
申请号：US10867055
申请日：2004-06-14
申请人： Zhiping Yang , Vinayagam Arumugham , Lekhanh Dang
发明人： Zhiping Yang , Vinayagam Arumugham , Lekhanh Dang
IPC分类号： H01L23/02 , H01L23/48 , H01L29/00
CPC分类号： H05K1/0231 , H05K1/114 , H05K2201/09418 , H05K2201/10545 , H05K2201/10734 , Y10T29/4913 , Y10T29/49144 , Y10T29/49165
摘要： A circuit board module has an IC device, discrete components, and a circuit board structure in electrical communication with the IC device and the discrete component. The circuit board structure includes non-conductive material defining a top surface of the circuit board structure and a bottom surface of the circuit board structure, vias supported by the non-conductive material, top pads electrically coupled to the vias, and bottom pads electrically coupled to the vias. The top pads are disposed along the top surface of the circuit board structure and are soldered to IC device. The bottom pads are disposed along the bottom surface of the circuit board structure and are configured to solder to the discrete components. The bottom pads include a group of angled bottom pads which is soldered to a group of the discrete components substantially at 45 degree angles relative to sides of the IC device.

9. 发明申请

US20110167020A1 Hybrid Simulation Methodologies To Simulate Risk Factors 审中-公开
标题翻译：混合模拟方法模拟风险因素
公开(公告)号：US20110167020A1
公开(公告)日：2011-07-07
申请号：US12683020
申请日：2010-01-06
申请人： Zhiping Yang , Donald James Erdman , Stacey Michelle Christian , Wei Chen
发明人： Zhiping Yang , Donald James Erdman , Stacey Michelle Christian , Wei Chen
IPC分类号： G06Q40/00
CPC分类号： G06Q40/06 , G06Q40/025
摘要： Computer-implemented systems and methods are provided for generating a simulated forecast based on members of a pool of input risk factor variables. Certain members of the pool of input risk factor variables are identified as members of a first set of variables, and certain other members of the pool of input risk factor variables are identified as members of a second set of variables. A first simulation is generated via a first simulation method using the first set of variables, and a second simulation is generated via a second simulation method that differs from the first simulation method using the second set of variables. The first simulation and the second simulation are generated using correlations among variables in the first set of variables and variables in the second set of variables.
摘要翻译：提供计算机实现的系统和方法，用于基于输入风险因子变量池的成员生成模拟预测。输入风险因素变量池的某些成员被识别为第一组变量的成员，并且输入风险因子变量池的某些其他成员被识别为第二组变量的成员。通过使用第一组变量的第一模拟方法生成第一模拟，并且通过与使用第二组变量的第一模拟方法不同的第二模拟方法生成第二模拟。第一个模拟和第二个模拟是使用第二组变量和第二组变量中的变量之间的变量之间的相关来生成的。

10. 发明授权

US07486702B1 DDR interface for reducing SSO/SSI noise 有权
标题翻译： DDR接口，用于降低SSO / SSI噪声
公开(公告)号：US07486702B1
公开(公告)日：2009-02-03
申请号：US10638624
申请日：2003-08-11
申请人： Zhiping Yang
发明人： Zhiping Yang
IPC分类号： H04J3/06
CPC分类号： G11C7/02 , G11C7/22 , G11C7/222
摘要： An improved DDR interface uses single-ended technology and phase-shifts all output data signals and the output source clock signal so that each output signal switches at a different time so that IDDQ spikes caused by I/O switching do not accumulate. A dynamic phase adjustment circuit on the receiver compensates for the phase differences. Clock jitter and skew is reduced and the number of IDDQ pins is reduced to provide a more effective design and high density package.
摘要翻译：改进的DDR接口使用单端技术，并相移所有输出数据信号和输出源时钟信号，以便每个输出信号在不同的时间切换，从而不会累积由I / O切换导致的IDDQ峰值。接收机上的动态相位调整电路补偿相位差。时钟抖动和偏移减少，IDDQ引脚数量减少，从而提供更有效的设计和高密度封装。

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