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1. 发明授权

US07721119B2 System and method to optimize multi-core microprocessor performance using voltage offsets 失效
标题翻译：使用电压补偿优化多核微处理器性能的系统和方法
公开(公告)号：US07721119B2
公开(公告)日：2010-05-18
申请号：US11466891
申请日：2006-08-24
申请人： Louis Bennie Capps, Jr. , Warren D. Dyckman , Joanne Ferris , Anand Haridass , James Douglas Jordan , Ronald Edward Newhart , Michael Richard Ouellette , Michael Jay Shapiro
发明人： Louis Bennie Capps, Jr. , Warren D. Dyckman , Joanne Ferris , Anand Haridass , James Douglas Jordan , Ronald Edward Newhart , Michael Richard Ouellette , Michael Jay Shapiro
IPC分类号： G06F1/00
CPC分类号： G06F1/26
摘要： A system and method to optimize multi-core microprocessor performance using voltage offsets is presented. A multi-core device tests each of its processor cores in order to identify each processor core's optimum supply voltage. In turn, the device configures voltage offset networks for each processor core based upon each processor core's identified optimum supply voltage. As a result, the offset voltages produced by the voltage offset networks are subtracted from the multi-core device's main voltage, which results in the voltage offset networks supplying optimum supply voltages to each processor core. The voltage offset networks may include fuses to generate a fixed voltage offset, or the voltage offset networks may include a control circuit to dynamically adjust voltage offsets during the multi-core device's operation.
摘要翻译：提出了使用电压偏移来优化多核微处理器性能的系统和方法。多核设备测试每个处理器内核，以便识别每个处理器内核的最佳电源电压。反过来，该设备基于每个处理器核心的所识别的最佳电源电压来配置每个处理器核心的电压偏移网络。结果，从多核设备的主电压中减去由电压偏移网络产生的偏移电压，这导致电压偏移网络向每个处理器核提供最佳电源电压。电压偏移网络可以包括熔丝以产生固定的电压偏移，或者电压偏移网络可以包括在多核装置的操作期间动态地调节电压偏移的控制电路。

2. 发明申请

US20080052542A1 System and Method to Optimize Multi-Core Microprocessor Performance Using Voltage Offsets 失效
标题翻译：使用电压偏移优化多核微处理器性能的系统和方法
公开(公告)号：US20080052542A1
公开(公告)日：2008-02-28
申请号：US11466891
申请日：2006-08-24
申请人： Louis Bennie Capps , Warren D. Dyckman , Joanne Ferris , Anand Haridass , James Douglas Jordan , Ronald Edward Newhart , Michael Richard Ouellette , Michael Jay Shapiro
发明人： Louis Bennie Capps , Warren D. Dyckman , Joanne Ferris , Anand Haridass , James Douglas Jordan , Ronald Edward Newhart , Michael Richard Ouellette , Michael Jay Shapiro
IPC分类号： G06F1/00
CPC分类号： G06F1/26
摘要： A system and method to optimize multi-core microprocessor performance using voltage offsets is presented. A multi-core device tests each of its processor cores in order to identify each processor core's optimum supply voltage. In turn, the device configures voltage offset networks for each processor core based upon each processor core's identified optimum supply voltage. As a result, the offset voltages produced by the voltage offset networks are subtracted from the multi-core device's main voltage, which results in the voltage offset networks supplying optimum supply voltages to each processor core. The voltage offset networks may include fuses to generate a fixed voltage offset, or the voltage offset networks may include a control circuit to dynamically adjust voltage offsets during the multi-core device's operation.
摘要翻译：提出了使用电压偏移来优化多核微处理器性能的系统和方法。多核设备测试每个处理器内核，以便识别每个处理器内核的最佳电源电压。反过来，该设备基于每个处理器核心的所识别的最佳电源电压来配置每个处理器核心的电压偏移网络。结果，从多核设备的主电压中减去由电压偏移网络产生的偏移电压，这导致电压偏移网络向每个处理器核提供最佳电源电压。电压偏移网络可以包括熔丝以产生固定的电压偏移，或者电压偏移网络可以包括在多核装置的操作期间动态地调节电压偏移的控制电路。

3. 发明授权

US06642811B2 Built-in power supply filter for an integrated circuit 失效
标题翻译：内置电源滤波器，用于集成电路
公开(公告)号：US06642811B2
公开(公告)日：2003-11-04
申请号：US10059662
申请日：2002-01-30
申请人： Scott Leonard Daniels , Norman Karl James , James Douglas Jordan , Daniel Eugene Pridgeon
发明人： Scott Leonard Daniels , Norman Karl James , James Douglas Jordan , Daniel Eugene Pridgeon
IPC分类号： H03H701
CPC分类号： H03H7/0115 , H03H7/1775
摘要： A power-supply filter that is built into an integrated circuit package is disclosed. An LC, RC, or RLC filter is built into the integrated circuit's chip carrier module and connected so as to filter the power supply entering the integrated circuit. By manufacturing the filter as part of the integrated circuit package, a chip manufacturer can eliminate the need for application-level developers to provide an external filtering network in the deployment of the integrated circuit in an application circuit.
摘要翻译：公开了内置于集成电路封装中的电源滤波器。 LC，RC或RLC滤波器内置在集成电路的芯片载体模块中并连接，以过滤进入集成电路的电源。通过将滤波器制造成集成电路封装的一部分，芯片制造商可以消除对应用级开发人员在应用电路中部署集成电路的外部滤波网络的需求。

4. 发明授权

US5674014A Printhead driver circuit for line printers 失效
标题翻译：行式打印机的打印头驱动电路
公开(公告)号：US5674014A
公开(公告)日：1997-10-07
申请号：US658836
申请日：1996-05-31
申请人： James Douglas Jordan
发明人： James Douglas Jordan
IPC分类号： B41J2/30
CPC分类号： B41J2/30
摘要： A printhead drive circuit to be utilized in impact printers is disclosed. In accordance with a preferred embodiment of the present invention, the printhead driver circuit includes a first switch, a set of second switches, and a decoupling circuit. The first switch is coupled between a first terminal of a DC power supply and a first terminal of a set of solenoid coils. The set of second switches is utilized to selectively energize each of the solenoid coils within the set. Each of the second switches is also respectively coupled between a second terminal of each of the solenoid coils and a second terminal of the DC power supply. The decoupling circuit is for selectively decoupling a first group of solenoid coils within the set that are not energized from a second group of solenoid coils within the set that are energized. The decoupling circuit is connected between the first terminal of the DC power supply and the second terminal of each solenoid coil via a diode at each of the second terminals of each solenoid coil.
摘要翻译：公开了一种用于冲击式打印机的打印头驱动电路。根据本发明的优选实施例，打印头驱动器电路包括第一开关，一组第二开关和去耦电路。第一开关耦合在直流电源的第一端子和一组电磁线圈的第一端子之间。该组第二开关用于选择性地激励该组内的每个螺线管线圈。每个第二开关也分别耦合在每个螺线管线圈的第二端子和直流电源的第二端子之间。去耦电路用于选择性地将组内的第一组螺线管线圈从未激励的组内的第二组螺线管线圈中激励。去耦电路通过每个螺线管线圈的每个第二端子处的二极管连接在直流电源的第一端子和每个螺线管线圈的第二端子之间。

5. 发明授权

US06891406B2 Method and apparatus for supplying a reference voltage for chip-to-chip communication 有权
标题翻译：用于提供用于芯片到芯片通信的参考电压的方法和装置
公开(公告)号：US06891406B2
公开(公告)日：2005-05-10
申请号：US10339754
申请日：2003-01-09
申请人： Daniel Mark Dreps , James Douglas Jordan , Joel David Ziegelbein
发明人： Daniel Mark Dreps , James Douglas Jordan , Joel David Ziegelbein
IPC分类号： H04L25/03 , H04L25/02 , H04L25/06 , H03F3/45
CPC分类号： H04L25/06
摘要： A method for receiving data by an integrated circuitry chip includes receiving data signals and a first clock signal sent by a sending chip. The data signals are received by data receivers and the clock signal is received by at least one clock receiver of the receiving chip. A reference voltage is derived by reference voltage circuitry for the receiving chip responsive to the first clock signal. Logical states of the received data signals are detected. The detecting includes the data receivers comparing voltage levels of the received data signals to the derived reference voltage.
摘要翻译：一种用于由集成电路芯片接收数据的方法包括接收由发送芯片发送的数据信号和第一时钟信号。数据信号由数据接收器接收，时钟信号由接收芯片的至少一个时钟接收器接收。参考电压由对应于第一时钟信号的接收芯片的参考电压电路导出。检测出接收到的数据信号的逻辑状态。该检测包括数据接收器，将接收的数据信号的电压电平与导出的参考电压进行比较。

6. 发明授权

US5903182A Method and system for providing a regulated core voltage to a processor within a computer system 失效
标题翻译：用于向计算机系统内的处理器提供调节的核心电压的方法和系统
公开(公告)号：US5903182A
公开(公告)日：1999-05-11
申请号：US799140
申请日：1997-02-13
申请人： James Douglas Jordan
发明人： James Douglas Jordan
IPC分类号： G05F1/56 , G05F1/10
CPC分类号： G05F1/56
摘要： A method for providing a regulated core voltage to a processor within a computer system is disclosed. In accordance with a method and system of the present invention, a power supply is provided for a processor that includes multiple core transistors and multiple I/O transistors. An input voltage is supplied to a first power input of the processor for powering the I/O transistors within the processor. This input voltage is also supplied to a second power input of the processor for powering the core transistors within the processor via a voltage regulator and a resistor, with the voltage regulator and the resistor connected in parallel, such that the voltage drop across said voltage regulator can be reduced.
摘要翻译：公开了一种用于向计算机系统内的处理器提供调节的核心电压的方法。根据本发明的方法和系统，为包括多个核心晶体管和多个I / O晶体管的处理器提供电源。将输入电压提供给处理器的第一电源输入端，为处理器内的I / O晶体管供电。该输入电压还被提供给处理器的第二电源输入端，用于通过电压调节器和电阻器对处理器内的核心晶体管供电，电压调节器和电阻器并联连接，使得所述电压调节器可以减少

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