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1. 发明授权

US07136039B2 Method and related apparatus for driving an LCD monitor 有权
公开(公告)号：US07136039B2
公开(公告)日：2006-11-14
申请号：US10065665
申请日：2002-11-07
申请人： Lin-Kai Bu , Chin-Feng Cheng , Tsung-Yu Wu , Chuan-Cheng Hsiao
发明人： Lin-Kai Bu , Chin-Feng Cheng , Tsung-Yu Wu , Chuan-Cheng Hsiao
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3614 , G09G3/3648 , G09G3/3685 , G09G3/3696 , G09G2310/027 , G09G2310/0291 , G09G2310/0297 , G09G2320/0233 , G09G2320/0276 , G09G2330/021
摘要： A method for driving an LCD monitor is disclosed. The LCD monitor includes a voltage selection unit used for outputting a plurality of driving voltages according to display data, and a plurality of output buffers each electrically connected to the voltage selection circuit and a corresponding pixel. In the beginning, an output port of each output buffer approaches voltage at an input port. Then, the output ports of the driving units, which approach the same input voltage, are electrically connected to have an average voltage. In addition, the LCD monitor further includes a timing controller for controlling operation of the output buffers. When output ports of the output buffers, which approach the same input voltage, are electrically connected, the output buffers are turned off for saving power.

2. 发明授权

US06806515B2 Layout of a decoder and the method thereof 失效
标题翻译：解码器的布局及其方法
公开(公告)号：US06806515B2
公开(公告)日：2004-10-19
申请号：US10044950
申请日：2002-01-15
申请人： Chuan-Cheng Hsiao , Lin-Kai Bu , Kun-Cheng Hung , Chien-Pin Chen
发明人： Chuan-Cheng Hsiao , Lin-Kai Bu , Kun-Cheng Hung , Chien-Pin Chen
IPC分类号： H01L31072
CPC分类号： H01L27/0207 , G02F1/1368 , G09G3/3688 , G09G2310/027
摘要： A layout structure of a decoder with m*n nodes and the method thereof are provided. The nodes comprise a plurality of transistor nodes and a plurality of channel nodes. The manufacturing method of the transistor node comprises forming a gate, a first source/drain region and a second source/drain region. The channel node is fabricated by forming a channel. The channel, the first source/drain region and the second source/drain region are formed at the same time with the same material. The decoder circuit with smaller width is accomplished without additional mask in the invention.
摘要翻译：提供具有m * n个节点的解码器的布局结构及其方法。节点包括多个晶体管节点和多个信道节点。晶体管节点的制造方法包括形成栅极，第一源极/漏极区域和第二源极/漏极区域。通道节点通过形成通道来制造。通道，第一源极/漏极区域和第二源极/漏极区域同时用相同的材料形成。具有较小宽度的解码器电路在本发明中实现而不需要额外的掩模。

3. 发明授权

US07081877B2 Apparatus and method for data signal scattering conversion 失效
公开(公告)号：US07081877B2
公开(公告)日：2006-07-25
申请号：US10121660
申请日：2002-04-15
申请人： Lin-Kai Bu , Chuan-Cheng Hsiao
发明人： Lin-Kai Bu , Chuan-Cheng Hsiao
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3614 , G09G2310/027 , G09G2310/0297 , G09G2320/0233
摘要： An apparatus and a method for data signal scattering conversion. The apparatus includes a scattering multiplexer, a digital-to-analog converter, and a scattering demultiplexer. The scattering multiplexer is for receiving p digital data signals and outputting the q-th digital data signal of the p digital data signals. The digital-to-analog converter is to perform digital-to-analog conversion of the q-th digital data signal and output an analog data signal. The scattering demultiplexer has p output terminals, and is used for outputting the analog data signal through the q-th output terminal. Offset voltages output from the digital-to-analog converter are scattered over a number of data lines so that undesired points with abnormally deep or light colors due to the output offset voltages, are difficult to perceive.

4. 发明授权

US06956554B2 Apparatus for switching output voltage signals 失效
标题翻译：用于切换输出电压信号的装置
公开(公告)号：US06956554B2
公开(公告)日：2005-10-18
申请号：US10212077
申请日：2002-08-06
申请人： Yen-Chen Chen , Chien-Pin Chen , Chuan-Cheng Hsiao , Lin-Kai Bu , Kun-Cheng Hung
发明人： Yen-Chen Chen , Chien-Pin Chen , Chuan-Cheng Hsiao , Lin-Kai Bu , Kun-Cheng Hung
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3688 , G09G2310/027 , G09G2320/0276
摘要： An apparatus for switching output voltage signals includes a resistor string, a first switching device set for delivering a number of gamma voltage input signals, a second switching device set for delivering a high voltage input signal and a low voltage input signal, and a switch selecting device coupled to the first switching device set and the second switching device set. When the switch selecting device outputs a first signal, the first switching device set can deliver the gamma voltage input signals to the resistor string; when the switch selecting device outputs a second signal, the second switching device set will deliver the high voltage input signal and the low voltage input signal to the resistor string.
摘要翻译：用于切换输出电压信号的装置包括电阻串，用于传递多个伽马电压输入信号的第一开关装置，用于传送高电压输入信号和低电压输入信号的第二开关装置，以及开关选择耦合到第一开关装置组和第二开关装置组的装置。当开关选择装置输出第一信号时，第一开关装置可将伽马电压输入信号传送到电阻串; 当开关选择装置输出第二信号时，第二开关装置将高压输入信号和低电压输入信号传送到电阻串。

5. 发明授权

US07184016B2 Data driver for an LCD panel 失效
标题翻译： LCD面板的数据驱动程序
公开(公告)号：US07184016B2
公开(公告)日：2007-02-27
申请号：US10668983
申请日：2003-09-22
申请人： Lin-Kai Bu , Chuan-Cheng Hsiao , Yen-Chen Chen
发明人： Lin-Kai Bu , Chuan-Cheng Hsiao , Yen-Chen Chen
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/2011 , G09G2310/027
摘要： A data driver for driving multiple data lines on an LCD panel according to multiple channels of pixel data. In the data driver, a digital buffer receives and stores the pixel data at several times and selectively outputs a channel of the pixel data at a time. A DAC receives the pixel data output from the digital buffer at several times, converts the pixel data into multiple channels of analog pixel data and outputs the analog pixel data at several times. An analog buffer receives the analog pixel data output from the DAC at several times and outputs the analog pixel data at a time. An output buffer receives the analog pixel data output from the analog buffer so as to drive the data lines.
摘要翻译：一种用于根据多个像素数据通道在LCD面板上驱动多条数据线的数据驱动器。在数据驱动器中，数字缓冲器多次接收并存储像素数据，并且一次选择性地输出像素数据的通道。 DAC从数字缓冲器中多次接收输出的像素数据，将像素数据转换为多通道的模拟像素数据，并多次输出模拟像素数据。模拟缓冲器多次接收从DAC输出的模拟像素数据，并一次输出模拟像素数据。输出缓冲器接收从模拟缓冲器输出的模拟像素数据，以驱动数据线。

6. 发明申请

US20060238228A1 Cascade system capable of restraining duty cycle offsets 审中-公开
标题翻译：级联系统能够限制占空比偏移
公开(公告)号：US20060238228A1
公开(公告)日：2006-10-26
申请号：US11407369
申请日：2006-04-20
申请人： Tsung-Yu Wu , Lin-Kai Bu
发明人： Tsung-Yu Wu , Lin-Kai Bu
IPC分类号： H03K3/017
CPC分类号： H03K5/1565
摘要： The invention relates to a cascade system capable of restraining duty cycle offsets. The cascade system receives an input signal with an input duty cycle. The cascade system comprises a plurality of circuit units. The circuit units are connected in series. Each circuit unit receives a signal from a previous circuit unit. Through at least one circuit unit, a duty cycle offset exists between the processing duty cycle and the input duty cycle. At least one circuit unit is selected at predetermined intervals, and the processing signal thereof is inverted so that the duty cycle offsets are compensated for and restrained within a predetermined range
摘要翻译：本发明涉及能够抑制占空比偏移的级联系统。级联系统接收具有输入占空比的输入信号。级联系统包括多个电路单元。电路单元串联连接。每个电路单元接收来自先前电路单元的信号。通过至少一个电路单元，在处理占空比和输入占空比之间存在占空比偏移。以预定间隔选择至少一个电路单元，并且其处理信号被反转，使得占空比偏移在预定范围内被补偿和约束

7. 发明申请

US20050184978A1 Signal driving system for a display 有权
标题翻译：用于显示器的信号驱动系统
公开(公告)号：US20050184978A1
公开(公告)日：2005-08-25
申请号：US11055861
申请日：2005-02-11
申请人： Lin-Kai Bu , Ying-Lieh Chen , Tsung-Yu Wu , Hsin-Ta Lee , Bou Herng Hwe , Kun Lo , Tzong Ku
发明人： Lin-Kai Bu , Ying-Lieh Chen , Tsung-Yu Wu , Hsin-Ta Lee , Bou Herng Hwe , Kun Lo , Tzong Ku
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3685 , G09G2330/06
摘要： The invention relates to a signal driving system for a display. The signal driving system comprises: a signal controller, a flexible connector and a plurality of driving devices. The signal controller is used to produce a first control signal. The flexible connector is connected to the signal controller, and used to receive the first control signal. One of the driving devices is connected to the flexible connector. The driving devices connect in cascade. Each driving device comprises a data input port, a data output port and a driving signal output port. The data input port receives the first control signal or a second control signal. The data output port outputs the second control signal. According to the first control signal or the second control signal, the driving signal output port transmits a driving signal. The signal driving system of the invention can make the data output port of the driving device transmit the second control signal to the next driving device. Therefore, the signal driving system of the invention can resolve the problem between different control signals of different circuit interfaces. Besides, the signal driving system of the invention has the advantage of processing the first control signal in the signal controller and transmitting the second control signal between the driving devices.
摘要翻译：本发明涉及一种用于显示器的信号驱动系统。信号驱动系统包括：信号控制器，柔性连接器和多个驱动装置。信号控制器用于产生第一控制信号。柔性连接器连接到信号控制器，用于接收第一控制信号。其中一个驱动装置连接到柔性连接器。驱动装置级联连接。每个驱动装置包括数据输入端口，数据输出端口和驱动信号输出端口。数据输入端口接收第一控制信号或第二控制信号。数据输出端口输出第二个控制信号。根据第一控制信号或第二控制信号，驱动信号输出端口发送驱动信号。本发明的信号驱动系统可以使驱动装置的数据输出端口将第二控制信号发送到下一个驱动装置。因此，本发明的信号驱动系统可以解决不同电路接口的不同控制信号之间的问题。此外，本发明的信号驱动系统具有处理信号控制器中的第一控制信号并在驱动装置之间传输第二控制信号的优点。

8. 发明申请

US20070001883A1 DIGITAL-TO-ANALOG CONVERTER 有权
标题翻译：数字到模拟转换器
公开(公告)号：US20070001883A1
公开(公告)日：2007-01-04
申请号：US11168334
申请日：2005-06-29
申请人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： H03M1/66
CPC分类号： H03M1/68 , H03M1/76
摘要： A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.
摘要翻译： DAC具有N位R串DAC部分和（M-N）位插值DAC部分。 N位R串DAC部分具有多个电阻和2位N选择器。电阻器串联电连接以提供多个电压电平。 2位N选择器耦合到串联电阻器，并且被布置为根据N位MSB子字选择两个相邻的电压电平。（M-N）位插值DAC部分耦合到N位R串DAC部分，并且被配置为根据（M-N）位LSB子字来插入来自两个相邻电压电平的模拟输出信号。

9. 发明授权

US07161517B1 Digital-to-analog converter 有权
标题翻译：数模转换器
公开(公告)号：US07161517B1
公开(公告)日：2007-01-09
申请号：US11168334
申请日：2005-06-29
申请人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Chen-Song Yen , Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： H03M1/66
CPC分类号： H03M1/68 , H03M1/76
摘要： A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.
摘要翻译： DAC具有N位R串DAC部分和（M-N）位插值DAC部分。 N位R串DAC部分具有多个电阻和2位N选择器。电阻器串联电连接以提供多个电压电平。 2位N选择器耦合到串联电阻器，并且被布置为根据N位MSB子字选择两个相邻的电压电平。（M-N）位插值DAC部分耦合到N位R串DAC部分，并且被配置为根据（M-N）位LSB子字来插入来自两个相邻电压电平的模拟输出信号。

10. 发明授权

US07764259B2 Wire-on-array liquid crystal display 有权
标题翻译：线阵列液晶显示器
公开(公告)号：US07764259B2
公开(公告)日：2010-07-27
申请号：US11267289
申请日：2005-11-07
申请人： Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
发明人： Tsung-Yu Wu , Ying-Lieh Chen , Lin-Kai Bu
IPC分类号： G09G3/36
CPC分类号： G09G3/2096 , G09G2310/0275 , G09G2320/0223
摘要： A wire-on-array (WOA) flat panel display is provided. The wire-on-array (WOA) flat panel display is characterized in a plurality of high input impedance components between the flexible printed circuit (FPC) board and the corresponding source driver circuits. Each of the high input impedance components is able to receive gamma voltages with little input current and then transmit the gamma voltages to each of the source driver circuit for production of source voltages of little banding effect.
摘要翻译：提供线阵列（WOA）平板显示器。线对阵（WOA）平板显示器的特征在于柔性印刷电路板（FPC）板和对应的源极驱动电路之间的多个高输入阻抗分量。每个高输入阻抗分量能够接收具有很小输入电流的伽马电压，然后将伽马电压传输到每个源极驱动电路，用于产生具有小带效应的源电压。

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