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1. 发明授权

US5912711A Apparatus for converting and scaling non-interlaced VGA signal to interlaced TV signal 失效
标题翻译：用于将非隔行VGA信号转换和缩放成隔行电视信号的装置
公开(公告)号：US5912711A
公开(公告)日：1999-06-15
申请号：US853689
申请日：1997-05-09
申请人： Lie-Der Lin , Ju-Hao Lee , Ching-Hung Ho , Wen-Chin Cheng
发明人： Lie-Der Lin , Ju-Hao Lee , Ching-Hung Ho , Wen-Chin Cheng
IPC分类号： G09G5/391 , H04N5/44 , H04N7/01 , H04N9/64
CPC分类号： G09G5/391 , H04N7/01 , H04N7/012 , H04N9/641 , G09G2310/0224
摘要： An apparatus for converting and scaling non-interlaced VGA signal to interlaced TV signal suitable to be displayed on a TV video screen is disclosed. The apparatus includes an analog to digital converter, a vertical scaling down device, a vertical scaling up device, a horizontal scaling down device, a horizontal scaling up device, a memory unit, a memory controller, and a digital to analog converter. The apparatus is capable of scaling the non-interlaced VGA signal to interlaced TV signal with any desired scaling size both in horizontal direction and in vertical direction to meet the requirement of displaying operation of the TV screen.
摘要翻译：公开了一种用于将非隔行VGA信号转换和缩放以适合于显示在TV视频屏幕上的隔行扫描TV信号的装置。该装置包括模数转换器，垂直缩放装置，垂直放大装置，水平缩小装置，水平放大装置，存储单元，存储器控制器和数模转换器。该装置能够在水平方向和垂直方向上以任何期望的缩放比例缩放非间行VGA信号到隔行扫描TV信号，以满足显示TV屏幕操作的要求。

2. 发明授权

US5589850A Apparatus for converting two dimensional pixel image into one-dimensional pixel array 失效
标题翻译：用于将二维像素图像转换为一维像素阵列的装置
公开(公告)号：US5589850A
公开(公告)日：1996-12-31
申请号：US313524
申请日：1994-09-26
申请人： Lie-Der Lin , Jiunn-Ming Ju
发明人： Lie-Der Lin , Jiunn-Ming Ju
IPC分类号： G06F12/02 , G09G5/39 , G09G5/36
CPC分类号： G06F12/0207 , G09G5/39
摘要： An converter apparatus to convert the (X, Y) coordinate of the two-dimensional screen position of a pixel to a linear address. The converter apparatus, which can be used with a variety of video displays of various resolutions including 1280.times.1024, 1152.times.900, 640.times.480, 1024.times.768, 1600.times.1280, and 800.times.600, contains three circuits in parallel disposition to receive and process various portions of the X and Y bits, and to output a Z-bit linear address. The first circuit mainly contains a multiplexer and it receives lower X bits as inputs; the second circuit contains a plurality of adders and multiplexers and a logical operation circuit, and it receives higher X bits and lower Y bits as inputs; and the third circuit mainly contains a multiplexer and it receives higher Y bits and at least a portion of the lower Y bits as inputs. The converter apparatus does not require a system CPU thus very high speed conversion can be achieved.
摘要翻译：一种将像素的二维屏幕位置的（X，Y）坐标转换为线性地址的转换器装置。可以与各种分辨率的各种分辨率的视频显示器一起使用的转换器装置包括1280x1024,1152x900,640x480,1024x768,1600x1280和800x600，并行配置的三个电路用于接收和处理X和Y位的各个部分，并输出Z位线性地址。第一个电路主要包含多路复用器，并且接收低X位作为输入; 第二电路包含多个加法器和多路复用器和逻辑运算电路，并且其接收较高的X位和较低的Y位作为输入; 并且第三电路主要包含多路复用器，并且它接收较高的Y位和低Y位的至少一部分作为输入。转换器装置不需要系统CPU，因此可以实现非常高的速度转换。

3. 发明授权

US5638467A Bit-reversing method and system for linear image scaling 失效
标题翻译：用于线性图像缩放的位反转方法和系统
公开(公告)号：US5638467A
公开(公告)日：1997-06-10
申请号：US62410
申请日：1993-05-14
申请人： Well-Chen Chua , Lie-Der Lin , Shih-Pao Sun , Cheun-Song Lin
发明人： Well-Chen Chua , Lie-Der Lin , Shih-Pao Sun , Cheun-Song Lin
IPC分类号： G06T3/40 , G06K9/32
CPC分类号： G06T3/4023
摘要： A bit-reversing method and system are disclosed for linearly scaling an image frame horizontally, vertically or both. The system includes a counter circuit for outputting the current frame-column number of the currently scanned pixel and the current frame-row number of the currently scanned frame-row. The numbers are bit reversed in a converter circuit. The bit-reversed current frame-column number is compared in a comparator circuit to a horizontal scaling constant which equals the number of pixels to be discarded in each frame-row of the image frame. The bit-reversed current frame-row number is compared in the comparator circuit to a vertical scaling constant which equals the number of frame-rows of the image frame to be discarded. If the bit-reversed current frame-row number is greater than the vertical scaling constant then the comparator circuit outputs appropriate signals to a scaling controller and an address generator for storing the currently scanned frame-row in a frame buffer. Otherwise, the comparator circuit outputs appropriate signals for discarding the currently scanned frame-row. Likewise, if the bit-reversed current column number is greater than the horizontal scaling constant, the comparator circuit outputs appropriate signals to the scaling controller and address generator for storing the currently scanned pixel in the frame buffer. Otherwise, the comparator circuit outputs appropriate signals for discarding the currently scanned pixel.
摘要翻译：公开了一种位反转方法和系统，用于水平，垂直或两者直线地缩放图像帧。该系统包括用于输出当前扫描像素的当前帧列号和当前扫描帧行当前帧行号的计数器电路。这些数字在转换器电路中是相反的。在比较器电路中将比特反转的当前帧列号比较为等于在帧帧的每个帧行中要丢弃的像素数量的水平缩放常数。在比较器电路中将比特反转的当前帧行号比较为等于要丢弃的图像帧的帧行数的垂直缩放常数。如果位反转的当前帧行数大于垂直缩放常数，则比较器电路将适当的信号输出到缩放控制器和用于将当前扫描的帧行存储在帧缓冲器中的地址发生器。否则，比较器电路输出用于丢弃当前扫描的帧行的适当信号。同样，如果位反转的当前列数大于水平缩放常数，则比较器电路向缩放控制器和地址发生器输出适当的信号，以将当前扫描的像素存储在帧缓冲器中。否则，比较器电路输出适当的信号，以丢弃当前扫描的像素。

4. 发明授权

US5299309A Fast graphics control system capable of simultaneously storing and executing graphics commands 失效
标题翻译：快速图形控制系统能够同时存储和执行图形命令
公开(公告)号：US5299309A
公开(公告)日：1994-03-29
申请号：US816702
申请日：1992-01-02
申请人： Bor-Chuan Kuo , Cheun-Song Lin , Lie-Der Lin , Shu-Wei Wang
发明人： Bor-Chuan Kuo , Cheun-Song Lin , Lie-Der Lin , Shu-Wei Wang
IPC分类号： G06F3/14 , G06T17/00 , G09G5/14 , G06F15/20
CPC分类号： G06F3/14 , G06T17/00 , G09G5/14
摘要： A host computer, a graphics processor which receives and executes commands generated by the host computer, a display memory for storing display data, and a display device for displaying the display data are provided. A graphics context is also provided in which the parameters of a current image are stored. A processing unit for receiving and executing the graphics commands issued by the host computer and for converting the parameters stored in the graphics context into the display data, and a drawing unit for storing the display data in the display memory are also provided. Furthermore, a shared memory is provided which is directly accessible to the host computer so that it can write the parameters of a next graphics command into the shared memory while the graphics processor is executing a current command. The shared memory is also directly accessible to the graphics processor so that it can receive the parameters of the next graphics command to be executed directly from the shared memory. In a preferred embodiment, transfers of the graphics parameters between the graphics context and the shared memory are accomplished by employing a bit-block transfer method and a mask register stored in the graphics context.
摘要翻译：主计算机，接收和执行由主计算机产生的命令的图形处理器，用于存储显示数据的显示存储器和用于显示显示数据的显示装置。还提供了存储当前图像的参数的图形上下文。一种处理单元，用于接收和执行由主计算机发出的图形命令，并将存储在图形上下文中的参数转换成显示数据，还提供了一种用于将显示数据存储在显示存储器中的绘图单元。此外，提供了一种共享存储器，其可以直接访问主计算机，使得它可以在图形处理器执行当前命令时将下一个图形命令的参数写入共享存储器。共享存储器也可以直接访问图形处理器，使得它可以接收要从共享存储器直接执行的下一个图形命令的参数。在优选实施例中，图形上下文和共享存储器之间的图形参数的传送通过采用存储在图形上下文中的位块传送方法和掩码寄存器来实现。

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