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1. 发明授权

US08022382B2 Phase change memory devices with reduced programming current 有权
标题翻译：具有减少编程电流的相变存储器件
公开(公告)号：US08022382B2
公开(公告)日：2011-09-20
申请号：US11368192
申请日：2006-03-03
申请人： Li-Shyue Lai , Denny Duan-lee Tang , Wen-chin Lin , Teng-Chien Yu , Hui-Fang Tsai , Wei-Hsiang Wang , Shyhyeu Wang
发明人： Li-Shyue Lai , Denny Duan-lee Tang , Wen-chin Lin , Teng-Chien Yu , Hui-Fang Tsai , Wei-Hsiang Wang , Shyhyeu Wang
IPC分类号： H01L29/04 , H01L47/00
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/128 , H01L45/144 , H01L45/1666
摘要： A phase change memory device and a method of forming the same are provided. The phase change memory device includes a conducting electrode in a dielectric layer, a bottom electrode over the conducting electrode, a phase change layer over the bottom electrode, and a top electrode over the phase change layer. The phase change memory device may further include a heat sink layer between the phase change layer and the top electrode. The resistivities of the bottom electrode and the top electrode are preferably greater than the resistivity of the phase change material in the crystalline state.
摘要翻译：提供了一种相变存储器件及其形成方法。相变存储器件包括介电层中的导电电极，导电电极上的底电极，底电极上的相变层和相变层上的顶电极。相变存储器件还可以包括在相变层和顶部电极之间的散热层。底电极和顶电极的电阻率优选大于结晶态相变材料的电阻率。

2. 发明申请

US20070075347A1 Phase change memory devices with reduced programming current 有权
标题翻译：具有减少编程电流的相变存储器件
公开(公告)号：US20070075347A1
公开(公告)日：2007-04-05
申请号：US11368192
申请日：2006-03-03
申请人： Li-Shyue Lai , Denny Tang , Wen-chin Lin , Teng-Chien Yu , Hui-Fang Tsai , Wei-Hsiang Wang , Shyhyeu Wang
发明人： Li-Shyue Lai , Denny Tang , Wen-chin Lin , Teng-Chien Yu , Hui-Fang Tsai , Wei-Hsiang Wang , Shyhyeu Wang
IPC分类号： H01L47/00 , H01L29/94 , H01L27/108 , H01L29/76 , H01L31/119
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/128 , H01L45/144 , H01L45/1666
摘要： A phase change memory device and a method of forming the same are provided. The phase change memory device includes a conducting electrode in a dielectric layer, a bottom electrode over the conducting electrode, a phase change layer over the bottom electrode, and a top electrode over the phase change layer. The phase change memory device may further include a heat sink layer between the phase change layer and the top electrode. The resistivities of the bottom electrode and the top electrode are preferably greater than the resistivity of the phase change material in the crystalline state.
摘要翻译：提供了一种相变存储器件及其形成方法。相变存储器件包括介电层中的导电电极，导电电极上的底电极，底电极上的相变层和相变层上的顶电极。相变存储器件还可以包括在相变层和顶部电极之间的散热层。底电极和顶电极的电阻率优选大于结晶态相变材料的电阻率。

3. 发明授权

US08263959B2 Phase change memory device and method of manufacture thereof 有权
标题翻译：相变存储器件及其制造方法
公开(公告)号：US08263959B2
公开(公告)日：2012-09-11
申请号：US11746315
申请日：2007-05-09
申请人： Chao-Hsiung Wang , Li-Shyue Lai , Denny Tang , Wen-Chin Lin
发明人： Chao-Hsiung Wang , Li-Shyue Lai , Denny Tang , Wen-Chin Lin
IPC分类号： H01L29/04
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/148 , H01L45/1675 , H01L45/1683
摘要： A method of manufacturing a memory device is provided. The method includes forming an electrode over a substrate. The method also includes forming an opening in the electrode to provide a tapered electrode contact surface proximate the opening. The method further includes forming a phase change feature over the electrode and on the tapered electrode contact surface.
摘要翻译：提供一种制造存储器件的方法。该方法包括在衬底上形成电极。该方法还包括在电极中形成开口以提供靠近开口的锥形电极接触表面。该方法还包括在电极上和锥形电极接触表面上形成相变特征。

4. 发明授权

US07203129B2 Segmented MRAM memory array 有权
标题翻译：分段MRAM存储器阵列
公开(公告)号：US07203129B2
公开(公告)日：2007-04-10
申请号：US10780171
申请日：2004-02-16
申请人： Wen-Chin Lin , Danny D. Tang , Li-Shyue Lai
发明人： Wen-Chin Lin , Danny D. Tang , Li-Shyue Lai
IPC分类号： G11C8/00
CPC分类号： G11C11/16 , G11C2213/72 , G11C2213/74
摘要： In one example, an MRAM memory array includes a plurality of word lines, a plurality of bit lines crossing the word lines, and a plurality of first and second diodes, and magnetic tunnel junction memories. Each first diode includes a cathode, and an anode coupled to each bit line. Each second diode includes an anode, and a cathode coupled to each word line. The magnetic tunnel junction memories include a pinned layer, a free layer, and a non-magnetic layer. The non-magnetic layer is located between the pinned layer and the free layer. Each diode is positioned at crossing points of the bit lines and the word lines and connected between the first diode at the corresponding crossing bit line and the second diode at the corresponding crossing word line.
摘要翻译：在一个示例中，MRAM存储器阵列包括多个字线，与字线交叉的多个位线，以及多个第一和第二二极管以及磁性隧道结存储器。每个第一二极管包括阴极和耦合到每个位线的阳极。每个第二二极管包括阳极和耦合到每个字线的阴极。磁性隧道结存储器包括钉扎层，自由层和非磁性层。非磁性层位于被钉扎层和自由层之间。每个二极管位于位线和字线的交叉点处，并连接在相应交叉位线处的第一二极管和相应交叉字线处的第二二极管之间。

5. 发明授权

US07170775B2 MRAM cell with reduced write current 有权
标题翻译：降低写入电流的MRAM单元
公开(公告)号：US07170775B2
公开(公告)日：2007-01-30
申请号：US11030453
申请日：2005-01-06
申请人： Wen Chin Lin , Denny D. Tang , Li-Shyue Lai
发明人： Wen Chin Lin , Denny D. Tang , Li-Shyue Lai
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C5/063
摘要： A magnetic random access memory (MRAM) cell that includes an MRAM stack and a conductive line for carrying write current associated with the MRAM cell. The conductive line is oriented in a direction that is angularly offset from an easy axis of the MRAM stack by an acute angle, such as about 45 degrees.
摘要翻译：磁性随机存取存储器（MRAM）单元，其包括用于承载与MRAM单元相关联的写入电流的MRAM堆叠和导线。导线沿着与MRAM堆叠的容易轴成角度偏移的方向定向为锐角，例如约45度。

6. 发明授权

US07151271B2 System and method for passing high energy particles through a mask 有权
标题翻译：将高能粒子通过掩模的系统和方法
公开(公告)号：US07151271B2
公开(公告)日：2006-12-19
申请号：US10681541
申请日：2003-10-08
申请人： Chao-Hsiung Wang , Denny Tang , Wen-Chin Lin , Li-Shyue Lai
发明人： Chao-Hsiung Wang , Denny Tang , Wen-Chin Lin , Li-Shyue Lai
IPC分类号： A61N5/00 , G21G5/00
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00
摘要： A method and system is disclosed for concentrating high energy particles on a predetermined area on a target semiconductor substrate. A high energy source for generating a predetermined amount of high energy particles, and an electro-magnetic radiation source for generating low energy beams are used together. The system also uses a mask set having at least one mask with at least one alignment area and at least one mask target area thereon, the mask target area passing more high energy particles then any other area of the mask. At least one protection shield is incorporated in the system for protecting the alignment area from being exposed to the high energy particles, wherein the mask is aligned with the predetermined target semiconductor substrate by passing the low energy beams through the alignment area, wherein the high energy particles generated by the high energy source pass through the mask target area to land on the predetermined area on the target semiconductor substrate.
摘要翻译：公开了一种用于将高能粒子集中在目标半导体衬底上的预定区域上的方法和系统。用于产生预定量的高能粒子的高能量源和用于产生低能量束的电磁辐射源一起使用。该系统还使用具有至少一个具有至少一个对准区域和至少一个掩模目标区域的掩模的掩模组，掩模目标区域通过更多的高能粒子，然后通过掩模的任何其它区域。至少一个保护屏蔽被并入系统中，用于保护对准区域不暴露于高能粒子，其中通过使低能量束通过对准区域，掩模与预定目标半导体衬底对齐，其中高能量由高能量源产生的粒子通过掩模对象区域落在目标半导体衬底上的预定区域上。

7. 发明申请

US20050206469A1 Interdigitated capacitor and method for fabrication therof 有权
标题翻译：交叉电容器及其制造方法
公开(公告)号：US20050206469A1
公开(公告)日：2005-09-22
申请号：US10804899
申请日：2004-03-19
申请人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chung-Long Chang , Chun-Hon Chen
发明人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chung-Long Chang , Chun-Hon Chen
IPC分类号： H01L23/522 , H01P1/36
CPC分类号： H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A capacitor for use within a microelectronic product employs a first capacitor plate layer that includes a first series of horizontally separated and interconnected tines. A capacitor dielectric layer separates the first capacitor plate layer from a second capacitor plate layer. The second capacitor plate layer includes a second series of horizontally separated and interconnected tines horizontally interdigitated with the first series of horizontally separated and interconnected tines. The capacitor is formed employing a self-aligned method and the capacitor dielectric layer is formed in a serpentine shape.
摘要翻译：在微电子产品中使用的电容器采用第一电容器板层，其包括第一系列水平分离和互连的尖齿。电容器电介质层将第一电容器板层与第二电容器板层分开。第二电容器板层包括与第一系列水平分离和互相联接的齿水平地交叉指向的第二系列水平分离和互连的齿。使用自对准方法形成电容器，并且电容器介电层形成为蛇形形状。

8. 发明授权

US07436698B2 MRAM arrays and methods for writing and reading magnetic memory devices 有权
标题翻译： MRAM阵列和写入和读取磁存储器件的方法
公开(公告)号：US07436698B2
公开(公告)日：2008-10-14
申请号：US11610739
申请日：2006-12-14
申请人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chao-Hsiung Wang , Fan-Shi Jordan Lai
发明人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chao-Hsiung Wang , Fan-Shi Jordan Lai
IPC分类号： G11C11/00
CPC分类号： G11C11/1673
摘要： A non-destructive technique and related array for writing and reading magnetic memory cells, including sampling a first signal of a selected read line corresponding to select memory cells, applying a magnetic field to the select memory cells, sampling a second signal of the selected read line, and comparing the first and second signals to determine a logic state of the select memory cells.
摘要翻译：一种用于写入和读取磁存储单元的非破坏性技术和相关阵列，包括对与选择存储器单元相对应的所选读取行的第一信号进行采样，向选择存储单元施加磁场，对所选择的读取的第二信号并且比较第一和第二信号以确定选择存储器单元的逻辑状态。

9. 发明申请

US20050243598A1 MRAM arrays and methods for writing and reading magnetic memory devices 有权
标题翻译： MRAM阵列和写入和读取磁存储器件的方法
公开(公告)号：US20050243598A1
公开(公告)日：2005-11-03
申请号：US11115422
申请日：2005-04-27
申请人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chao-Hsiung Wang , Fang-Shi Lai
发明人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chao-Hsiung Wang , Fang-Shi Lai
IPC分类号： G11C11/00 , G11C11/16
CPC分类号： G11C11/1673
摘要： A non-destructive technique and related array for writing and reading magnetic memory cells, including sampling a first signal of a selected read line corresponding to select memory cells, applying a magnetic field to the select memory cells, sampling a second signal of the selected read line, and comparing the first and second signals to determine a logic state of the select memory cells.
摘要翻译：一种用于写入和读取磁存储单元的非破坏性技术和相关阵列，包括对与选择存储器单元相对应的所选读取行的第一信号进行采样，向选择存储单元施加磁场，对所选择的读取的第二信号并且比较第一和第二信号以确定选择存储器单元的逻辑状态。

10. 发明申请

US20050180203A1 Segmented MRAM memory array 有权
标题翻译：分段MRAM存储器阵列
公开(公告)号：US20050180203A1
公开(公告)日：2005-08-18
申请号：US10780171
申请日：2004-02-16
申请人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai
发明人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai
IPC分类号： G11C11/14 , G11C11/16
CPC分类号： G11C11/16 , G11C2213/72 , G11C2213/74
摘要： In one example, an MRAM memory array includes a plurality of word lines, a plurality of bit lines crossing the word lines, and a plurality of first and second diodes, and magnetic tunnel junction memories. Each first diode includes a cathode, and an anode coupled to each bit line. Each second diode includes an anode, and a cathode coupled to each word line. The magnetic tunnel junction memories include a pinned layer, a free layer, and a non-magnetic layer. The non-magnetic layer is located between the pinned layer and the free layer. Each diode is positioned at crossing points of the bit lines and the word lines and connected between the first diode at the corresponding crossing bit line and the second diode at the corresponding crossing word line.
摘要翻译：在一个示例中，MRAM存储器阵列包括多个字线，与字线交叉的多个位线，以及多个第一和第二二极管以及磁性隧道结存储器。每个第一二极管包括阴极和耦合到每个位线的阳极。每个第二二极管包括阳极和耦合到每个字线的阴极。磁性隧道结存储器包括钉扎层，自由层和非磁性层。非磁性层位于被钉扎层和自由层之间。每个二极管位于位线和字线的交叉点处，并连接在相应交叉位线处的第一二极管和相应交叉字线处的第二二极管之间。

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