专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20050206469A1 Interdigitated capacitor and method for fabrication therof 有权
标题翻译：交叉电容器及其制造方法
公开(公告)号：US20050206469A1
公开(公告)日：2005-09-22
申请号：US10804899
申请日：2004-03-19
申请人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chung-Long Chang , Chun-Hon Chen
发明人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chung-Long Chang , Chun-Hon Chen
IPC分类号： H01L23/522 , H01P1/36
CPC分类号： H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A capacitor for use within a microelectronic product employs a first capacitor plate layer that includes a first series of horizontally separated and interconnected tines. A capacitor dielectric layer separates the first capacitor plate layer from a second capacitor plate layer. The second capacitor plate layer includes a second series of horizontally separated and interconnected tines horizontally interdigitated with the first series of horizontally separated and interconnected tines. The capacitor is formed employing a self-aligned method and the capacitor dielectric layer is formed in a serpentine shape.
摘要翻译：在微电子产品中使用的电容器采用第一电容器板层，其包括第一系列水平分离和互连的尖齿。电容器电介质层将第一电容器板层与第二电容器板层分开。第二电容器板层包括与第一系列水平分离和互相联接的齿水平地交叉指向的第二系列水平分离和互连的齿。使用自对准方法形成电容器，并且电容器介电层形成为蛇形形状。

2. 发明授权

US07035083B2 Interdigitated capacitor and method for fabrication thereof 有权
标题翻译：交叉电容器及其制造方法
公开(公告)号：US07035083B2
公开(公告)日：2006-04-25
申请号：US10804899
申请日：2004-03-19
申请人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chung-Long Chang , Chun-Hon Chen
发明人： Wen-Chin Lin , Denny Tang , Li-Shyue Lai , Chung-Long Chang , Chun-Hon Chen
IPC分类号： H01G4/06
CPC分类号： H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A capacitor for use within a microelectronic product employs a first capacitor plate layer that includes a first series of horizontally separated and interconnected tines. A capacitor dielectric layer separates the first capacitor plate layer from a second capacitor plate layer. The second capacitor plate layer includes a second series of horizontally separated and interconnected tines horizontally interdigitated with the first series of horizontally separated and interconnected tines. The capacitor is formed employing a self-aligned method and the capacitor dielectric layer is formed in a serpentine shape.
摘要翻译：在微电子产品中使用的电容器采用第一电容器板层，其包括第一系列水平分离和互连的尖齿。电容器电介质层将第一电容器板层与第二电容器板层分开。第二电容器板层包括与第一系列水平分离和互相联接的齿水平地交叉指向的第二系列水平分离和互连的齿。使用自对准方法形成电容器，并且电容器介电层形成为蛇形形状。

3. 发明授权

US07050290B2 Integrated capacitor 有权
标题翻译：集成电容
公开(公告)号：US07050290B2
公开(公告)日：2006-05-23
申请号：US10768916
申请日：2004-01-30
申请人： Denny Tang , Wen-Chin Lin , Li-Shyue Lai , Chun-Hon Chen , Chung-Long Chang
发明人： Denny Tang , Wen-Chin Lin , Li-Shyue Lai , Chun-Hon Chen , Chung-Long Chang
IPC分类号： H01G4/008 , H01G4/20
CPC分类号： H01L28/60 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A new capacitor device having two terminals is achieved. The device comprises a plurality of first conductive lines overlying a substrate. Each of the first conductive lines is connected to one of the capacitor device terminals. The adjacent first conductive lines are connected to opposite terminals. The first conductive lines comprise a plurality of conductive materials. A plurality of second conductive lines overlie the plurality of first conductive lines. Each of the second conductive lines is connected to one of the capacitive device terminals. Adjacent second conductive lines are connected to opposite terminals. Any second conductive line overlying any first conductive line is connected to an opposite terminal. The second conductive lines comprises a plurality of conductive materials. A first dielectric layer overlies the substrate and lies between the adjacent first conductive lines. A second dielectric layer lies between the first conductive lines and the second conductive lines.
摘要翻译：实现了具有两个端子的新的电容器装置。该器件包括覆盖衬底的多个第一导电线。每个第一导线连接到电容器装置端子之一。相邻的第一导线连接到相对的端子。第一导线包括多个导电材料。多个第二导线覆盖多个第一导线。每个第二导线连接到电容器件端子中的一个。相邻的第二导线连接到相对的端子。覆盖任何第一导线的任何第二导线连接到相对的端子。第二导线包括多个导电材料。第一电介质层覆盖在基板之间并且位于相邻的第一导电线之间。第二介电层位于第一导线和第二导线之间。

4. 发明申请

US20050168914A1 Integrated capacitor 有权
标题翻译：集成电容
公开(公告)号：US20050168914A1
公开(公告)日：2005-08-04
申请号：US10768916
申请日：2004-01-30
申请人： Denny Tang , Wen-Chin Lin , Li-Shyue Lai , Chun-Hon Chen , Chung-Long Chang
发明人： Denny Tang , Wen-Chin Lin , Li-Shyue Lai , Chun-Hon Chen , Chung-Long Chang
IPC分类号： H01G4/228 , H01L21/02 , H01L23/522
CPC分类号： H01L28/60 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A new capacitor device having two terminals is achieved. The device comprises a plurality of first conductive lines overlying a substrate. Each of the first conductive lines is connected to one of the capacitor device terminals. The adjacent first conductive lines are connected to opposite terminals. The first conductive lines comprise a plurality of conductive materials. A plurality of second conductive lines overlie the plurality of first conductive lines. Each of the second conductive lines is connected to one of the capacitive device terminals. Adjacent second conductive lines are connected to opposite terminals. Any second conductive line overlying any first conductive line is connected to an opposite terminal. The second conductive lines comprises a plurality of conductive materials. A first dielectric layer overlies the substrate and lies between the adjacent first conductive lines. A second dielectric layer lies between the first conductive lines and the second conductive lines.
摘要翻译：实现了具有两个端子的新的电容器装置。该器件包括覆盖衬底的多个第一导电线。每个第一导线连接到电容器装置端子之一。相邻的第一导线连接到相对的端子。第一导线包括多个导电材料。多个第二导线覆盖多个第一导线。每个第二导线连接到电容器件端子中的一个。相邻的第二导线连接到相对的端子。覆盖任何第一导线的任何第二导线连接到相对的端子。第二导线包括多个导电材料。第一电介质层覆盖在基板之间并且位于相邻的第一导电线之间。第二介电层位于第一导线和第二导线之间。

5. 发明申请

US20050077581A1 Metal-over-metal devices and the method for manufacturing same 有权
公开(公告)号：US20050077581A1
公开(公告)日：2005-04-14
申请号：US10683900
申请日：2003-10-10
申请人： Chung-Long Chang , Chun-Hon Chen
发明人： Chung-Long Chang , Chun-Hon Chen
IPC分类号： H01L23/522 , H01L29/76
CPC分类号： H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A metal-over-metal (MOM) device and the method for manufacturing same is provided. The device has at least one device cell on a first layer comprising a frame piece and a center piece surrounded by the frame piece. The center piece has a cross-shape center portion defining four quadrants of space between the frame and center pieces. The center piece has one or more center fingers each extending from at least one of the four ends thereof within a quadrant. The frame piece also has one or more frame fingers extending therefrom, each being in at least one quadrant and not being overlapped with the center finger in the same quadrant.

6. 发明授权

US06949781B2 Metal-over-metal devices and the method for manufacturing same 有权
标题翻译：金属金属器件及其制造方法
公开(公告)号：US06949781B2
公开(公告)日：2005-09-27
申请号：US10683900
申请日：2003-10-10
申请人： Chung-Long Chang , Chun-Hon Chen
发明人： Chung-Long Chang , Chun-Hon Chen
IPC分类号： H01L23/522 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A metal-over-metal (MOM) device and the method for manufacturing same is provided. The device has at least one device cell on a first layer comprising a frame piece and a center piece surrounded by the frame piece. The center piece has a cross-shape center portion defining four quadrants of space between the frame and center pieces. The center piece has one or more center fingers each extending from at least one of the four ends thereof within a quadrant. The frame piece also has one or more frame fingers extending therefrom, each being in at least one quadrant and not being overlapped with the center finger in the same quadrant.
摘要翻译：提供金属金属（MOM）器件及其制造方法。该设备在第一层上具有至少一个设备单元，该设备单元包括框架件和被框架件包围的中心件。中心件具有在框架和中心件之间限定四个空间象限的十字形中心部分。中心件具有一个或多个中心指，每个中指在其四分之一的四个端部中的至少一个上延伸。框架件还具有从其延伸的一个或多个框架指状物，每个框架指状物在至少一个象限中，并且不与中心手指重叠在同一象限中。

7. 发明授权

US08169014B2 Interdigitated capacitive structure for an integrated circuit 有权
标题翻译：用于集成电路的交叉电容结构
公开(公告)号：US08169014B2
公开(公告)日：2012-05-01
申请号：US11328502
申请日：2006-01-09
申请人： Yueh-You Chen , Chung-Long Chang , Chih-Ping Chao
发明人： Yueh-You Chen , Chung-Long Chang , Chih-Ping Chao
IPC分类号： H01L29/92
CPC分类号： H01L23/5223 , H01L28/60 , H01L2924/0002 , H01L2924/00
摘要： System and method for an improved interdigitated capacitive structure for an integrated circuit. A preferred embodiment comprises a first layer of a sequence of substantially parallel interdigitated strips, each strip of either a first polarity or a second polarity, the sequence alternating between a strip of the first polarity and a strip of the second polarity. A first dielectric layer is deposited over each strip of the first layer of strips. A first extension layer of a sequence of substantially interdigitated extension strips is deposited over the first dielectric layer, each extension strip deposited over a strip of the first layer of the opposite polarity. A first sequence of vias is coupled to the first extension layer, each via deposited over an extension strip of the same polarity. A second layer of a sequence of substantially parallel interdigitated strips can be coupled to the first sequence of vias.
摘要翻译：用于集成电路的改进的互指电容结构的系统和方法。优选实施例包括基本上平行的叉指序列序列的第一层，每个条带具有第一极性或第二极性，该序列在第一极性的条带和第二极性的条之间交替。第一介电层沉积在第一层条带的每条上。基本上交错的延伸条的序列的第一延伸层沉积在第一介电层上，每个延伸条沉积在具有相反极性的第一层的条上。通孔的第一序列耦合到第一延伸层，每个通孔沉积在相同极性的延伸条上。基本上平行的叉指序列序列的第二层可以耦合到第一序列通孔。

8. 发明申请

US20090212392A1 Capacitor Pairs with Improved Mismatch Performance 有权
标题翻译：具有改进的不匹配性能的电容对
公开(公告)号：US20090212392A1
公开(公告)日：2009-08-27
申请号：US12463949
申请日：2009-05-11
申请人： Chia-Yi Chen , Chung-Long Chang , Chih-Ping Chao
发明人： Chia-Yi Chen , Chung-Long Chang , Chih-Ping Chao
IPC分类号： H01L29/92
CPC分类号： H01L23/5223 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first capacitor comprising a plurality of first unit capacitors interconnected to each other, each having a first unit capacitance; and a second capacitor comprising a plurality of second unit capacitors interconnected to each other, each having a second unit capacitance, wherein the first unit capacitors and the second unit capacitors have equal numbers of unit capacitors. The first unit capacitors and the second unit capacitors are arranged in an array with rows and columns and placed in an alternating pattern in each row and each column. The first and the second unit capacitors each have a total number greater than two.
摘要翻译：半导体器件包括：第一电容器，包括彼此互连的多个第一单位电容器，每个具有第一单位电容; 以及包括彼此互连的多个第二单位电容器的第二电容器，每个具有第二单位电容，其中所述第一单位电容器和所述第二单位电容器具有相等数目的单位电容器。第一单元电容器和第二单元电容器以具有行和列的阵列排列并且以每行和每列置于交替图案中。第一和第二单元电容器的总数大于2。

9. 发明授权

US07545022B2 Capacitor pairs with improved mismatch performance 有权
标题翻译：具有改善失配性能的电容对
公开(公告)号：US07545022B2
公开(公告)日：2009-06-09
申请号：US11591644
申请日：2006-11-01
申请人： Chia-Yi Chen , Chung-Long Chang , Chih-Ping Chao
发明人： Chia-Yi Chen , Chung-Long Chang , Chih-Ping Chao
IPC分类号： H01L29/00
CPC分类号： H01L23/5223 , H01L27/0805 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first capacitor comprising a plurality of first unit capacitors interconnected to each other, each having a first unit capacitance; and a second capacitor comprising a plurality of second unit capacitors interconnected to each other, each having a second unit capacitance, wherein the first unit capacitors and the second unit capacitors have equal numbers of unit capacitors. The first unit capacitors and the second unit capacitors are arranged in an array with rows and columns and placed in an alternating pattern in each row and each column. The first and the second unit capacitors each have a total number greater than two.
摘要翻译：半导体器件包括：第一电容器，包括彼此互连的多个第一单位电容器，每个具有第一单位电容; 以及包括彼此互连的多个第二单位电容器的第二电容器，每个具有第二单位电容，其中所述第一单位电容器和所述第二单位电容器具有相等数目的单位电容器。第一单元电容器和第二单元电容器以具有行和列的阵列排列并且以每行和每列置于交替图案中。第一和第二单元电容器的总数大于2。

10. 发明申请

US20060180895A1 Capacitor device with vertically arranged capacitor regions of various kinds 有权
标题翻译：具有各种垂直排列的电容器区域的电容器件
公开(公告)号：US20060180895A1
公开(公告)日：2006-08-17
申请号：US11055933
申请日：2005-02-11
申请人： Yueh-You Chen , Chung-Long Chang , Chih-Ping Chao , Chun-Hong Chen
发明人： Yueh-You Chen , Chung-Long Chang , Chih-Ping Chao , Chun-Hong Chen
IPC分类号： H01L29/93
CPC分类号： H01L23/5223 , H01L23/5225 , H01L27/0805 , H01L27/0808 , H01L28/40 , H01L29/93 , H01L2924/0002 , H01L2924/00
摘要： A capacitor device selectively combines MOM, MIM and varactor regions in the same layout area of an IC. Two or more types of capacitor regions arranged vertically on a substrate to form the capacitor device. This increase the capacitance per unit of the capacitor device, without occupying an extra layout area.
摘要翻译：电容器器件在IC的相同布局区域中选择性地组合MOM，MIM和变容二极管区域。两个或多个类型的电容器区域垂直布置在衬底上以形成电容器器件。这增加了电容器单元的电容，而不占用额外的布局面积。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式