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1. 发明授权

US07496880B2 Method and apparatus for assessing the quality of a process model 有权
标题翻译：评估过程模型质量的方法和装置
公开(公告)号：US07496880B2
公开(公告)日：2009-02-24
申请号：US11243306
申请日：2005-10-03
申请人： Lawrence S. Melvin, III , Qiliang Yan
发明人： Lawrence S. Melvin, III , Qiliang Yan
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/68
摘要： One embodiment of the present invention provides a system that assesses the quality of a process model. During operation, the system receives a mask layout and additionally receives a process model that models the effects of one or more semiconductor manufacturing processes on the mask layout. Next, the system computes a gradient of the process model with respect to a process model parameter. The system then computes a quality indicator at an evaluation point in the mask layout using the gradient of the process model and the mask layout. Next, the system assesses the quality of the process model using the quality indicator. In one embodiment, the system assesses the quality of the process model by comparing the quality indicator with a threshold.
摘要翻译：本发明的一个实施例提供了一种评估过程模型的质量的系统。在操作期间，系统接收掩模布局，并且另外接收对掩模布局中的一个或多个半导体制造工艺的影响进行建模的过程模型。接下来，系统计算相对于过程模型参数的过程模型的梯度。然后，系统使用过程模型和掩模布局的梯度在掩模布局中的评估点处计算质量指标。接下来，系统使用质量指标来评估过程模型的质量。在一个实施例中，系统通过将质量指标与阈值进行比较来评估过程模型的质量。

2. 发明授权

US08184897B2 Method and apparatus for determining an optical threshold and a resist bias 有权
标题翻译：用于确定光学阈值和抗蚀剂偏压的方法和装置
公开(公告)号：US08184897B2
公开(公告)日：2012-05-22
申请号：US12244178
申请日：2008-10-02
申请人： Jianliang Li , Lawrence S. Melvin, III , Qiliang Yan
发明人： Jianliang Li , Lawrence S. Melvin, III , Qiliang Yan
IPC分类号： G06K9/00
CPC分类号： G03F7/70666 , G03F7/705
摘要： One embodiment of the present invention provides techniques and systems for determining modeling parameters for a photolithography process. During operation, the system can receive a layout. Next, the system can determine an iso-focal pattern in the layout. The system can then determine multiple aerial-image-intensity values in proximity to the iso-focal pattern by convolving the layout with multiple optical models, wherein the multiple optical models model the photolithography process's optical system under different focus conditions. Next, the system can determine a location in proximity to the iso-focal pattern where the aerial-image-intensity values are substantially insensitive to focus variations. The system can then use the location and the associated aerial-image-intensity values to determine an optical threshold and a resist bias. The optical threshold and the resist bias can then be used for modeling the photolithography process.
摘要翻译：本发明的一个实施例提供了用于确定光刻工艺的建模参数的技术和系统。在操作过程中，系统可以接收布局。接下来，系统可以确定布局中的等焦点图案。然后，系统可以通过使用多个光学模型卷积布局来确定邻近等焦线图案的多个空间图像强度值，其中多个光学模型在不同的聚焦条件下对光刻工艺的光学系统建模。接下来，系统可以确定靠近等焦点图案的位置，其中空间图像强度值对聚焦变化基本上不敏感。然后，系统可以使用位置和相关联的空中图像强度值来确定光学阈值和抗蚀剂偏压。然后可以将光学阈值和抗蚀剂偏压用于对光刻工艺进行建模。

3. 发明授权

US07721246B2 Method and apparatus for quickly determining the effect of placing an assist feature at a location in a layout 有权
标题翻译：用于快速确定将辅助特征放置在布局中的位置的效果的方法和装置
公开(公告)号：US07721246B2
公开(公告)日：2010-05-18
申请号：US11584737
申请日：2006-10-19
申请人： Jianliang Li , Qiliang Yan , Lawrence S. Melvin, III , Levi D. Barnes , Abani M. Biswas , Alakananda A. Biswas, legal representative
发明人： Jianliang Li , Qiliang Yan , Lawrence S. Melvin, III , Levi D. Barnes , Abani M. Biswas
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G03F1/36 , G03F7/705
摘要： One embodiment of the present invention determines the effect of placing an assist feature at a location in a layout. During operation, the system receives a first value which was pre-computed by convolving a model with a layout at an evaluation point, wherein the model models semiconductor manufacturing processes. Next, the system determines a second value by convolving the model with an assist feature, which is assumed to be located at a first location which is in proximity to the evaluation point. The system then determines the effect of placing an assist feature using the first value and the second value. An embodiment of the present invention can be used to determine a substantially optimal location for placing an assist feature in a layout.
摘要翻译：本发明的一个实施例确定了在布局中的位置放置辅助特征的效果。在操作期间，系统接收通过在评估点卷积具有布局的模型而预先计算的第一值，其中模型对半导体制造过程进行建模。接下来，系统通过将模型与辅助特征进行卷积来确定第二值，所述辅助特征被假设为位于靠近评估点的第一位置。然后，系统使用第一值和第二值确定放置辅助特征的效果。可以使用本发明的实施例来确定用于将辅助特征放置在布局中的基本最佳位置。

4. 发明申请

US20100086196A1 METHOD AND APPARATUS FOR DETERMINING AN OPTICAL THRESHOLD AND A RESIST BIAS 有权
标题翻译：用于确定光学阈值和抗偏差的方法和装置
公开(公告)号：US20100086196A1
公开(公告)日：2010-04-08
申请号：US12244178
申请日：2008-10-02
申请人： Jianliang Li , Lawrence S. Melvin III , Qiliang Yan
发明人： Jianliang Li , Lawrence S. Melvin III , Qiliang Yan
IPC分类号： G06K9/00
CPC分类号： G03F7/70666 , G03F7/705
摘要： One embodiment of the present invention provides techniques and systems for determining modeling parameters for a photolithography process. During operation, the system can receive a layout. Next, the system can determine an iso-focal pattern in the layout. The system can then determine multiple aerial-image-intensity values in proximity to the iso-focal pattern by convolving the layout with multiple optical models, wherein the multiple optical models model the photolithography process's optical system under different focus conditions. Next, the system can determine a location in proximity to the iso-focal pattern where the aerial-image-intensity values are substantially insensitive to focus variations. The system can then use the location and the associated aerial-image-intensity values to determine an optical threshold and a resist bias. The optical threshold and the resist bias can then be used for modeling the photolithography process.
摘要翻译：本发明的一个实施例提供了用于确定光刻工艺的建模参数的技术和系统。在操作过程中，系统可以接收布局。接下来，系统可以确定布局中的等焦点图案。然后，系统可以通过使用多个光学模型卷积布局来确定邻近等焦线图案的多个空间图像强度值，其中多个光学模型在不同的聚焦条件下对光刻工艺的光学系统建模。接下来，系统可以确定靠近等焦点图案的位置，其中空间图像强度值对聚焦变化基本上不敏感。然后，系统可以使用位置和相关联的空中图像强度值来确定光学阈值和抗蚀剂偏压。然后可以将光学阈值和抗蚀剂偏压用于对光刻工艺进行建模。

5. 发明授权

US07243332B2 Method and apparatus for identifying a manufacturing problem area in a layout using a gradient-magnitude of a process-sensitivity model 失效
标题翻译：使用过程敏感度模型的梯度大小来识别布局中的制造问题区域的方法和装置
公开(公告)号：US07243332B2
公开(公告)日：2007-07-10
申请号：US11083656
申请日：2005-03-17
申请人： Lawrence S. Melvin, III , James P. Shiely , Qiliang Yan
发明人： Lawrence S. Melvin, III , James P. Shiely , Qiliang Yan
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G03F7/70433 , G03F7/705 , G06F2217/12 , Y02P90/265
摘要： One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout.
摘要翻译：本发明的一个实施例提供一种识别掩模布局中可能导致制造问题的区域的系统。在运行期间，系统创建一个目标过程模型，在标称工艺条件下对半导体制造工艺进行建模。该系统还创建一个或多个非目标工艺模型，其在一个或多个任意工艺条件下对半导体制造工艺进行建模。接下来，系统使用目标过程模型和离靶过程模型来计算过程敏感度模型。系统然后计算过程敏感性模型的梯度大小。接下来，系统使用过程敏感度模型的梯度大小来识别掩模布局中的问题区域。识别问题区域可以对其进行修正，从而提高了掩模布局的可制造性。

6. 发明授权

US07320119B2 Method and apparatus for identifying a problem edge in a mask layout using an edge-detecting process-sensitivity model 有权
标题翻译：使用边缘检测处理敏感度模型来识别掩模布局中的问题边缘的方法和装置
公开(公告)号：US07320119B2
公开(公告)日：2008-01-15
申请号：US11124328
申请日：2005-05-06
申请人： Lawrence S. Melvin, III , James P. Shiely , Qiliang Yan , Benjamin D. Painter
发明人： Lawrence S. Melvin, III , James P. Shiely , Qiliang Yan , Benjamin D. Painter
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G03F7/70433 , G03F7/705 , G06F2217/12 , Y02P90/265
摘要： One embodiment of the present invention provides a system that identifies a problem edge in a mask layout which is likely to have manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more process conditions that are different from nominal process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes an edge-detecting process-sensitivity model by convolving the process-sensitivity model with an edge-detecting function which can be used to detect edges in an image. Next, the system identifies a problem edge in the mask layout using the edge-detecting process-sensitivity model.
摘要翻译：本发明的一个实施例提供一种识别可能具有制造问题的掩模布局中的问题边缘的系统。在运行期间，系统创建一个目标过程模型，在标称工艺条件下对半导体制造工艺进行建模。该系统还创建一个或多个偏离目标的过程模型，其在与标称工艺条件不同的一个或多个工艺条件下对半导体制造工艺进行建模。接下来，系统使用目标过程模型和离靶过程模型来计算过程敏感度模型。然后，该系统通过使用可用于检测图像中的边缘的边缘检测功能来卷积过程敏感度模型来计算边缘检测过程敏感性模型。接下来，系统使用边缘检测过程敏感度模型识别掩模布局中的问题边缘。

7. 发明授权

US07308673B2 Method and apparatus for correcting 3D mask effects 有权
标题翻译：用于校正3D蒙版效果的方法和装置
公开(公告)号：US07308673B2
公开(公告)日：2007-12-11
申请号：US11033415
申请日：2005-01-10
申请人： Lawrence S. Melvin, III , Qiliang Yan , James P. Shiely
发明人： Lawrence S. Melvin, III , Qiliang Yan , James P. Shiely
IPC分类号： G06F17/50 , G03F1/00
CPC分类号： G03F1/34 , G03F1/28 , G03F1/36
摘要： One embodiment of the present invention provides a system that improves lithography performance by correcting for 3D mask effects. During operation the system receives a mask layout that contains etched regions, called shifters, which can have a phase shift relative to other regions. Next, the system chooses a shifter in the mask layout. The system then corrects for 3D mask effects by, iteratively, (a) selecting a region within the shifter, (b) adjusting the phase shift of the selected region in a simulation model to account for 3D mask effects, and (c) modifying the shape of the shifter based on the difference between a desired pattern and a simulated pattern generated using the simulation model.
摘要翻译：本发明的一个实施例提供一种通过校正3D掩模效应来提高光刻性能的系统。在操作期间，系统接收包含称为移位器的蚀刻区域的掩模布局，其可以相对于其他区域具有相移。接下来，系统在掩模布局中选择移位器。然后，系统通过迭代地（a）选择移位器内的区域来校正3D掩模效应，（b）在模拟模型中调整所选择的区域的相移以考虑3D掩模效应，以及（c）修改基于期望图案与使用仿真模型生成的模拟图案之间的差异的移位器的形状。

8. 发明授权

US07933471B2 Method and system for correlating physical model representation to pattern layout 有权
标题翻译：将物理模型表示与模式布局相关联的方法和系统
公开(公告)号：US07933471B2
公开(公告)日：2011-04-26
申请号：US11716511
申请日：2007-03-09
申请人： Jianliang Li , Qiliang Yan , Lawrence S. Melvin, III , James P. Shiely
发明人： Jianliang Li , Qiliang Yan , Lawrence S. Melvin, III , James P. Shiely
IPC分类号： G06K9/00 , G06K9/36 , G06K9/64
CPC分类号： G02B27/0012 , G03F1/36
摘要： One embodiment of the present invention provides a system that reduces computational complexity in simulating an image resulting from an original mask and an optical transmission system. During operation, the system obtains a set transmission cross coefficient (TCC) kernel functions based on the optical transmission system, and obtains a set of transmission functions for a representative pattern which contains features representative of the original mask. The system constructs a new set of kernel functions based on the TCC kernel functions and the transmission functions for the representative pattern, wherein responses to the new kernel functions in a resulting image corresponding to the representative pattern are substantially uncorrelated with one another. The system further produces an intensity distribution of a resulting image corresponding to the original mask based on the new kernel functions, thereby facilitating prediction of a layout that can be produced from the original mask.
摘要翻译：本发明的一个实施例提供一种降低模拟由原始掩模和光传输系统产生的图像的计算复杂性的系统。在运行过程中，系统基于光传输系统获得设置的传输交叉系数（TCC）核函数，并获得一组代表性模式的传输函数，其中代表性模式包含代表原始掩码的特征。该系统基于TCC内核功能和代表性模式的传输功能构建新的一组内核函数，其中对应于代表性模式的所得图像中对新内核功能的响应基本上彼此不相关。该系统进一步基于新的内核函数产生对应于原始掩码的结果图像的强度分布，从而有助于预测可以从原始掩模产生的布局。

9. 发明授权

US07784018B2 Method and apparatus for identifying a manufacturing problem area in a layout using a gradient-magnitude of a process-sensitivity model 有权
标题翻译：使用过程敏感度模型的梯度大小来识别布局中的制造问题区域的方法和装置
公开(公告)号：US07784018B2
公开(公告)日：2010-08-24
申请号：US11801350
申请日：2007-05-08
申请人： Lawrence S. Melvin, III , James P. Shiely , Qiliang Yan
发明人： Lawrence S. Melvin, III , James P. Shiely , Qiliang Yan
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G03F7/70433 , G03F7/705 , G06F2217/12 , Y02P90/265
摘要： One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout. Moreover, using the gradient-magnitude of the process-sensitivity model to identify the problem area reduces the computational time required to identify the problem area.
摘要翻译：本发明的一个实施例提供一种识别掩模布局中可能导致制造问题的区域的系统。在运行期间，系统创建了一个目标过程模型，在标称（例如，最佳）工艺条件下对半导体制造工艺进行建模。该系统还创建一个或多个非目标过程模型，其在一个或多个任意（例如，非最优））工艺条件下对半导体制造过程进行建模。接下来，系统使用目标过程模型和离靶过程模型来计算过程敏感度模型。系统然后计算过程敏感性模型的梯度大小。接下来，系统使用过程敏感度模型的梯度大小来识别掩模布局中的问题区域。请注意，识别问题区域可以对其进行更正，从而提高了掩模布局的可制造性。此外，使用过程敏感度模型的梯度大小来识别问题区域减少了识别问题区域所需的计算时间。

10. 发明授权

US07739645B2 Method and apparatus for determining a process model using a 2-D-pattern detecting kernel 有权
标题翻译：用于使用2-D图案检测内核确定过程模型的方法和装置
公开(公告)号：US07739645B2
公开(公告)日：2010-06-15
申请号：US11800171
申请日：2007-05-04
申请人： Jianliang Li , Qiliang Yan , Lawrence S. Melvin, III
发明人： Jianliang Li , Qiliang Yan , Lawrence S. Melvin, III
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/10
摘要： One embodiment provides a system for determining an improved process model that models one or more semiconductor manufacturing processes. During operation, the system can receive a first process model. Next, the system can receive a 2-D-pattern detecting kernel which can detect 2-D patterns. The system can then receive a second set of empirical data which is associated with 2-D patterns in a test layout. Next, the system can determine an improved process model using the first process model, the 2-D-pattern detecting kernel, the test layout, and the second set of empirical data.
摘要翻译：一个实施例提供了一种用于确定对一个或多个半导体制造工艺进行建模的改进的工艺模型的系统。在运行过程中，系统可以接收第一个流程模型。接下来，系统可以接收可以检测2-D图案的2-D图案检测内核。然后，系统可以接收与测试布局中的2-D模式相关联的第二组经验数据。接下来，系统可以使用第一过程模型，2-D模式检测内核，测试布局和第二组经验数据来确定改进的过程模型。

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