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1. 发明申请

US20120271822A1 SYSTEM FOR ESTABLISHING PREFERRED CONTACTS FOR A CENTRAL USER OF A MOBILE COMMUNICATION DEVICE 审中-公开
标题翻译：为移动通信设备的中心用户建立优先联系人的系统
公开(公告)号：US20120271822A1
公开(公告)日：2012-10-25
申请号：US13093255
申请日：2011-04-25
申请人： Lauren E. Schwendimann , Johnny C. Chen , Alan J. Chou , Nathan J. Fortin
发明人： Lauren E. Schwendimann , Johnny C. Chen , Alan J. Chou , Nathan J. Fortin
IPC分类号： G06F17/30
CPC分类号： H04M1/72566 , H04M1/274583 , H04M1/72569 , H04M1/72572
摘要： A system is implemented on a mobile communication device for establishing preferred contacts for a central user of the mobile communication device. The system comprises a data collection device that captures the central user's interaction with other users on a network according to frequency during situational factors; and a query apparatus that inquires, for current situational factors, which contacts are preferred that the central user will communicate with based on central user's past interactions during same situational factors that correspond only to the central user. A list is provided to the central user of one or more of the preferred contacts that the central user selects from; and an application launcher is communicatively coupled to the list for display of the list of preferred contacts that are also functionally related to the application launcher.
摘要翻译：在移动通信设备上实现系统，用于为移动通信设备的中央用户建立优选的联系人。该系统包括数据采集装置，其在情境因素下根据频率捕获中心用户与网络上的其他用户的交互; 以及查询装置，根据当前的情境因素，在相应的情景因素仅对应于中央用户的情况下，根据中心用户的过往交互，查询哪些联系人优先中央用户将进行通信。向中央用户提供中央用户选择的一个或多个优选联系人的列表; 并且应用启动器通信地耦合到列表以显示也与应用启动器功能相关的优选联系人列表。

2. 发明授权

US5373408A Configuring domain pattern in thin films of magnetic heads 失效
标题翻译：配置磁头薄膜中的畴图案
公开(公告)号：US5373408A
公开(公告)日：1994-12-13
申请号：US251304
申请日：1994-05-31
申请人： Peter G. Bischoff , Hua-Ching Tong , Johnny C. Chen
发明人： Peter G. Bischoff , Hua-Ching Tong , Johnny C. Chen
IPC分类号： G11B5/31 , G11B5/187
CPC分类号： G11B5/3113
摘要： A thin film magnetic head is fabricated with shaping magnetic thin films, preferably formed of Permalloy, which have a stepped configuration. The thin films are deposited between the insulation layer surrounding the electrical coil and below the second pole layer P2 to form a double yoke. The thin films have corners at the stepped areas which pin the domain sites so that the magnetization of the P2 layer is properly aligned, thereby improving the data signal that is being recorded.
摘要翻译：制造具有成形磁性薄膜的薄膜磁头，优选由坡莫合金形成，其具有阶梯形结构。薄膜沉积在围绕电线圈的绝缘层和第二极层P2之下，以形成双轭。薄膜在台阶区域有拐角，这些区域引导域位点，使得P2层的磁化正确对准，从而改善正在记录的数据信号。

3. 发明授权

US5867430A Bank architecture for a non-volatile memory enabling simultaneous reading and writing 失效
标题翻译：用于非易失性存储器的银行体系结构，可同时读写
公开(公告)号：US5867430A
公开(公告)日：1999-02-02
申请号：US772131
申请日：1996-12-20
申请人： Johnny C. Chen , Chung K. Chang , Tiao-Hua Kuo , Takao Akaogi
发明人： Johnny C. Chen , Chung K. Chang , Tiao-Hua Kuo , Takao Akaogi
IPC分类号： G11C16/02 , G11C16/06 , G11C16/10 , G06F12/00 , G11C7/00
CPC分类号： G11C16/10 , G11C2216/22
摘要： A flash memory device is divided into two or more banks. Each bank includes a number of sectors. Each sector includes flash memory cells. Each bank has a decoder that selectively receives an address from an input address buffer or from an internal address sequencer controlled by an internal state machine. The output data for each bank can be communicated to a read sense amplifier or a verify sense amplifier. The read sense amplifier connects to the output buffer while the verify sense amplifier connects to the state machine. When one bank receives a write command, the internal state machine takes control and starts the program or erase operation. While one bank is busy with a program or erase operation, the other bank can be accessed for a read operation. Power is supplied for each of the read and write operations via an internal multiplexed multi power supply source that provides an amount of power needed based on the memory operation being performed.
摘要翻译：闪存器件分为两个或更多个存储体。每个银行都包括一些行业。每个扇区包括闪存单元。每个存储体都有一个解码器，可选择性地从输入地址缓冲区或由内部状态机控制的内部地址排序器接收地址。每个存储体的输出数据可以传送到读出读出放大器或校验读出放大器。读出放大器连接到输出缓冲器，而验证放大器连接到状态机。当一个银行收到一个写入命令时，内部状态机将进行控制并启动程序或擦除操作。当一个银行忙于编程或擦除操作时，可以访问另一个存储体进行读取操作。通过内部复用多电源提供每个读取和写入操作的电源，该内部复用多电源提供基于正在执行的存储器操作所需的功率量。

4. 发明授权

US5349558A Sector-based redundancy architecture 失效
标题翻译：基于扇区的冗余架构
公开(公告)号：US5349558A
公开(公告)日：1994-09-20
申请号：US112033
申请日：1993-08-26
申请人： Lee E. Cleveland , Michael A. Van Buskirk , Johnny C. Chen , Chung K. Chang
发明人： Lee E. Cleveland , Michael A. Van Buskirk , Johnny C. Chen , Chung K. Chang
IPC分类号： G11C17/00 , G11C16/06 , G11C29/00 , G11C29/04 , H01L21/8247 , H01L27/115 , G11C7/00
CPC分类号： G11C29/808
摘要： An improved redundancy architecture is provided for an array of flash EEPROM cells which permit repair of defective columns of memory cells in the array with redundant columns of memory cells on a sector-by-sector basis. The redundancy circuitry includes a plurality of sector-based redundancy blocks (2-8) each having redundant columns of memory cells extending through the plurality of sectors. Sector selection transistors (Q1,Q2) are provided for dividing the redundant columns into different segments, each residing in at least one of the plurality of sectors and for isolating the different segments so as to allow independent use from other segments in the same redundant column in repairing defective columns in the corresponding ones of the plurality of sectors. Addressable storage circuitry (314a,314b) is used for storing sector-based redundancy column addresses, each defining a column address containing the defective column of memory cells in the plurality of sectors in association with one of the different redundant column segments to be used in repairing the defective column.
摘要翻译：提供了一种用于快闪EEPROM单元阵列的改进的冗余架构，其允许以扇区为基础以冗余列的存储器单元来修复阵列中的存储器单元的有缺陷的列。冗余电路包括多个基于扇区的冗余块（2-8），每个冗余块具有延伸穿过多个扇区的多个存储单元冗余列。扇区选择晶体管（Q1，Q2）被提供用于将冗余列分成不同的段，每个段驻留在多个扇区中的至少一个扇区中，并且用于隔离不同的段，以允许独立使用同一冗余列中的其他段在修复多个扇区中相应的扇区中的有缺陷的列。可寻址存储电路（314a，314b）用于存储基于扇区的冗余列地址，每个定义包含多个扇区中的存储单元的缺陷列的列地址，与不同冗余列段之一相关联地使用修理有缺陷的列。

5. 发明授权

US5087332A Process for making a thin film magnetic head with single step lift-off 失效
标题翻译：制造具有单步剥离的薄膜磁头的工艺
公开(公告)号：US5087332A
公开(公告)日：1992-02-11
申请号：US740064
申请日：1991-08-05
申请人： Johnny C. Chen
发明人： Johnny C. Chen
IPC分类号： G11B5/31
CPC分类号： G11B5/3163
摘要： A process for making thin film magnetic heads includes forming a precisely defined back gap opening used for magnetic closure of the P1 and P1 pole pieces. A mushroom-like photoresist structure having a cap layer supported by a stem layer is formed over the P1 pole piece by a double resist spin and double exposure method with a critical baking step to harden previously deposited photoresist layers between the first exposure and the second photoresist spin. The cap layer defines the back gap opening. When the mushroom-like photoresist structure is removed by a single step lift-off with a solvent, the back gap opening is formed.
摘要翻译：制造薄膜磁头的方法包括形成用于P1和P1极片的磁性闭合的精确定义的背隙开口。具有由茎层支撑的盖层的蘑菇状光致抗蚀剂结构通过双重抗蚀剂旋转和双重曝光方法通过双重抗蚀剂旋转和双重曝光方法在临时烘烤步骤之上形成在P1极片上，以硬化在第一曝光和第二光致抗蚀剂之间预先沉积的光致抗蚀剂层旋转盖层限定背隙开口。当通过用溶剂的单步剥离除去蘑菇状光致抗蚀剂结构时，形成后间隙开口。

6. 发明授权

US06297993B1 Acceleration voltage implementation for a high density flash memory device 有权
标题翻译：高密度闪存器件的加速电压实现
公开(公告)号：US06297993B1
公开(公告)日：2001-10-02
申请号：US09712382
申请日：2000-11-13
申请人： Johnny C. Chen , Yasushi Kasa , Trung S. Pham
发明人： Johnny C. Chen , Yasushi Kasa , Trung S. Pham
IPC分类号： G11C1604
CPC分类号： G11C16/30 , G11C5/145
摘要： The reduction of electrical noise in a high voltage distribution path of a high density flash memory device is disclosed. High voltage brought on-chip from an external power source is transmitted over separate isolated voltage distribution paths to a voltage generator circuit. The voltage generator pumps up the voltage of one of the voltage paths and uses the pumped up voltage to control the distribution of the voltage from the other voltage path, whereby electrical noise from the voltage pump is isolated from the distributed voltage.
摘要翻译：公开了高密度闪速存储器件的高压分配路径中的电噪声的降低。来自外部电源的芯片上的高电压通过分开的隔离电压分配路径传输到电压发生器电路。电压发生器泵送一个电压路径的电压，并使用泵浦电压来控制来自另一个电压路径的电压分布，由此来自电压泵的电噪声与分布电压隔离。

7. 发明授权

US5612921A Low supply voltage negative charge pump 失效
标题翻译：低电源负电荷泵
公开(公告)号：US5612921A
公开(公告)日：1997-03-18
申请号：US559705
申请日：1996-02-15
申请人： Chung K. Chang , Johnny C. Chen , Lee E. Cleveland
发明人： Chung K. Chang , Johnny C. Chen , Lee E. Cleveland
IPC分类号： G11C5/14 , G11C16/30 , H02M3/07 , G11C13/00
CPC分类号： G11C16/30 , G11C5/145 , H02M3/073 , H02M2003/071 , H02M2003/075
摘要： A low supply voltage negative charge pump for generating a relatively high negative voltage to control gates of selected memory cells via wordlines in an array of flash EEPROM memory cells during flash erasure includes charge pump means (210) formed of a plurality of charge pump stages (201-206) and coupling capacitor means (C201-C212) for delivering clock signals to the plurality of charge pump stages. Each of the plurality of charge pump stages is formed of an N-channel intrinsic pass transistor (N1-N6), an N-channel intrinsic initialization transistor (MD1-MD6), and an N-channel intrinsic precharge transistor (MX3-MX7, MX1) which are disposed in separate p-wells so as to reduce body effect. As a result, the negative charge pump is operable using a supply voltage of +3 volts or lower.
摘要翻译：用于在闪速擦除期间通过闪存EEPROM存储器单元阵列中的字线产生相对高的负电压以控制所选择的存储器单元的栅极的低电源负电荷泵包括由多个电荷泵级形成的电荷泵装置（210） 201-206）和用于将时钟信号传送到多个电荷泵级的耦合电容器装置（C201-C212）。多个电荷泵级中的每一个由N沟道本征通过晶体管（N1-N6），N沟道本征初始化晶体管（MD1-MD6）和N沟道本征预充电晶体管（MX3-MX7， MX1），其设置在单独的p阱中，以减少身体效应。结果，负电荷泵可以使用+ 3伏或更低的电源电压工作。

8. 发明授权

US5291446A VPP power supply having a regulator circuit for controlling a regulated positive potential 失效
标题翻译： VPP电源具有用于控制调节的正电位的调节器电路
公开(公告)号：US5291446A
公开(公告)日：1994-03-01
申请号：US964684
申请日：1992-10-22
申请人： Michael A. Van Buskirk , Johnny C. Chen , Chung K. Chang , Lee E. Cleveland , Antonio Montalvo
发明人： Michael A. Van Buskirk , Johnny C. Chen , Chung K. Chang , Lee E. Cleveland , Antonio Montalvo
IPC分类号： G11C17/00 , G05F3/24 , G11C16/06 , G11C16/12 , G11C16/30 , H02M3/07 , H03K17/06 , H03K17/14 , H03K19/096 , H03L1/00
CPC分类号： G11C16/30 , G05F3/247 , G11C16/12 , H03K17/063 , H03K17/145
摘要： A positive power supply for generating and supplying a regulated positive potential to control gates of selected memory cells via word lines in an array of flash EEPROM memory cells during programming includes a clock circuit (18b) for generating a pair of non-overlapping clock signals and charge pump means (18c) responsive to an external power supply potential (VCC) and to the non-overlapping clock signals for generating a high positive voltage. A regulator circuit (20) responsive to the high positive voltage and a reference voltage is provided for controlling the regulated positive potential so that it is independent of the external power supply potential (VCC).
摘要翻译：用于在编程期间通过闪存EEPROM存储单元阵列中的字线产生和提供调节的正电位以控制所选存储单元的栅极的正电源包括用于产生一对非重叠时钟信号的时钟电路（18b）响应于外部电源电位（VCC）的电荷泵装置（18c）和用于产生高正电压的非重叠时钟信号。提供响应于高正电压和参考电压的调节器电路（20），用于控制调节的正电位，使其独立于外部电源电位（VCC）。

9. 发明授权

US5263000A Drain power supply 失效
标题翻译：排水电源
公开(公告)号：US5263000A
公开(公告)日：1993-11-16
申请号：US964697
申请日：1992-10-22
申请人： Michael A. Van Buskirk , Johnny C. Chen , Chung K. Chang , Lee E. Cleveland , Antonio Montalvo
发明人： Michael A. Van Buskirk , Johnny C. Chen , Chung K. Chang , Lee E. Cleveland , Antonio Montalvo
IPC分类号： G11C17/00 , G11C16/06 , G11C16/30 , H02M3/07 , H03K19/096 , G11C13/00
CPC分类号： G11C16/30
摘要： A drain power supply for generating and supplying a regulated positive potential to drain regions of selected memory cells via bit lines in an array of flash EEPROM memory cells during programming includes charge pump means (20) formed of a plurality of charge pump sections (20a-20h) driven by one of a plurality of staggered clock signals for generating a moderately high level positive voltage. Cancellation means (26, 28) are coupled to each of the plurality of charge pump sections for effectively canceling out threshold voltage drops in the charge pump circuit. A regulator circuit (22) responsive to the regulated positive potential at an output node and a reference voltage is provided for generating a control voltage so as to control the high level positive voltage on the output node.

10. 发明申请

US20130205001A1 MODIFYING APPLICATION DATA SYNCHRONIZATION BASED ON APPLICATION USAGE FREQUENCY 审中-公开
标题翻译：基于应用频率修改应用数据同步
公开(公告)号：US20130205001A1
公开(公告)日：2013-08-08
申请号：US13365026
申请日：2012-02-02
申请人： Lisa N. Reed , Rashmi Chaudhury , Johnny C. Chen , Bryan C. Gebhardt , Paul W. Hangas , Scott I. Putterman
发明人： Lisa N. Reed , Rashmi Chaudhury , Johnny C. Chen , Bryan C. Gebhardt , Paul W. Hangas , Scott I. Putterman
IPC分类号： G06F15/173
CPC分类号： G06F9/4418 , G06F9/44505
摘要： A method and apparatus for modifying data synchronization of an application responsive to the frequency of application usage are disclosed. Data describing a frequency with which the application is used is captured by a portable computing device. For example, data describing timestamps when the application receives input or data describing a timestamp when the application was the primary application being executed are captured. It is determined whether the frequency of interaction with which the application is used equals or exceeds a threshold value. For example, the portable computing device determines whether the application has received an input or was the primary application within a predetermined time interval from the current time. Responsive to determining the frequency of interaction with the application does not equal or exceed the threshold value, data synchronization for the application is disabled. In one embodiment, the portable computing device stops data synchronization for the application.
摘要翻译：公开了一种响应于应用使用频率来修改应用的数据同步的方法和装置。描述使用应用程序的频率的数据由便携式计算设备捕获。例如，捕获当应用程序是正在执行的主应用程序时应用程序接收到输入的时间戳记或描述时间戳的数据的数据。确定应用的使用频率是否等于或超过阈值。例如，便携式计算装置在从当前时间起的预定时间间隔内确定应用程序是否已经接收到输入或者是主应用程序。响应于确定与应用程序的交互频率不等于或超过阈值，应用程序的数据同步被禁用。在一个实施例中，便携式计算设备停止应用的数据同步。

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