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1. 发明授权

US07573310B2 SET/RESET latch circuit, Schmitt trigger circuit, and MOBILE based D-type flip flop circuit and frequency divider circuit thereof 失效
标题翻译： SET / RESET锁存电路，施密特触发电路和基于MOBILE的D型触发器电路及其分频器电路
公开(公告)号：US07573310B2
公开(公告)日：2009-08-11
申请号：US11418207
申请日：2006-05-05
申请人： Kyoung-Hoon Yang , Tae-Ho Kim , Yongsik Jeong
发明人： Kyoung-Hoon Yang , Tae-Ho Kim , Yongsik Jeong
IPC分类号： H03K3/315
CPC分类号： H03K3/315 , H03K3/2885 , H03K3/2897 , H03K5/00006 , H03K17/58
摘要： The present invention relates to a SET/RESET latch circuit a Schmitt trigger circuit, and a MOBILE based D-type flip flop circuit and frequency divider circuit using the SET/RESET latch circuit and Schmitt trigger circuit. The SET/RESET latch circuit is configured with CML-type transistors and negative differential resistance diodes. The SET/RESET latch circuit can be applied to very high speed digital circuits.
摘要翻译：本发明涉及使用SET / RESET锁存电路和施密特触发电路的SET / RESET锁存电路，施密特触发电路和基于MOBILE的D型触发电路和分频器电路。 SET / RESET锁存电路配置有CML型晶体管和负差分电阻二极管。 SET / RESET锁存电路可以应用于非常高速的数字电路。

2. 发明授权

US07573343B2 RTD-HBT differential oscillator topology 失效
标题翻译： RTD-HBT差分振荡器拓扑
公开(公告)号：US07573343B2
公开(公告)日：2009-08-11
申请号：US11463669
申请日：2006-08-10
申请人： Kyoung-Hoon Yang , Sun-Kyu Choi , Yongsik Jeong
发明人： Kyoung-Hoon Yang , Sun-Kyu Choi , Yongsik Jeong
IPC分类号： H03B7/14 , H03K3/315
CPC分类号： H03B7/08 , H01L27/0605 , H01L29/7371 , H01L29/882 , H01L29/93 , H03B5/1215 , H03B5/1221 , H03B5/1231 , H03B5/1243
摘要： The new RTD-HBT differential oscillator circuit topology is proposed. At the nodes of the inductors and varactors in the conventional differential oscillator topology, each the RTD is attached to increase the magnitude of the negative conductance, which results in performance improvement in both the RF output power and phase noise. And, the differential sinusoidal voltage waveform which is essential for the wireless communication system are generated. In addition, the DC power consumption RTD-HBT differential oscillator circuit is similar to the conventional HBT differential oscillator due to the small DC power consumption performance of the RTD.
摘要翻译：提出了新的RTD-HBT差分振荡器电路拓扑结构。在常规差分振荡器拓扑中的电感器和变容二极管的节点处，每个RTD被连接以增加负电导的幅度，这导致RF输出功率和相位噪声两者的性能提高。并且，产生对于无线通信系统必不可少的差分正弦电压波形。此外，直流功耗RTD-HBT差分振荡电路由于RTD的小直流功耗特性，与传统的HBT差分振荡器相似。

3. 发明授权

US08338877B2 Nonvolatile memory devices and methods of forming the same 有权
标题翻译：非易失存储器件及其形成方法
公开(公告)号：US08338877B2
公开(公告)日：2012-12-25
申请号：US12588316
申请日：2009-10-13
申请人： Yongsik Jeong , Jeonguk Han , Weonho Park , Byungsup Shim
发明人： Yongsik Jeong , Jeonguk Han , Weonho Park , Byungsup Shim
IPC分类号： H01L29/788
CPC分类号： H01L21/8239 , H01L27/1052 , H01L27/11565 , H01L27/11568 , H01L29/66833 , H01L29/792
摘要： Nonvolatile memory devices and methods of forming the same are provided, the nonvolatile memory devices may include first regions and second regions which extend in a first direction and are alternately disposed in a semiconductor substrate along a second direction crossing the first direction. Buried doped lines are formed at the first regions respectively and extend in the first direction. The buried doped lines may be doped with a dopant of a first conductivity type. Bulk regions doped with a dopant of a second conductivity type and device isolation patterns are disposed along the second direction. The bulk regions and the device isolation patterns may be formed in the second regions. Word lines crossing the buried doped lines and the bulk regions are formed parallel to one another. Contact structures are connected to the buried doped lines and disposed between the device isolation patterns. Sidewalls of the device isolation patterns disposed in the first direction overlap with the word lines directly adjacent to the contact structures.
摘要翻译：提供了非易失性存储器件及其形成方法，非易失性存储器件可以包括沿着第一方向延伸并且沿与第一方向交叉的第二方向交替地设置在半导体衬底中的第一区域和第二区域。埋设的掺杂线分别形成在第一区域并沿第一方向延伸。掩埋掺杂线可以掺杂有第一导电类型的掺杂剂。掺杂有第二导电类型的掺杂剂的器件区域和器件隔离图案沿第二方向设置。块区域和器件隔离图案可以形成在第二区域中。跨越掩埋掺杂线和体区的字线彼此平行地形成。接触结构连接到掩埋掺杂线并且设置在器件隔离图案之间。以第一方向布置的器件隔离图案的侧壁与直接与接触结构相邻的字线重叠。

4. 发明申请

US20100090267A1 Nonvolatile memory devices and methods of forming the same 有权
标题翻译：非易失存储器件及其形成方法
公开(公告)号：US20100090267A1
公开(公告)日：2010-04-15
申请号：US12588316
申请日：2009-10-13
申请人： Yongsik Jeong , Jeonguk Han , Weonho Park , Byungsup Shim
发明人： Yongsik Jeong , Jeonguk Han , Weonho Park , Byungsup Shim
IPC分类号： H01L29/792
CPC分类号： H01L21/8239 , H01L27/1052 , H01L27/11565 , H01L27/11568 , H01L29/66833 , H01L29/792
摘要： Nonvolatile memory devices and methods of forming the same are provided, the nonvolatile memory devices may include first regions and second regions which extend in a first direction and are alternately disposed in a semiconductor substrate along a second direction crossing the first direction. Buried doped lines are formed at the first regions respectively and extend in the first direction. The buried doped lines may be doped with a dopant of a first conductivity type. Bulk regions doped with a dopant of a second conductivity type and device isolation patterns are disposed along the second direction. The bulk regions and the device isolation patterns may be formed in the second regions. Word lines crossing the buried doped lines and the bulk regions are formed parallel to one another. Contact structures are connected to the buried doped lines and disposed between the device isolation patterns. Sidewalls of the device isolation patterns disposed in the first direction overlap with the word lines directly adjacent to the contact structures.
摘要翻译：提供了非易失性存储器件及其形成方法，非易失性存储器件可以包括沿着第一方向延伸并且沿与第一方向交叉的第二方向交替地设置在半导体衬底中的第一区域和第二区域。埋设的掺杂线分别形成在第一区域并沿第一方向延伸。掩埋掺杂线可以掺杂有第一导电类型的掺杂剂。掺杂有第二导电类型的掺杂剂的器件区域和器件隔离图案沿第二方向设置。块区域和器件隔离图案可以形成在第二区域中。跨越掩埋掺杂线和体区的字线彼此平行地形成。接触结构连接到掩埋掺杂线并且设置在器件隔离图案之间。以第一方向布置的器件隔离图案的侧壁与直接与接触结构相邻的字线重叠。

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