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1. 发明授权

US08136008B1 ECC with out of order completion 有权
标题翻译： ECC无序完成
公开(公告)号：US08136008B1
公开(公告)日：2012-03-13
申请号：US13089794
申请日：2011-04-19
申请人： Kwok W. Yeung , Kin Ming Chan , Meng-Kun Lee , Kin Man Ng
发明人： Kwok W. Yeung , Kin Ming Chan , Meng-Kun Lee , Kin Man Ng
IPC分类号： H03M13/00
CPC分类号： H03M13/1145 , H03M13/1102 , H03M13/1515 , H03M13/153 , H03M13/1545 , H03M13/2957 , H03M13/4146 , H03M13/612
摘要： Processing a sequence of data frames in an error correction code (ECC) decoder is disclosed. Processing includes receiving a first data frame in the sequence of data frames, initiating processing of the first data frame through the ECC decoder, receiving a second data frame from the input sequence of data frames, and initiating processing of the second data frame through the ECC decoder before the first data frame is finished being processed through the ECC decoder. The ECC decoder includes one or more stages and at least one of the stages is coupled to a memory configured to store data associated with the at least one stage.
摘要翻译：公开了在纠错码（ECC）解码器中处理数据帧序列。处理包括接收数据帧序列中的第一数据帧，通过ECC解码器发起第一数据帧的处理，从输入的数据帧序列接收第二数据帧，以及通过ECC发起第二数据帧的处理在通过ECC解码器处理完第一数据帧之前的解码器。 ECC解码器包括一个或多个阶段，并且至少一个级耦合到被配置为存储与至少一个级相关联的数据的存储器。

2. 发明授权

US08839051B1 Advance clocking scheme for ECC in storage 有权
标题翻译： ECC存储中的高级时钟方案
公开(公告)号：US08839051B1
公开(公告)日：2014-09-16
申请号：US13404372
申请日：2012-02-24
申请人： Kwok W. Yeung , Kin Man Ng , Kin Ming Chan
发明人： Kwok W. Yeung , Kin Man Ng , Kin Ming Chan
IPC分类号： G06F11/00
CPC分类号： H04L1/004 , G06F11/10 , H03M13/1111 , H03M13/2933 , H03M13/3715 , H03M13/3738 , H03M13/4138 , H03M13/6502 , H03M13/6508 , H04L1/005 , H04L1/0053
摘要： A system for clocking a decoder is disclosed. The system includes: a channel front end configured to receive input data, a first clock configured to provide a first clock signal as input to the channel front end, a decoder configured to receive intermediate data associated with the output of the channel front end, and a second clock configured to provide a second clock signal as input to the decoder. In some embodiments, the second clock signal is not derived from the first clock signal.
摘要翻译：公开了一种用于对解码器进行计时的系统。该系统包括：被配置为接收输入数据的通道前端，被配置为提供作为到通道前端的输入的第一时钟信号的第一时钟，被配置为接收与通道前端的输出相关联的中间数据的解码器，以及第二时钟，被配置为提供第二时钟信号作为解码器的输入。在一些实施例中，第二时钟信号不是从第一时钟信号导出的。

3. 发明授权

US08659847B1 Component reuse for ITI cancellation 有权
标题翻译： ITI取消组件重用
公开(公告)号：US08659847B1
公开(公告)日：2014-02-25
申请号：US13368226
申请日：2012-02-07
申请人： Kwok W. Yeung , Kin Man Ng , Kin Ming Chan
发明人： Kwok W. Yeung , Kin Man Ng , Kin Ming Chan
IPC分类号： G11B5/09
CPC分类号： G11B5/012 , G11B20/10046
摘要： User level data associated with a location adjacent to a desired location on a magnetic disk storage is received. Media level data associated with the adjacent location is generated based at least in part on the user level data associated with the adjacent location; a processor which is configured to generate the media level data associated with the adjacent location is a same processor which is configured to generate media level data based at least in part on user level data during a write process. The media level data associated with the adjacent location is used to remove inter-track interference (ITI) associated with the adjacent location from a signal read back from the desired location.
摘要翻译：接收与磁盘存储器上所需位置相邻的位置相关联的用户级数据。至少部分地基于与相邻位置相关联的用户级数据来生成与相邻位置相关联的媒体级数据; 被配置为生成与相邻位置相关联的媒体级数据的处理器是相同的处理器，其被配置为至少部分地基于用户级数据在写入过程期间生成媒体级数据。与相邻位置相关联的媒体级数据用于从从所需位置读回的信号中去除与相邻位置相关联的轨道间干扰（ITI）。

4. 发明授权

US08572463B2 Quasi-cyclic LDPC encoding and decoding for non-integer multiples of circulant size 有权
标题翻译：用于循环大小非整数倍的准循环LDPC编码和解码
公开(公告)号：US08572463B2
公开(公告)日：2013-10-29
申请号：US13035770
申请日：2011-02-25
申请人： Lingqi Zeng , Yu Kou , Kin Man Ng , Kwok W. Yeung
发明人： Lingqi Zeng , Yu Kou , Kin Man Ng , Kwok W. Yeung
IPC分类号： G11C29/00
CPC分类号： H03M13/1111 , H03M13/116 , H03M13/3994
摘要： In processing quasi-cyclic low-density parity-check (QC-LDPC) data, an input signal is received which includes decision and reliability information corresponding to unpadded data. Decision and reliability information corresponding to padded data is introduced into the input signal. Message passing is performed one or more times to obtain decoded data. This includes using (1) the decision and reliability information corresponding to the unpadded data and (2) the decision and reliability information corresponding to the padded data, where a preference is given to the decision and reliability information corresponding to the unpadded data over the decision and reliability information corresponding to the unpadded data during message passing. Zero padding is removed from the decoded data.
摘要翻译：在处理准循环低密度奇偶校验（QC-LDPC）数据时，接收到包括与非附加数据相对应的判定和可靠性信息的输入信号。与填充数据相对应的判定和可靠性信息被引入到输入信号中。执行消息传递一次或多次以获得解码数据。这包括使用（1）对应于未附加数据的决策和可靠性信息，以及（2）与填充数据相对应的决策和可靠性信息，其中优先考虑与决定有关的未附加数据的决策和可靠性信息以及在消息传递期间对应于未附加数据的可靠性信息。从解码数据中删除零填充。

5. 发明授权

US08484539B1 Controlling power consumption in iterative ECC processing systems 有权
标题翻译：控制迭代ECC处理系统的功耗
公开(公告)号：US08484539B1
公开(公告)日：2013-07-09
申请号：US12802133
申请日：2010-05-28
申请人： Kwok W. Yeung , Kin Man Ng
发明人： Kwok W. Yeung , Kin Man Ng
IPC分类号： H03M13/00 , H03M13/03 , G06F11/00
CPC分类号： H03M13/2957 , G06F1/3203 , G06F11/3041 , G06F11/3058 , H03M13/1102 , H03M13/1111 , H03M13/1128 , H03M13/3715 , H03M13/4138 , H03M13/6331
摘要： An iterative error correction coding (ECC) decoder is configured to operate in a first higher-power and higher-performance operating mode. At least some part of a system that includes the iterative ECC decoder is monitored. It is determining whether to switch the iterative ECC decoder from the first higher-power and higher-performance operating mode to a second lower-power and lower-performance operating mode based at least in part on the monitoring. The iterative ECC decoder is configured to operate in the second lower-power and lower-performance operating mode in the event it is determined to switch operating modes.
摘要翻译：迭代纠错编码（ECC）解码器被配置为在第一高功率和更高性能的操作模式下操作。监视包括迭代ECC解码器的系统的至少部分。至少部分地基于监视来确定是否将迭代ECC解码器从第一高功率和高性能操作模式切换到第二低功率和低性能操作模式。在确定切换操作模式的情况下，迭代ECC解码器被配置为在第二低功率和低性能操作模式下操作。

6. 发明授权

US08321772B1 SOVA sharing during LDPC global iteration 有权
标题翻译： LDPC全局迭代期间的SOVA共享
公开(公告)号：US08321772B1
公开(公告)日：2012-11-27
申请号：US12587999
申请日：2009-10-14
申请人： Kwok W. Yeung , Kin Man Ng
发明人： Kwok W. Yeung , Kin Man Ng
IPC分类号： G06F11/00
CPC分类号： H03M13/2933 , H03M13/1105 , H03M13/1145 , H03M13/2957 , H03M13/2987 , H03M13/4138 , H03M13/6331 , H04L1/005 , H04L1/0054 , H04L1/0065
摘要： A technique for decoding information, including a Viterbi decoder configured to decode (1) Front-end processed ADC data and (2) an output of an iterative error correction decoder in the event error correction decoding fails. The iterative error correction decoder is configured to decode Viterbi decoded data generated by the Viterbi decoder.
摘要翻译：一种用于解码信息的技术，包括维特比解码器，其被配置为解码（1）前端处理的ADC数据，以及（2）在事件纠错解码中迭代纠错解码器的输出失败。迭代纠错解码器被配置为对维特比解码器生成的维特比解码数据进行解码。

7. 发明授权

US08918696B2 Implementation of LDPC selective decoding scheduling 有权
标题翻译： LDPC选择性解码调度的实现
公开(公告)号：US08918696B2
公开(公告)日：2014-12-23
申请号：US13084022
申请日：2011-04-11
申请人： Kin Man Ng , Kwok W. Yeung , Lingqi Zeng , Yu Kou , Aditi R. Ganesan
发明人： Kin Man Ng , Kwok W. Yeung , Lingqi Zeng , Yu Kou , Aditi R. Ganesan
IPC分类号： H03M13/00 , H03M13/11
CPC分类号： H03M13/114 , H03M13/116
摘要： A method for decoding data is disclosed. The method includes partitioning a low-density parity check (LDPC) matrix into a plurality of groups, each comprising one or more check node layers. The method further includes selecting one of the groups based at least in part on a cost function, the cost function based at least in part on information associated with a variable node, or information associated with a check node, or both. The method further includes performing LDPC layered decoding on the selected group.
摘要翻译：公开了一种解码数据的方法。该方法包括将低密度奇偶校验（LDPC）矩阵划分成多个组，每个组包括一个或多个校验节点层。该方法还包括至少部分地基于成本函数来选择组中的一个，所述成本函数至少部分地基于与变量节点相关联的信息或与校验节点相关联的信息，或两者。该方法还包括对所选择的组执行LDPC分层解码。

8. 发明授权

US08504894B1 Systematic encoding for non-full row rank, quasi-cyclic LDPC parity check matrices 有权
标题翻译：非全行排序，准循环LDPC奇偶校验矩阵的系统编码
公开(公告)号：US08504894B1
公开(公告)日：2013-08-06
申请号：US13039040
申请日：2011-03-02
申请人： Lingqi Zeng , Yu Kou , Kin Man Ng , Kwok W. Yeung
发明人： Lingqi Zeng , Yu Kou , Kin Man Ng , Kwok W. Yeung
IPC分类号： H03M13/00
CPC分类号： H03M13/116 , H03M13/611 , H03M13/618 , H03M13/6356 , H03M13/6502
摘要： Encoding is performed by putting a low-density parity-check (LDPC) generator matrix into partial quasi-cyclic form comprising an identity matrix, a parity generator matrix, a zero matrix and a remainder matrix. The parity generator matrix is quasi-cyclic and the remainder matrix is not quasi-cyclic. An encoder is used to generate LDPC encoded data using the parity generator matrix and without using the remainder matrix.
摘要翻译：通过将低密度奇偶校验（LDPC）生成器矩阵置于包括单位矩阵，奇偶校验生成矩阵，零矩阵和余数矩阵的部分准循环形式中来执行编码。奇偶生成矩阵是准循环的，剩余矩阵不是准循环的。编码器用于使用奇偶校验发生器矩阵生成LDPC编码数据，而不使用余数矩阵。

9. 发明授权

US08281224B1 Programmable LBA and dummy bit reliabilities 有权
标题翻译：可编程LBA和虚拟位可靠性
公开(公告)号：US08281224B1
公开(公告)日：2012-10-02
申请号：US12460897
申请日：2009-07-24
申请人： Yu Kou , Lingqi Zeng , Kin Man Ng , Kwok W. Yeung
发明人： Yu Kou , Lingqi Zeng , Kin Man Ng , Kwok W. Yeung
IPC分类号： G11B20/18
CPC分类号： G11B20/1833
摘要： Data is processed by obtaining data and redundant information from an expected position in a channel. Soft position information associated with the data is obtained and error correction decoding is performed using the data, the redundant information, and the soft position information to obtain a decoded position and decoded data. It is determined if the decoded position matches the expected position and the decoded data is output in the event the decoded position matches the expected position.
摘要翻译：通过从通道中的预期位置获取数据和冗余信息来处理数据。获取与数据相关联的软位置信息，并使用数据，冗余信息和软位置信息执行纠错解码，以获得解码位置和解码数据。确定解码位置是否与预期位置匹配，并且在解码位置与预期位置匹配的情况下输出解码数据。

10. 发明授权

US08219873B1 LDPC selective decoding scheduling using a cost function 有权
标题翻译：使用成本函数的LDPC选择性解码调度
公开(公告)号：US08219873B1
公开(公告)日：2012-07-10
申请号：US12587012
申请日：2009-09-29
申请人： Kin Man Ng , Lingqi Zeng , Yu Kou , Kwok W. Yeung
发明人： Kin Man Ng , Lingqi Zeng , Yu Kou , Kwok W. Yeung
IPC分类号： H03M13/00
CPC分类号： H03M13/05 , H03M13/114
摘要： Data is decoded by obtaining a cost function. For each of a plurality of groups of check nodes associated with low-density parity-check (LDPC) encoded data, the cost function is evaluated using information associated with a variable node and/or information associated with a check node. One of the groups of check nodes is selecting based at least in part on the evaluated cost functions. Processing related to error correction decoding is performed on the selected group of check nodes.
摘要翻译：通过获取成本函数对数据进行解码。对于与低密度奇偶校验（LDPC）编码数据相关联的多个校验节点组中的每一个，使用与可变节点相关联的信息和/或与校验节点相关联的信息来评估成本函数。校验节点组中的一个至少部分地基于评估的成本函数进行选择。对所选择的校验节点组执行与纠错解码有关的处理。

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