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1. 发明申请

US20130062535A1 SURFACE-PROCESSING DEVICE FOR A DENTAL IMPLANT 审中-公开
标题翻译：牙科植入物的表面处理装置
公开(公告)号：US20130062535A1
公开(公告)日：2013-03-14
申请号：US13383570
申请日：2011-05-31
申请人： Kwang Bum Park , Dong Jun Yang , Hyun Wook An , Sun Young Lee , Chang Hee Yang , Min Kim , Byung Kwon Moon , Hyun Seung Kim , Chul Jung , Chul Woong Jeong
发明人： Kwang Bum Park , Dong Jun Yang , Hyun Wook An , Sun Young Lee , Chang Hee Yang , Min Kim , Byung Kwon Moon , Hyun Seung Kim , Chul Jung , Chul Woong Jeong
IPC分类号： A61L2/00
CPC分类号： A61L2/00 , A61C8/0012 , A61C8/0015
摘要： A surface treatment device of dental implant according to an embodiment of the present invention includes: a body providing a treatment chamber to receive a surface processing object; a cover combined to the body to selectively open the treatment chamber; a light source irradiating UV light to a surface of the surface treatment object; and a reflective plate positioned at a bottom of the treatment chamber to reflect the UV light emitting from the light source toward the surface treatment object.
摘要翻译：根据本发明的实施例的牙科植入物的表面处理装置包括：主体，其设置用于接收表面处理对象的处理室; 一个与身体结合以选择性地打开处理室的盖子; 将UV光照射到所述表面处理对象的表面的光源; 以及反射板，其位于处理室的底部，以将从光源发射的UV光朝向表面处理对象反射。

2. 发明申请

US20060186950A1 Low supply voltage bias circuit, semiconductor device, wafer and system including same, and method of generating a bias reference 有权
公开(公告)号：US20060186950A1
公开(公告)日：2006-08-24
申请号：US11411286
申请日：2006-04-25
申请人： Chul Jung
发明人： Chul Jung
IPC分类号： G05F1/10
CPC分类号： G05F3/205
摘要： A bias generator and a method of generating a bias reference are disclosed. A reference transistor is connected in a diode configuration. An n-channel transistor connects in series with the reference transistor. A resulting reference current through the two transistors is controlled by the gate voltage on the n-channel transistor. A p-channel transistor configured as a first current mirror of the reference transistor generates a mirrored current. A voltage is developed across an impedance element connected in the path of the mirrored current. A feedback buffer connects between the voltage and the gate of the n-channel transistor to close a feedback loop stabilizing at a point where the reference current and mirrored current are proportional. A second current mirror supplies an output current. An optional n-channel transistor, configured in series with the second current mirror, may generate an output voltage proportional to the output current.

3. 发明授权

US07282407B1 Semiconductor memory device and method of manufacturing for preventing bit line oxidation 失效
标题翻译：用于防止位线氧化的半导体存储器件及其制造方法
公开(公告)号：US07282407B1
公开(公告)日：2007-10-16
申请号：US09008525
申请日：1998-06-29
申请人： Young-woo Park , Jun-yong Noh , Bon-young Koo , Chang-jin Kang , Chul Jung , Seok-woo Nam
发明人： Young-woo Park , Jun-yong Noh , Bon-young Koo , Chang-jin Kang , Chul Jung , Seok-woo Nam
IPC分类号： H01L21/8242
CPC分类号： H01L27/10852 , H01L27/10855 , H01L27/10885
摘要： A semiconductor memory device and method of manufacturing a semiconductor memory device that prevents oxidation of the bit lines caused by misalignment which may occur when patterning a storage electrode. An oxidation preventing layer, such as a nitride layer, is formed over the bit lines or in the contact holes to eliminate the diffusion of oxygen into the bit line structure, thereby preventing oxidation of the bit lines.
摘要翻译：一种半导体存储器件和半导体存储器件的制造方法，该半导体存储器件防止当图案化存储电极时可能发生的由不对准引起的位线的氧化。在位线或接触孔中形成诸如氮化物层的氧化防止层，以消除氧向位线结构的扩散，从而防止位线的氧化。

4. 发明申请

US20070160488A1 Scroll compressor 有权
标题翻译：涡旋压缩机
公开(公告)号：US20070160488A1
公开(公告)日：2007-07-12
申请号：US11604880
申请日：2006-11-28
申请人： Byung Yoo , Chul Jung
发明人： Byung Yoo , Chul Jung
IPC分类号： F01C1/02 , F01C1/063 , F03C2/00 , F03C4/00 , F04C18/00
CPC分类号： F04C29/025 , F04C18/0215 , F04C23/008 , Y10S418/01
摘要： A scroll compressor is provided. The scroll compressor includes a casing, an oil pump, an oil retrieving port, and an oil retrieving unit. The casing has a fluid storage area in a lower portion thereof. The oil pump is provided in the lower portion of the casing, and has a suction unit which suctions fluid from the fluid storage area. The oil retrieving port is in the casing to allow oil retrieved from an external oil separator to flow into the casing. The oil retrieving unit is connected to the oil retrieving port and provides a path which directs the retrieved oil to the suction unit.
摘要翻译：提供涡旋压缩机。涡旋压缩机包括壳体，油泵，油回收口和油回收单元。壳体在其下部具有流体储存区域。油泵设置在壳体的下部，并且具有从流体存储区域吸取流体的抽吸单元。油回收口在壳体中，以允许从外部油分离器回收的油流入壳体。油回收单元连接到油回收口，并且提供将回收的油引导到抽吸单元的路径。

5. 发明申请

US20050248392A1 Low supply voltage bias circuit, semiconductor device, wafer and systemn including same, and method of generating a bias reference 有权
标题翻译：低电压偏置电路，半导体器件，晶片及其系统，以及产生偏置基准的方法
公开(公告)号：US20050248392A1
公开(公告)日：2005-11-10
申请号：US10841848
申请日：2004-05-07
申请人： Chul Jung
发明人： Chul Jung
IPC分类号： G05F3/20 , H03K5/153
CPC分类号： G05F3/205
摘要： A bias generator and a method of generating a bias reference are disclosed. A reference transistor is connected in a diode configuration. An n-channel transistor connects in series with the reference transistor. A resulting reference current through the two transistors is controlled by the gate voltage on the n-channel transistor. A p-channel transistor configured as a first current mirror of the reference transistor generates a mirrored current. A voltage is developed across an impedance element connected in the path of the mirrored current. A feedback buffer connects between the voltage and the gate of the n-channel transistor to close a feedback loop stabilizing at a point where the reference current and mirrored current are proportional. A second current mirror supplies an output current. An optional n-channel transistor, configured in series with the second current mirror, may generate an output voltage proportional to the output current.
摘要翻译：公开了偏置发生器和产生偏置基准的方法。参考晶体管以二极管配置连接。 n沟道晶体管与参考晶体管串联。通过两个晶体管的结果参考电流由n沟道晶体管上的栅极电压控制。配置为参考晶体管的第一电流镜的p沟道晶体管产生镜像电流。跨越连接在镜像电流路径上的阻抗元件产生电压。反馈缓冲器连接在n沟道晶体管的电压和栅极之间，以闭合在参考电流和镜像电流成比例的点处稳定的反馈环路。第二个电流镜提供输出电流。配置为与第二电流镜串联的可选n沟道晶体管可以产生与输出电流成比例的输出电压。

6. 发明申请

US20050232069A1 Concrete-mortar transfer system of concrete pump car 失效
标题翻译：混凝土泵车混凝土输送系统
公开(公告)号：US20050232069A1
公开(公告)日：2005-10-20
申请号：US10898879
申请日：2004-07-26
申请人： Chul Jung
发明人： Chul Jung
IPC分类号： E04G21/04 , B28C7/04 , F04B9/105 , F04B9/117 , F04B15/02
CPC分类号： F04B15/023 , F04B9/105 , F04B9/1172 , F04B2201/0201
摘要： The present invention relates to a concrete transfer system of a concrete pump car which comprises a pair of concrete input tubes mounted in union to a pair of communication holes punched to the inside surface of a hopper, first and second drive cylinders mounted on the same lines of the concrete input tubes for sucking and transferring the concrete by forward and backward movements of pressure pistons mounted to rod ends, an oil pressure pump for supplying the fluid to the first and second drive cylinders, a rod sensing sensor for sensing the movement of the rods of the first and second drive cylinders, a control unit for performing a predetermined control operation by receiving the sensing signal of the rod sensing sensor, an oil path change drive unit for supplying selectively the fluid with the first and second drive cylinders according to the control signal of the control unit, the concrete transfer system of the concrete pump car comprising: a first logic valve to sixth logic valves, a reverse current preventive device, and a high/low pressure selection valve.
摘要翻译：混凝土泵车的混凝土输送系统技术领域本发明涉及一种混凝土泵车的混凝土输送系统，其包括一对混凝土输入管，该混合物输入管与一对冲压到料斗的内表面的一对连通孔并联安装，第一和第二驱动筒安装在相同的线的混凝土输入管，用于通过安装到杆端的压力活塞的前进和后退运动来吸入和输送混凝土;油压泵，用于将流体供应到第一和第二驱动缸;杆感测传感器，用于感测第一驱动缸和第二驱动缸的杆，用于通过接收杆感测传感器的感测信号来执行预定控制操作的控制单元，用于根据第一和第二驱动缸选择性地向第一和第二驱动缸提供流体的油路改变驱动单元控制单元的控制信号，混凝土泵车的混凝土输送系统包括：第一逻辑阀到第六逻辑阀 ves，反向电流预防装置和高/低压选择阀。

7. 发明申请

US20050081172A1 Sense amplifier circuit 有权
标题翻译：感应放大电路
公开(公告)号：US20050081172A1
公开(公告)日：2005-04-14
申请号：US10681929
申请日：2003-10-09
申请人： Chul Jung
发明人： Chul Jung
IPC分类号： G06F17/50 , G11C7/06 , G11C7/12
CPC分类号： G11C7/06 , G11C7/12
摘要： The disclosed embodiments relate to an equalization circuit, which may include a first sense amplifier having an input, the input being electrically isolated from an input to a second sense amplifier. An equalizer may be connected to the input to the first sense amplifier to provide an equalizing voltage to the input to the first sense amplifier. The input to the first sense amplifier may be equalized by the equalizing voltage independent from the input to the second sense amplifier.
摘要翻译：所公开的实施例涉及均衡电路，其可以包括具有输入的第一读出放大器，该输入与输入电隔离到第二读出放大器。均衡器可以连接到第一读出放大器的输入，以向第一读出放大器的输入提供均衡电压。第一读出放大器的输入可以与独立于第二读出放大器的输入的均衡电压相等。

8. 发明授权

US06177320B1 Method for forming a self aligned contact in a semiconductor device 有权
标题翻译：在半导体器件中形成自对准接触的方法
公开(公告)号：US06177320B1
公开(公告)日：2001-01-23
申请号：US09226961
申请日：1999-01-08
申请人： Chang-Hyun Cho , Hong-Sik Jeong , Jae-Goo Lee , Chang-Jin Kang , Sang-Sup Jeong , Chul Jung , Chan-Ouk Jung
发明人： Chang-Hyun Cho , Hong-Sik Jeong , Jae-Goo Lee , Chang-Jin Kang , Sang-Sup Jeong , Chul Jung , Chan-Ouk Jung
IPC分类号： H01L21336
CPC分类号： H01L27/10844 , H01L21/31144 , H01L21/76819 , H01L21/7684 , H01L21/76897 , H01L27/10852 , H01L27/10855 , H01L27/10873 , H01L27/10888
摘要： A self aligned contact pad in a semiconductor device and a method for forming the self aligned contact pad are disclosed. A bit line contact pad and a storage node contact pad are simultaneously formed by using a photoresist layer pattern having a T-shaped opening including at least two contact regions. An etch stopping layer is formed over a semiconductor substrate and over a transistor. An interlayer dielectric layer is then formed over the etch stopping layer. Next, the interlayer dielectric layer is planarized to have a planar top surface. A mask pattern having a T-shaped opening is then formed over the interlayer dielectric layer, exposing the active region and a portion of the inactive region. The interlayer dielectric layer and etch stopping layer are sequentially etched to reveal a top surface of the semiconductor substrate using the mask pattern, thereby forming a self aligned contact opening exposing a top surface of the semiconductor substrate. The mask pattern is then removed. A conductive layer is formed in the self aligned contact opening and over the interlayer dielectric layer. The conductive layer and the interlayer dielectric layer are planarization-etched to reveal a top surface of the gate mask, thereby forming at least two contact pads.
摘要翻译：公开了半导体器件中的自对准接触焊盘和用于形成自对准接触焊盘的方法。通过使用具有包括至少两个接触区域的T形开口的光致抗蚀剂层图案，同时形成位线接触焊盘和存储节点接触焊盘。在半导体衬底上并在晶体管上形成蚀刻停止层。然后在蚀刻停止层上形成层间电介质层。接下来，层间绝缘层被平坦化以具有平坦的顶表面。然后在层间电介质层上形成具有T形开口的掩模图案，暴露有源区和一部分非活性区。依次蚀刻层间电介质层和蚀刻停止层，以使用掩模图案露出半导体衬底的顶表面，从而形成暴露半导体衬底的顶表面的自对准接触开口。然后去除掩模图案。导电层形成在自对准接触开口中以及层间电介质层之上。对导电层和层间电介质层进行平面蚀刻以露出栅极掩模的顶表面，从而形成至少两个接触焊盘。

9. 发明授权

US6165840A Method for fabricating a DRAM cell capacitor including forming first multilayer insulator, forming conductive plug, forming second insulator, and etching second and first insulators to form the storage node 有权
标题翻译：一种用于制造DRAM单元电容器的方法，包括形成第一多层绝缘体，形成导电插塞，形成第二绝缘体，以及蚀刻第二和第一绝缘体以形成存储节点
公开(公告)号：US6165840A
公开(公告)日：2000-12-26
申请号：US300815
申请日：1999-04-27
申请人： Chang-Won Choi , Chang-Hwan Lee , Chul Jung , Min-Seok Han
发明人： Chang-Won Choi , Chang-Hwan Lee , Chul Jung , Min-Seok Han
IPC分类号： H01L27/108 , H01L21/02 , H01L21/768 , H01L21/8242
CPC分类号： H01L27/10852 , H01L21/76895 , H01L28/60 , H01L28/82
摘要： Disclosed is an improved method for fabricating a DRAM cell capacitor which can prevent over-etching of polysilicon storage node. The method includes the steps of etching a first insulating layer on a semiconductor substrate to form a storage contact hole, filling the storage contact hole with a first conductive material to form a storage contact plug, forming a second insulating layer over the first insulating layer including the storage contact plug, forming a mask over the second insulating layer to define a storage node region, using the mask and etching the second and first insulating layers to form an opening therein to an upper surface of the storage contact plug, and filling the opening with a second conductive material to form a storage node.
摘要翻译：公开了一种用于制造可以防止多晶硅存储节点的过度蚀刻的DRAM单元电容器的改进方法。该方法包括以下步骤：蚀刻半导体衬底上的第一绝缘层以形成存储接触孔，用第一导电材料填充存储接触孔以形成存储接触插塞，在第一绝缘层上形成第二绝缘层，包括所述存储接触插塞在所述第二绝缘层上形成掩模以限定存储节点区域，使用所述掩模并蚀刻所述第二绝缘层和所述第一绝缘层以在所述存储接触插塞的上表面形成开口，并填充所述开口具有第二导电材料以形成存储节点。

10. 发明申请

US20060245282A1 Sense amplifier circuit 有权
公开(公告)号：US20060245282A1
公开(公告)日：2006-11-02
申请号：US11477164
申请日：2006-06-28
申请人： Chul Jung
发明人： Chul Jung
IPC分类号： G11C7/00
CPC分类号： G11C7/06 , G11C7/12
摘要： The disclosed embodiments relate to an equalization circuit, which may include a first sense amplifier having an input, the input being electrically isolated from an input to a second sense amplifier. An equalizer may be connected to the input to the first sense amplifier to provide an equalizing voltage to the input to the first sense amplifier. The input to the first sense amplifier may be equalized by the equalizing voltage independent from the input to the second sense amplifier.

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